Data Structures

Here are the data structures with brief descriptions:

_Fifo
Icu_Config	Configuration structure of the Icu interface
Icu_Functions
Icu_s	Structure of the Icu interface
Ifx_CircularBuffer	Circular buffer definition
Ifx_Console
Ifx_DataBufferMode_TimeStampSingle
Ifx_DateTime
Ifx_Fifo_Shared
Ifx_GlobalResources	Global resource object
Ifx_GlobalResources_Item
Ifx_InternalMux_Config
Ifx_InternalMux_MuxConfig
Ifx_IsrSetting
Ifx_LowPassPt1	PT1 object definition
Ifx_LowPassPt1_Config	PT1 configuration
Ifx_Shell	Shell object definition
Ifx_Shell_CmdLine	Command line editing state
Ifx_Shell_Command	Shell command object
Ifx_Shell_Config	Shell configuration
Ifx_Shell_Flags	Shell control flags
Ifx_Shell_Protocol	Shell protocol configuration
Ifx_Shell_Runtime	Internal Shell run-time data
Ifx_Shell_Syntax
IfxAsclin_Asc	Module Handle
IfxAsclin_Asc_BaudRate	Structure for baudrate
IfxAsclin_Asc_BitTimingControl	Structure for bit timings
IfxAsclin_Asc_Config	Configuration structure of the module
IfxAsclin_Asc_ErrorFlags	Structure for Error Flags
IfxAsclin_Asc_ErrorFlagsUnion	This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member
IfxAsclin_Asc_FifoControl	Structure for FIFO control
IfxAsclin_Asc_FrameControl	Structure for frame control
IfxAsclin_Asc_InterruptConfig	Structure for interrupt configuration
IfxAsclin_Asc_Pins	Structure for ASC pin configuration
IfxAsclin_Cts_In	CTS pin mapping structure
IfxAsclin_Lin
IfxAsclin_Lin_AcknowledgementFlags	Structure for Acknowledgement Flags
IfxAsclin_Lin_BaudrateDetection	Structure for Baudrate Detection
IfxAsclin_Lin_BaudrateGeneration	Structure for Baudrate Generation
IfxAsclin_Lin_BitSamplingControl	Structure for Bit Sampling
IfxAsclin_Lin_BitTimingControl	Structure for Bit Timing
IfxAsclin_Lin_Config	Configuration structure of the module
IfxAsclin_Lin_DataControl	Structure for Data Control
IfxAsclin_Lin_ErrorFlags	Structure for Error Flags
IfxAsclin_Lin_FifoControl	Structure for FIFO Control
IfxAsclin_Lin_FrameControl	Structure for Frame Control
IfxAsclin_Lin_LinControl	Structure for lin Control
IfxAsclin_Lin_Pins	Structure for LIN pin configuration
IfxAsclin_Rts_Out	RTS pin mapping structure
IfxAsclin_Rx_In	RX pin mapping structure
IfxAsclin_Sclk_Out	SCLK pin mapping structure
IfxAsclin_Slso_Out	SLSO pin mapping structure
IfxAsclin_Spi	Module handle
IfxAsclin_Spi_Baudrate	Structure for Baudrate Generation
IfxAsclin_Spi_BitSamplingControl	Structure for Bit Sampling
IfxAsclin_Spi_Config	Configuration structure of the module
IfxAsclin_Spi_ErrorFlags	Structure for Error Flags
IfxAsclin_Spi_FifoControl	Structure for FIFO Control
IfxAsclin_Spi_FrameControl	Structure for Frame Control
IfxAsclin_Spi_InputOutputControl	Structure for input output control
IfxAsclin_Spi_InterruptConfig	Structure for interrupt configuration
IfxAsclin_Spi_Job	Structure for data transfer jobs
IfxAsclin_Spi_Pins	Structure for SPI pin configuration
IfxAsclin_Tx_Out	TX pin mapping structure
IfxCcu6_Cc60_Out	CC60 pin mapping structure
IfxCcu6_Cc60in_In	CC60IN pin mapping structure
IfxCcu6_Cc61_Out	CC61 pin mapping structure
IfxCcu6_Cc61in_In	CC61IN pin mapping structure
IfxCcu6_Cc62_Out	CC62 pin mapping structure
IfxCcu6_Cc62in_In	CC62IN pin mapping structure
IfxCcu6_Ccpos0_In	CCPOS0 pin mapping structure
IfxCcu6_Ccpos1_In	CCPOS1 pin mapping structure
IfxCcu6_Ccpos2_In	CCPOS2 pin mapping structure
IfxCcu6_Cout60_Out	COUT60 pin mapping structure
IfxCcu6_Cout61_Out	COUT61 pin mapping structure
IfxCcu6_Cout62_Out	COUT62 pin mapping structure
IfxCcu6_Cout63_Out	COUT63 pin mapping structure
IfxCcu6_Ctrap_In	CTRAP pin mapping structure
IfxCcu6_Icu	Module handle
IfxCcu6_Icu_Channel	Channel handle
IfxCcu6_Icu_ChannelConfig	Configuration structure of the channel
IfxCcu6_Icu_Clock	Structure for clock configuration
IfxCcu6_Icu_Config	Configuration structure of the module
IfxCcu6_Icu_InterruptConfig	Structure for interrupt configuration
IfxCcu6_Icu_Pins	Structure for capture input pins
IfxCcu6_Icu_TriggerConfig	Configuration structure for external triggers
IfxCcu6_PwmBc	Module handle
IfxCcu6_PwmBc_Config	Configuration structure of the module
IfxCcu6_PwmBc_InterruptConfig	Structure for interrupt configuration
IfxCcu6_PwmBc_MultiChannelControl	Structure for multichannel mode control
IfxCcu6_PwmBc_Pins	Structure for CCU6 output pin configuration
IfxCcu6_PwmBc_Timer12	Structure for Timer 12
IfxCcu6_PwmBc_Timer13	Structure for Timer 13
IfxCcu6_PwmBc_TriggerConfig	Configuration structure for external triggers
IfxCcu6_PwmHl_Base	Multi-channels PWM object definition (channels only)
IfxCcu6_PwmHl_Config	CCU6: PWM HL configuration
IfxCcu6_PwmHl_Mode	Structure for PWM configuration
IfxCcu6_PwmHl_s	CCU6 PWM driver
IfxCcu6_T12hr_In	T12HR pin mapping structure
IfxCcu6_T13hr_In	T13HR pin mapping structure
IfxCcu6_Timer	Module handle
IfxCcu6_Timer_Clock	Structure for clock configuration
IfxCcu6_Timer_Config	Configuration structure of the module
IfxCcu6_Timer_InterruptConfig	Structure for interrupt configuration
IfxCcu6_Timer_Pins	Structure for CCU6 output pin configuration
IfxCcu6_Timer_Timer12	Structure for Timer 12
IfxCcu6_Timer_Timer13	Structure for Timer 13
IfxCcu6_Timer_TriggerConfig	Configuration structure for external triggers
IfxCcu6_TimerWithTrigger	CCU6 Timer interface
IfxCcu6_TimerWithTrigger_Base	Structure for the timer base
IfxCcu6_TimerWithTrigger_Config	Configuration structure for T12 and T13 Timer
IfxCcu6_TPwm	Module handle
IfxCcu6_TPwm_Clock	Structure for clock configuration
IfxCcu6_TPwm_Config	Configuration structure of the module
IfxCcu6_TPwm_InterruptConfig	Structure for interrupt configuration
IfxCcu6_TPwm_Pins	Structure for CCU6 output pin configuration
IfxCcu6_TPwm_Timer12	Structure for Timer 12
IfxCcu6_TPwm_Timer13	Structure for Timer 13
IfxCcu6_TPwm_TriggerConfig	Configuration structure for external triggers
IfxCif_Cam	Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations
IfxCif_Cam_Common	Common configuration
IfxCif_Cam_Config	Camera specific configuration
IfxCif_Cam_Downscaling	Downscaler configuration
IfxCif_Cam_JfifHeader	JPEG JFIF header structure
IfxCif_Cam_JpegTable	Single component JPEG tables
IfxCif_Cam_JpegTables	JPEG tables for all components
IfxCif_Cam_MemAreas	All paths memory partitioning
IfxCif_Cam_MemConfig	Single path memory interface configuration (used in initialisation/configuration)
IfxCif_Cam_MemInfo	Single path memory interface information (used in Runtime)
IfxCif_Cam_PictureInfo	Picture info
IfxCif_Cam_TableInfo
IfxCif_Clk_In	CLK pin mapping structure
IfxCif_D_In	D pin mapping structure
IfxCif_Hsnc_In	HSNC pin mapping structure
IfxCif_Vsnc_In	VSNC pin mapping structure
IfxCpu_Counter
IfxCpu_Perf	Performance counter result
IfxCpu_Trap	Structure to contain the trap information
IfxCpu_Trap_Id	Union to abstract Identification numbers under Traps
IfxDma_Dma	DMA base address data structure (Module handle)
IfxDma_Dma_Channel	Channel handle
IfxDma_Dma_ChannelConfig	Configuration data structure of the channel
IfxDma_Dma_Config	Configuration data structure of the Module
IfxDsadc_Cgpwm_Out	CGPWM pin mapping structure
IfxDsadc_Cin_In	CIN pin mapping structure
IfxDsadc_Cout_Out	COUT pin mapping structure
IfxDsadc_Din_In	DIN pin mapping structure
IfxDsadc_Dsadc	DSADC handle data structure
IfxDsadc_Dsadc_AuxFilterConfig	Auxiliary comb filter configuration structure
IfxDsadc_Dsadc_CarrierGenConfig	Carrier generation configuration structure
IfxDsadc_Dsadc_Channel	Channel handle structure
IfxDsadc_Dsadc_ChannelConfig	Single channel configuration structure
IfxDsadc_Dsadc_ChannelPins	Channel Pins Configuration structure
IfxDsadc_Dsadc_CombFilterConfig	Comb filter configuration structure
IfxDsadc_Dsadc_Config	Clock configuration data structure
IfxDsadc_Dsadc_DemodulatorConfig	Demodulator configuration structure
IfxDsadc_Dsadc_FirFilterConfig	FIR filters configuration structure
IfxDsadc_Dsadc_IntegratorConfig	Integrator configuration structure
IfxDsadc_Dsadc_ModulatorConfig	Modulator configuration structure
IfxDsadc_Dsadc_RectifierConfig	Rectifier configuration structure
IfxDsadc_Dsn_In	DS negative pin mapping structure
IfxDsadc_Dsp_In	DS positive pin mapping structure
IfxDsadc_Itr_In	ITR pin mapping structure
IfxDsadc_Sg_In	SG pin mapping structure
IfxDts_Dts_Config	DTS module configuration structure
IfxEray_Eray	ERAY Module handle
IfxEray_Eray_BufferReconfig	Reconfigurable buffer structure
IfxEray_Eray_Config	Module configuration structure
IfxEray_Eray_ControllerConfig	Communication Controller configuration structure
IfxEray_Eray_Gtu01Config	GTU01 configuration
IfxEray_Eray_Gtu02Config	GTU02 configuration
IfxEray_Eray_Gtu03Config	GTU03 configuration
IfxEray_Eray_Gtu04Config	GTU04 configuration
IfxEray_Eray_Gtu05Config	GTU05 configuration
IfxEray_Eray_Gtu06Config	GTU06 configuration
IfxEray_Eray_Gtu07Config	GTU07 configuration
IfxEray_Eray_Gtu08Config	GTU08 configuration
IfxEray_Eray_Gtu09Config	GTU09 configuration
IfxEray_Eray_Gtu10Config	GTU10 configuration
IfxEray_Eray_Gtu11Config	GTU11 configuration
IfxEray_Eray_GTUConfig	Gloabl Timing Unit configuration structure
IfxEray_Eray_Interrupt	Interrupt control properties
IfxEray_Eray_MessageRAMConfig	Message RAM configuration structure
IfxEray_Eray_NodeA	Pins configuration structure for Node A
IfxEray_Eray_NodeB	Pins configuration structure for Node B
IfxEray_Eray_NodeConfig	Node configuration structure
IfxEray_Eray_Pins	Pins configuration structure
IfxEray_Eray_Prtc1Control	Protocol operation control properties
IfxEray_Eray_Prtc2Control	Wakeup symbol control properties
IfxEray_Eray_ReceiveControl	Receive control properties structure
IfxEray_Eray_ReceivedFrame	Received Frame
IfxEray_Eray_Succ1Config	Communication controller control properties
IfxEray_Eray_Succ2Config	Communication listen timeout properties
IfxEray_Eray_Succ3Config	Clock correction fail properties
IfxEray_Eray_TransmitControl	Transfer control in a slot
IfxEray_Header	Header section in a frame
IfxEray_ReceivedHeader	Received header in a frame
IfxEray_Rxd_In	RXD pin mapping structure
IfxEray_SlotConfig	Transmit control structure
IfxEray_Txd_Out	TXD pin mapping structure
IfxEray_Txen_Out	TXEN pin mapping structure
IfxEth	ETH driver structure
IfxEth_AltRxDescr0_Bits	Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
IfxEth_AltRxDescr1_Bits	Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
IfxEth_AltTxDescr0_Bits	Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
IfxEth_AltTxDescr1_Bits	Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
IfxEth_Col_In	COL pin mapping structure
IfxEth_Config	ETH configuration structure
IfxEth_Crs_In	CRS pin mapping structure
IfxEth_Crsdv_In	CRSDV pin mapping structure
IfxEth_Mdc_Out	MDC pin mapping structure
IfxEth_Mdio_InOut	MDIO pin mapping structure
IfxEth_MiiPins	Port pins for MII mode configuration
IfxEth_Refclk_In	REFCLK pin mapping structure
IfxEth_RmiiPins	Port pins for RMII mode configuration
IfxEth_Rxclk_In	RXCLK pin mapping structure
IfxEth_Rxd_In	RXD pin mapping structure
IfxEth_RxDescr	Normal RX descriptor
IfxEth_RxDescr0	Union for RX descriptor DWORD 0
IfxEth_RxDescr0_Bits	Structure for RX descriptor DWORD 0 Bit field access
IfxEth_RxDescr1	Union for RX descriptor DWORD 1
IfxEth_RxDescr1_Bits	Structure for RX descriptor DWORD 1 Bit field access
IfxEth_RxDescr2	Union for RX descriptor DWORD 2
IfxEth_RxDescr3	Union for RX descriptor DWORD 3
IfxEth_RxDescrList
IfxEth_Rxdv_In	RXDV pin mapping structure
IfxEth_Rxer_In	RXER pin mapping structure
IfxEth_Txclk_In	TXCLK pin mapping structure
IfxEth_Txd_Out	TXD pin mapping structure
IfxEth_TxDescr	Normal TX descriptor
IfxEth_TxDescr0	Union for TX descriptor DWORD 0
IfxEth_TxDescr0_Bits	Structure for TX descriptor DWORD 0 Bit field access
IfxEth_TxDescr1	Union for TX descriptor DWORD 1
IfxEth_TxDescr1_Bits	Structure for TX descriptor DWORD 1 Bit field access
IfxEth_TxDescr2	Union for TX descriptor DWORD 2
IfxEth_TxDescr3	Union for TX descriptor DWORD 3
IfxEth_TxDescrList
IfxEth_Txen_Out	TXEN pin mapping structure
IfxEth_Txer_Out	TXER pin mapping structure
IfxFce_Crc	FCE Module Handle
IfxFce_Crc_Config	Configuration structure of the module
IfxFce_Crc_Crc	Specifies the pointer to FCE module handler
IfxFce_Crc_CrcConfig	Specifies the module configuration structure
IfxFce_Crc_EnabledInterrupts	Specifies the interrupt enable structure
IfxFlash_ErrorTracking_Address	Error tracking address structure
IfxFlash_flashSector	Start and end address of sectors
IfxGpt12_Capin_In	CAPIN pin mapping structure
IfxGpt12_IncrEnc	Incremental encoder object
IfxGpt12_IncrEnc_Config	Configuration structure for GPT12
IfxGpt12_TxEud_In	TxEUD pin mapping structure
IfxGpt12_TxIn_In	TxIN pin mapping structure
IfxGpt12_TxOut_Out	TxOUT pin mapping structure
IfxGtm_Atom_Pwm_Config	Configuration structure
IfxGtm_Atom_Pwm_Driver	Driver Handle
IfxGtm_Atom_Pwm_Interrupt	Configuration structure for interrupts
IfxGtm_Atom_Pwm_pin	Configuration structure for output pin
IfxGtm_Atom_PwmHl_Base	Multi-channels PWM object definition (channels only)
IfxGtm_Atom_PwmHl_Config	GTM ATOM: PWM HL configuration
IfxGtm_Atom_PwmHl_Mode	Structure for PWM configuration
IfxGtm_Atom_PwmHl_s	GTM ATOM PWM driver
IfxGtm_Atom_Timer	TOM Timer interface
IfxGtm_Atom_Timer_Base	Structure for the timer base
IfxGtm_Atom_Timer_Config	Configuration structure for TOM Timer
IfxGtm_Atom_ToutMap	ATOM TOUT pin mapping structure
IfxGtm_Clk_Out	GTM Clock Output
IfxGtm_Tim_TinMap	TIN pin mapping structure
IfxGtm_Tom_Pwm_Config	Configuration structure
IfxGtm_Tom_Pwm_Driver	Driver Handle
IfxGtm_Tom_Pwm_Interrupt	Configuration structure for interrupts
IfxGtm_Tom_Pwm_pin	Configuration structure for output pin
IfxGtm_Tom_PwmHl_Base	Multi-channels PWM object definition (channels only)
IfxGtm_Tom_PwmHl_Config	GTM TOM: PWM HL configuration
IfxGtm_Tom_PwmHl_Mode	Structure for PWM configuration
IfxGtm_Tom_PwmHl_s	GTM TOM PWM driver
IfxGtm_Tom_TGC	TOM TGC objects
IfxGtm_Tom_Timer	TOM Timer interface Handle
IfxGtm_Tom_Timer_Base	Structure for the timer base
IfxGtm_Tom_Timer_Config	Configuration structure for TOM Timer
IfxGtm_Tom_ToutMap	TOM TOUT pin mapping structure
IfxGtm_Trig_AdcTrig_Table
IfxGtm_Trig_Channel
IfxGtm_Trig_Source
IfxGtm_Trig_Trigger
IfxHssl_Hsct	HSCT module handle
IfxHssl_Hsct_Config	Configuration structure of the HSCT module
IfxHssl_Hssl	HSSL Handle
IfxHssl_Hssl_AccessWindow	Structure for access windows
IfxHssl_Hssl_Channel	Channel handle
IfxHssl_Hssl_ChannelConfig	Configuration structure for channel
IfxHssl_Hssl_Config	Configuration structure of the HSSL module
IfxHssl_Hssl_errorFlags	Structure for error flags
IfxI2c_I2c	Handler
IfxI2c_I2c_Config	Structure to configure the Module
IfxI2c_I2c_Device	Structure with slave device data
IfxI2c_I2c_deviceConfig	Structure to configure the device's data structure
IfxI2c_Pins	Pin Structure
IfxI2c_Scl_InOut	SCL input mapping structure
IfxI2c_Sda_InOut	SDA input mapping structure
IfxIom_Iom	Specifies handle to IOM module
IfxIom_Iom_EcmConfig	Specifies the ECM block configuration structure
IfxIom_Iom_EcmConfigCounter
IfxIom_Iom_EcmGlobalEventSelection	Event Combiner Module Global Event Selection
IfxIom_Iom_EcmGlobalEventSelectionBits	Event Combiner Module Global Event Selection Bit Field
IfxIom_Iom_FpcConfig	Specifies Filter and Prescaler Cell configuration
IfxIom_Iom_LamConfig	Specifies Logic Analyser Module configuration
IfxModule_IndexMap	Module address and index map
IfxMsc_En_Out	EN pin mapping structure
IfxMsc_Fcln_Out	FCLN pin mapping structure
IfxMsc_Fclp_Out	FCLP pin mapping structure
IfxMsc_Inj_In	INJ pin mapping structure
IfxMsc_Msc	MSC base address data Structure
IfxMsc_Msc_Abra	ABRA block Configuration Structure
IfxMsc_Msc_Clock	Clock configuration data Structure
IfxMsc_Msc_Config	MSC Module Configuration Structure
IfxMsc_Msc_DownstreamControlConfig	Downstream Control Configuration Structure
IfxMsc_Msc_DownstreamControlExtensionConfig	Downstream Control Extension Configuration Structure
IfxMsc_Msc_en
IfxMsc_Msc_fcln
IfxMsc_Msc_fclp
IfxMsc_Msc_inj0
IfxMsc_Msc_inj1
IfxMsc_Msc_InterruptConfig	Interrupt Configuration Structure
IfxMsc_Msc_Io	MSC Pin Configuration Structure
IfxMsc_Msc_OutputControlConfig	Output Control Configuration Structure
IfxMsc_Msc_sdi
IfxMsc_Msc_son
IfxMsc_Msc_sop
IfxMsc_Msc_UpstreamStatusConfig	Upstream Control Configuration Structure
IfxMsc_Sdi_In	SDI pin mapping structure
IfxMsc_Son_Out	SON pin mapping structure
IfxMsc_Sop_Out	SOP pin mapping structure
IfxMtu_SramItem	Describes physical parameters of a SRAM memory
IfxMultican_Can	CAN handle data structure
IfxMultican_Can_Config	CAN module configuration
IfxMultican_Can_FdConfig	Structure for CAN FD configuration
IfxMultican_Can_GatewayConfig	Structure for gateway configuration
IfxMultican_Can_InterruptConfig	Structure for interrupt configuration
IfxMultican_Can_InterruptSource	Structure for interrupt source
IfxMultican_Can_MsgObj	CAN message object handle data structure
IfxMultican_Can_MsgObjConfig	CAN message object configuration
IfxMultican_Can_MsgObjControl	Message object control
IfxMultican_Can_Node	CAN node handle data structure
IfxMultican_Can_NodeConfig	CAN Node configuration
IfxMultican_Message	CAN message definition
IfxMultican_MsgObjStat	Message object status bit-fields
IfxMultican_Rxd_In	RXD pin mapping structure
IfxMultican_Txd_Out	TXD pin mapping structure
IfxPort_Esr_Masks	Used by IfxPort_Esr_Masks table
IfxPort_Io_Config
IfxPort_Io_ConfigPin
IfxPort_Pin	Defines a pin
IfxPort_Pin_Config	To configure pins
IfxPsi5_Psi5	PSI5 handle data structure
IfxPsi5_Psi5_Channel	Channel handle data structure
IfxPsi5_Psi5_ChannelConfig	Channel configuration structure
IfxPsi5_Psi5_ChannelTrigger	Channel trigger configuration structure
IfxPsi5_Psi5_Clock	Clock configuration data structure
IfxPsi5_Psi5_Config	PSI5 module configuration structure
IfxPsi5_Psi5_Frame	Psi5 frame data union
IfxPsi5_Psi5_FrameData	Psi5 frame data structure with individual members
IfxPsi5_Psi5_InputOutputControl	Input output configuration structure
IfxPsi5_Psi5_Message	Psi5 serial message with individual members
IfxPsi5_Psi5_PinsConfig	Pin Configuration structure
IfxPsi5_Psi5_PulseGeneration	Sync pulse generation configuration structure
IfxPsi5_Psi5_Rdm	Psi5 frame in double word format
IfxPsi5_Psi5_Rds	Psi5 serial message as unsigned 32 bit value
IfxPsi5_Psi5_ReceiveControl	Receive control configuration structure
IfxPsi5_Psi5_SerialMessage	Psi5 serial message data structure
IfxPsi5_Psi5_StartupOptions	Startup related options TBD
IfxPsi5_Psi5_TimeStampConfig	Timestamp configuration data structure
IfxPsi5_Psi5_TransmitControl	Transmit control configuration structure
IfxPsi5_Rx_In	RX pin mapping structure
IfxPsi5_Tx_Out	TX pin mapping structure
IfxPsi5s_Clk_Out	CLK pin mapping structure
IfxPsi5s_Psi5s	PSI5S handle data structure
IfxPsi5s_Psi5s_AscConfig	PSI5S module configuration structure
IfxPsi5s_Psi5s_Channel	Channel handle data structure
IfxPsi5s_Psi5s_ChannelConfig	Channel configuration structure
IfxPsi5s_Psi5s_ChannelTrigger	Channel trigger configuration structure
IfxPsi5s_Psi5s_Clock	Clock configuration data structure
IfxPsi5s_Psi5s_Config	PSI5S module configuration structure
IfxPsi5s_Psi5s_Frame	Psi5s frame data structure
IfxPsi5s_Psi5s_GlobalControlConfig	PSI5S global control configuration structure
IfxPsi5s_Psi5s_Pins	Structure for PSI5S pin configuration
IfxPsi5s_Psi5s_PulseGeneration	Sync pulse generation configuration structure
IfxPsi5s_Psi5s_ReceiveControl	Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
IfxPsi5s_Psi5s_ReceiveData	"Received data" data structure
IfxPsi5s_Psi5s_ReceivedBits	Received individual bits
IfxPsi5s_Psi5s_ReceivedData	Receive data structure with different segments of data
IfxPsi5s_Psi5s_ReceiveStatus	Receiver status data structure
IfxPsi5s_Psi5s_ReceiveTimestamp	Receiver timestamp data structure
IfxPsi5s_Psi5s_Timestamp	Received timestamp contents structure
IfxPsi5s_Psi5s_TimeStampConfig	Timestamp configuration data structure
IfxPsi5s_Psi5s_TransmitControl	Transmit control configuration structure
IfxPsi5s_Rx_In	RX pin mapping structure
IfxPsi5s_Tx_Out	TX pin mapping structure
IfxQspi_Hsicin_In	HSICIN pin mapping structure
IfxQspi_Mrst_In	MRST pin mapping structure
IfxQspi_Mrst_Out	MRST pin mapping structure
IfxQspi_Mtsr_In	MTSR pin mapping structure
IfxQspi_Mtsr_Out	MTSR pin mapping structure
IfxQspi_Sclk_In	SCLK pin mapping structure
IfxQspi_Sclk_Out	SCLK pin mapping structure
IfxQspi_Slsi_In	SLSI pin mapping structure
IfxQspi_Slso_Out	SLSO pin mapping structure
IfxQspi_SpiMaster	Module handle data structure
IfxQspi_SpiMaster_Channel_s	Module Channel handle structure
IfxQspi_SpiMaster_ChannelConfig	Module Channel configuration structure
IfxQspi_SpiMaster_Config	Module configuration structure
IfxQspi_SpiMaster_Dma	Dma handle
IfxQspi_SpiMaster_DmaConfig	Dma configuration
IfxQspi_SpiMaster_ErrorFlags	Qspi Master Mode Error Flags
IfxQspi_SpiMaster_Input	SLSI pin configuration structure
IfxQspi_SpiMaster_InputOutput	Union of Slave Select pins
IfxQspi_SpiMaster_Output	SLSO pin configuration structure
IfxQspi_SpiMaster_Pins	Master pin IO configuration structure
IfxQspi_SpiSlave	Module handle data structure
IfxQspi_SpiSlave_Config	Module configuration structure
IfxQspi_SpiSlave_Dma	Dma handle
IfxQspi_SpiSlave_DmaConfig	Dma configuration
IfxQspi_SpiSlave_ErrorFlags	Qspi Slave Mode Error Flags
IfxQspi_SpiSlave_Pins	Slave pin IO configuration structure
IfxQspi_SpiSlave_Protocol	Configures the SPI Protocol
IfxScu_Dcdcsync_Out	DCDC Sync pin mapping structure
IfxScu_Emgstop_In	Emergency Stop pin mapping structure
IfxScu_Evrwup_In	EVR Wakeup pin mapping structure
IfxScu_Extclk_Out	External Clock pin mapping structure
IfxScu_Hwcfg_In	Hardware Configuration pin mapping structure
IfxScu_Req_In	External Request pin mapping structure
IfxScu_Wdtlck_Out	Watchdog Timer Lock pin mapping structure
IfxScuCcu_CcuconRegConfig	Configuration structure type for CCUCON registers
IfxScuCcu_ClockDistributionConfig	Configuration structure type for all the CCUCON registers to configure clock distribution
IfxScuCcu_Config	Configuration structure SCU module
IfxScuCcu_ErayPllConfig	Configuration structure for E-ray PLL
IfxScuCcu_FlashWaitstateConfig	Configuration structure type for the Flash waitstate configuration
IfxScuCcu_InitialStepConfig	Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step
IfxScuCcu_PllStepsConfig	Configuration structure type for the Pll Steps for current jump control
IfxScuCcu_SysPllConfig	Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers
IfxScuWdt_Config	Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file
IfxSent_Sent	Specifies SENT handle structure
IfxSent_Sent_Channel	Specifies the SENT Channel handle structure
IfxSent_Sent_ChannelConfig	Specifies the SENT Channel configuration structure
IfxSent_Sent_Config	Specifies the SENT module configuration structure
IfxSent_Sent_Enable	Specifies the Interrupt type enables structure
IfxSent_Sent_EnabledInterrupts	Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member
IfxSent_Sent_Frame	Specifies the frame configuration structure for a channel
IfxSent_Sent_In	SENT pin mapping structure
IfxSent_Sent_InputOutputControl	Specifies the input output control properties
IfxSent_Sent_Interrupt	Specifies the interrupt control properties
IfxSent_Sent_InterruptNodeControl	Specifies the interrupt control properties structure
IfxSent_Sent_NibbleControl	Specifies the received nibbles control properties
IfxSent_Sent_Pins	Specifies the pins configuration for SENT channel
IfxSent_Sent_ReceiveControl	Specifies the receive control properties
IfxSent_Sent_SerialMessageFrame	Specifies received message frame
IfxSent_Sent_TransmitControl	Specifies the SPC channel properties structure
IfxSent_Spc_Out	SPC pin mapping structure
IfxSmu_Fsp_Out	Fault Signal Protocol Pin
IfxStdIf_DPipe_	Standard interface object
IfxStdIf_Pos_	Standard interface object
IfxStdIf_Pos_Config	Position interface configuration
IfxStdIf_Pos_Status	Position sensor status definition
IfxStdIf_Pos_Status.B
IfxStdIf_PwmHl_	Standard interface object
IfxStdIf_PwmHl_Config	Multi-channels PWM object configuration
IfxStdIf_Timer_	Standard interface object
IfxStdIf_Timer_Config	Timer configuration
IfxStdIf_Timer_TrigConfig	Trigger configuration
IfxStm_CompareConfig	Comparator Configuration Structure
IfxVadc_Adc	VADC handle data structure
IfxVadc_Adc_ArbiterConfig	Arbiter configuration structure
IfxVadc_Adc_BackgroundScanConfig	Background scan mode configuration structure
IfxVadc_Adc_Channel	Channel handle data structure
IfxVadc_Adc_ChannelConfig	Channel configuration structure
IfxVadc_Adc_ClassConfig	Input class configuration structure
IfxVadc_Adc_Config	VADC module configuration structure
IfxVadc_Adc_EmuxControl	Emux Control Structure
IfxVadc_Adc_EmuxPinConfig
IfxVadc_Adc_GatingTriggerConfig	Gating/Trigger configuration structure
IfxVadc_Adc_Group	Group handle data structure
IfxVadc_Adc_GroupConfig	Group configuration structure
IfxVadc_Adc_QueueConfig	Queue configuration structure
IfxVadc_Adc_ScanConfig	Scan mode configuration structure
IfxVadc_Emux_Out	VADC External Mux pin mapping structure
IfxVadc_GxBfl_Out	VADC Boundary Flag pin mapping structure
IfxVadc_Vadcg_In	VADC Analog Input
PwmHl_Config	Configuration structure of the TPwm interface
PwmHl_Functions
PwmHl_s	Structure of the TPwm interface
Spi_ErrorChecks
SpiIf_
SpiIf_Ch_
SpiIf_ChConfig_
SpiIf_ChMode
SpiIf_Config
SpiIf_Flags
SpiIf_funcs
SpiIf_Job
Timer_Config	Configuration structure of the Timer interface
Timer_Functions
Timer_s	Structure of the Timer interface
TPwm_Config	Configuration structure of the TPwm interface
TPwm_Functions
TPwm_s	Structure of the TPwm interface