IfxMtu_cfg.h File Reference

Mtu on-chip implementation data. More...

#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxMtu_reg.h"
#include "IfxMc_reg.h"

Go to the source code of this file.

Data Structures
struct	IfxMtu_SramItem
	Describes physical parameters of a SRAM memory. More...

Macros
#define	IFXMTU_MC_ADDRESS_BASE   (0xF0061000u)
	Base address of first MBIST Control Block. More...
#define	IFXMTU_NUM_MBIST_TABLE_ITEMS   (84)
	Number of MBIST Table items. More...
#define	IFXMTU_MAX_TRACKED_ADDRESSES   (5)
	Maximum number of tracked SRAM addresses (ETTR) More...

Enumerations
enum	IfxMtu_MbistSel {   IfxMtu_MbistSel_none = -1,   IfxMtu_MbistSel_cpu2Dspr = 0,   IfxMtu_MbistSel_cpu2Dtag = 2,   IfxMtu_MbistSel_cpu2Pspr = 3,   IfxMtu_MbistSel_cpu2Ptag = 5,   IfxMtu_MbistSel_cpu1Dspr = 6,   IfxMtu_MbistSel_cpu1Dtag = 8,   IfxMtu_MbistSel_cpu1Pspr = 9,   IfxMtu_MbistSel_cpu1Ptag = 11,   IfxMtu_MbistSel_cpu0Dspr = 14,   IfxMtu_MbistSel_cpu0Pspr = 16,   IfxMtu_MbistSel_cpu0Ptag = 17,   IfxMtu_MbistSel_ethermac = 22,   IfxMtu_MbistSel_mod1 = 23,   IfxMtu_MbistSel_mod2 = 24,   IfxMtu_MbistSel_mod3 = 25,   IfxMtu_MbistSel_mod4 = 26,   IfxMtu_MbistSel_gtmFifo = 28,   IfxMtu_MbistSel_gtmMcs0 = 29,   IfxMtu_MbistSel_gtmMcs1 = 30,   IfxMtu_MbistSel_gtmDpll1a = 31,   IfxMtu_MbistSel_gtmDpll1b = 32,   IfxMtu_MbistSel_gtmDpll2 = 33,   IfxMtu_MbistSel_psi5 = 34,   IfxMtu_MbistSel_mcan = 36,   IfxMtu_MbistSel_erayObf = 38,   IfxMtu_MbistSel_erayIbfTbf = 39,   IfxMtu_MbistSel_erayMbf = 40,   IfxMtu_MbistSel_mcds = 45,   IfxMtu_MbistSel_emem0 = 46,   IfxMtu_MbistSel_emem1 = 47,   IfxMtu_MbistSel_emem2 = 48,   IfxMtu_MbistSel_emem3 = 49,   IfxMtu_MbistSel_emem4 = 50,   IfxMtu_MbistSel_emem5 = 51,   IfxMtu_MbistSel_emem6 = 52,   IfxMtu_MbistSel_emem7 = 53,   IfxMtu_MbistSel_emem8 = 54,   IfxMtu_MbistSel_emem9 = 55,   IfxMtu_MbistSel_emem10 = 56,   IfxMtu_MbistSel_emem11 = 57,   IfxMtu_MbistSel_emem12 = 58,   IfxMtu_MbistSel_emem13 = 59,   IfxMtu_MbistSel_emem14 = 60,   IfxMtu_MbistSel_emem15 = 61,   IfxMtu_MbistSel_cifJpeg1_4 = 78,   IfxMtu_MbistSel_lmu = 79,   IfxMtu_MbistSel_cifJpeg3 = 80,   IfxMtu_MbistSel_cifCif = 81,   IfxMtu_MbistSel_dma = 83 }
	MBIST Selection. More...

Variables
IFX_EXTERN const IfxMtu_SramItem	IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version

iLLD_1_0_0_11_0

Copyright

Copyright (c) 2015 Infineon Technologies AG. All rights reserved.

                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMtu_cfg.h.

---

Data Structure Documentation

struct IfxMtu_SramItem

Describes physical parameters of a SRAM memory.

Definition at line 126 of file IfxMtu_cfg.h.

Data Fields
uint16	dataSize	Data Size of each memory block.
uint8	eccInvPos0	First ECC bit which needs to be inverted.
uint8	eccInvPos1	Second ECC bit which needs to be inverted.
uint8	eccSize	ECC Size of each memory block.
uint32	mbistDelay	Mbist Delay.
uint8	numBlocks	number of SRAM blocks

Macro Definition Documentation

#define IFXMTU_MAX_TRACKED_ADDRESSES   (5)

Maximum number of tracked SRAM addresses (ETTR)

Definition at line 58 of file IfxMtu_cfg.h.

Referenced by IfxMtu_getTrackedSramAddresses().

#define IFXMTU_MC_ADDRESS_BASE   (0xF0061000u)

Base address of first MBIST Control Block.

Definition at line 50 of file IfxMtu_cfg.h.

Referenced by IfxMtu_clearErrorTracking(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_enableErrorTracking(), IfxMtu_getTrackedSramAddresses(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMtu_isMbistDone(), IfxMtu_readSramAddress(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

#define IFXMTU_NUM_MBIST_TABLE_ITEMS   (84)

Number of MBIST Table items.

Definition at line 54 of file IfxMtu_cfg.h.

Referenced by IfxMtu_clearSramStart().

Enumeration Type Documentation

enum IfxMtu_MbistSel

MBIST Selection.

Enumerator
IfxMtu_MbistSel_none
IfxMtu_MbistSel_cpu2Dspr
IfxMtu_MbistSel_cpu2Dtag
IfxMtu_MbistSel_cpu2Pspr
IfxMtu_MbistSel_cpu2Ptag
IfxMtu_MbistSel_cpu1Dspr
IfxMtu_MbistSel_cpu1Dtag
IfxMtu_MbistSel_cpu1Pspr
IfxMtu_MbistSel_cpu1Ptag
IfxMtu_MbistSel_cpu0Dspr
IfxMtu_MbistSel_cpu0Pspr
IfxMtu_MbistSel_cpu0Ptag
IfxMtu_MbistSel_ethermac
IfxMtu_MbistSel_mod1
IfxMtu_MbistSel_mod2
IfxMtu_MbistSel_mod3
IfxMtu_MbistSel_mod4
IfxMtu_MbistSel_gtmFifo
IfxMtu_MbistSel_gtmMcs0
IfxMtu_MbistSel_gtmMcs1
IfxMtu_MbistSel_gtmDpll1a
IfxMtu_MbistSel_gtmDpll1b
IfxMtu_MbistSel_gtmDpll2
IfxMtu_MbistSel_psi5
IfxMtu_MbistSel_mcan
IfxMtu_MbistSel_erayObf
IfxMtu_MbistSel_erayIbfTbf
IfxMtu_MbistSel_erayMbf
IfxMtu_MbistSel_mcds
IfxMtu_MbistSel_emem0
IfxMtu_MbistSel_emem1
IfxMtu_MbistSel_emem2
IfxMtu_MbistSel_emem3
IfxMtu_MbistSel_emem4
IfxMtu_MbistSel_emem5
IfxMtu_MbistSel_emem6
IfxMtu_MbistSel_emem7
IfxMtu_MbistSel_emem8
IfxMtu_MbistSel_emem9
IfxMtu_MbistSel_emem10
IfxMtu_MbistSel_emem11
IfxMtu_MbistSel_emem12
IfxMtu_MbistSel_emem13
IfxMtu_MbistSel_emem14
IfxMtu_MbistSel_emem15
IfxMtu_MbistSel_cifJpeg1_4
IfxMtu_MbistSel_lmu
IfxMtu_MbistSel_cifJpeg3
IfxMtu_MbistSel_cifCif
IfxMtu_MbistSel_dma

Definition at line 66 of file IfxMtu_cfg.h.

Variable Documentation

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 140 of file IfxMtu_cfg.h.