- Generated by
1.8.4
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iLLD_TC27xD
1.0
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PSI5S on-chip implementation data. More...
Go to the source code of this file.
Macros | |
| #define | IFXPSI5S_NUM_CHANNELS 8 |
| #define | IFXPSI5S_STEP_RANGE 1024 |
| #define | IFXPSI5S_NUM_WDTS 7 |
| #define | IFXPSI5S_NUM_SLOTS 6 |
| #define | IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8) |
| #define | IFXPSI5S_ENABLE_CHANNEL (1 << 16) |
| #define | IFXPSI5S_BG_RANGE 8192 |
| #define | IFXPSI5S_FDV_RANGE 2048 |
| #define | IFXPSI5S_BAUDRATE_1562500 1562500 |
| #define | IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16 |
| //0x00FF0000 More... | |
| #define | IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8 |
| #define | IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000 |
| #define | IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000 |
| #define | IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000 |
PSI5S on-chip implementation data.
IMPORTANT NOTICE
Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Definition in file IfxPsi5s_cfg.h.
| #define IFXPSI5S_BAUDRATE_1562500 1562500 |
Definition at line 59 of file IfxPsi5s_cfg.h.
Referenced by IfxPsi5s_Psi5s_initModuleConfig().
| #define IFXPSI5S_BG_RANGE 8192 |
Definition at line 55 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000 |
Definition at line 69 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000 |
Definition at line 67 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000 |
Definition at line 71 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_ENABLE_CHANNEL (1 << 16) |
Definition at line 53 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8) |
Definition at line 51 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_FDV_RANGE 2048 |
Definition at line 57 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8 |
Definition at line 65 of file IfxPsi5s_cfg.h.
Referenced by IfxPsi5s_enableDisableChannelTriggerCounters().
| #define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16 |
//0x00FF0000
Definition at line 63 of file IfxPsi5s_cfg.h.
Referenced by IfxPsi5s_enableDisableChannels().
| #define IFXPSI5S_NUM_CHANNELS 8 |
Definition at line 43 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_NUM_SLOTS 6 |
Definition at line 49 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_NUM_WDTS 7 |
Definition at line 47 of file IfxPsi5s_cfg.h.
| #define IFXPSI5S_STEP_RANGE 1024 |
Definition at line 45 of file IfxPsi5s_cfg.h.
1.8.4