iLLD_TC27xD  1.0
IfxPsi5s_cfg.h
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1 /**
2  * \file IfxPsi5s_cfg.h
3  * \brief PSI5S on-chip implementation data
4  * \ingroup IfxLld_Psi5s
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Psi5s PSI5S
25  * \ingroup IfxLld
26  * \defgroup IfxLld_Psi5s_Impl Implementation
27  * \ingroup IfxLld_Psi5s
28  * \defgroup IfxLld_Psi5s_Std Standard Driver
29  * \ingroup IfxLld_Psi5s
30  */
31 
32 #ifndef IFXPSI5S_CFG_H
33 #define IFXPSI5S_CFG_H 1
34 
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38 
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42 
43 #define IFXPSI5S_NUM_CHANNELS 8
44 
45 #define IFXPSI5S_STEP_RANGE 1024
46 
47 #define IFXPSI5S_NUM_WDTS 7
48 
49 #define IFXPSI5S_NUM_SLOTS 6
50 
51 #define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
52 
53 #define IFXPSI5S_ENABLE_CHANNEL (1 << 16)
54 
55 #define IFXPSI5S_BG_RANGE 8192
56 
57 #define IFXPSI5S_FDV_RANGE 2048
58 
59 #define IFXPSI5S_BAUDRATE_1562500 1562500
60 
61 /** \brief //0x00FF0000
62  */
63 #define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
64 
65  #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
66 
67  #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
68 
69  #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
70 
71  #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
72 
73 #endif /* IFXPSI5S_CFG_H */