|
enum | IfxEbu_ChipSelect {
IfxEbu_ChipSelect_0,
IfxEbu_ChipSelect_1,
IfxEbu_ChipSelect_2
} |
|
enum | IfxEbu_ExternalClockRatio {
IfxEbu_ExternalClockRatio_1,
IfxEbu_ExternalClockRatio_2,
IfxEbu_ExternalClockRatio_3,
IfxEbu_ExternalClockRatio_4,
IfxEbu_ExternalClockRatio_6,
IfxEbu_ExternalClockRatio_8
} |
|
enum | IfxEbu_AlternateSegmentCompare {
IfxEbu_AlternateSegmentCompare_disabled = 0,
IfxEbu_AlternateSegmentCompare_enabled = 1
} |
|
enum | IfxEbu_ArbitrationSignalSynchronization {
IfxEbu_ArbitrationSignalSynchronization_synchronous = 0,
IfxEbu_ArbitrationSignalSynchronization_asynchronous = 1
} |
|
enum | IfxEbu_ByteControl {
IfxEbu_ByteControl_byteControlFollowingChipSelect = 0,
IfxEbu_ByteControl_bytecontrolFollowingControlSignal = 1,
IfxEbu_ByteControl_byteControlFollowingWriteEnable = 2,
IfxEbu_ByteControl_sdramAccessDQM = 3
} |
|
enum | IfxEbu_ByteControlEnable {
IfxEbu_ByteControlEnable_byteControlOff = 0,
IfxEbu_ByteControlEnable_byteControl8Bit = 1,
IfxEbu_ByteControlEnable_byteControl16Bit = 2,
IfxEbu_ByteControlEnable_byteControl32Bit = 3
} |
|
enum | IfxEbu_CASLatency {
IfxEbu_CASLatency_Latency2 = 2,
IfxEbu_CASLatency_Latency3 = 3
} |
|
enum | IfxEbu_ClockDivideRatio {
IfxEbu_ClockDivideRatio_0 = 0,
IfxEbu_ClockDivideRatio_1,
IfxEbu_ClockDivideRatio_2,
IfxEbu_ClockDivideRatio_3
} |
|
enum | IfxEbu_ClockSource {
IfxEbu_ClockSource_asynchronous = 0,
IfxEbu_ClockSource_synchronous = 1
} |
|
enum | IfxEbu_ColumnAddressWidth {
IfxEbu_ColumnAddressWidth_1 = 1,
IfxEbu_ColumnAddressWidth_2 = 2,
IfxEbu_ColumnAddressWidth_3 = 3
} |
|
enum | IfxEbu_DelayOnPowerDownExit {
IfxEbu_DelayOnPowerDownExit_0,
IfxEbu_DelayOnPowerDownExit_1,
IfxEbu_DelayOnPowerDownExit_2,
IfxEbu_DelayOnPowerDownExit_3,
IfxEbu_DelayOnPowerDownExit_4,
IfxEbu_DelayOnPowerDownExit_5,
IfxEbu_DelayOnPowerDownExit_6,
IfxEbu_DelayOnPowerDownExit_7
} |
|
enum | IfxEbu_DeviceType {
IfxEbu_DeviceType_muxedAsynchronousType = 0,
IfxEbu_DeviceType_muxedBurstType = 1,
IfxEbu_DeviceType_nandFlash = 2,
IfxEbu_DeviceType_muxedCellularRam = 3,
IfxEbu_DeviceType_demuxedAsynchronousType = 4,
IfxEbu_DeviceType_demuxedBurstType = 5,
IfxEbu_DeviceType_demuxedPageMode = 6,
IfxEbu_DeviceType_demuxedCellularRam = 7,
IfxEbu_DeviceType_sdram = 8
} |
|
enum | IfxEbu_ExtendedData {
IfxEbu_ExtendedData_0,
IfxEbu_ExtendedData_1,
IfxEbu_ExtendedData_2,
IfxEbu_ExtendedData_3
} |
|
enum | IfxEbu_ExtendedOperationBankSelect {
IfxEbu_ExtendedOperationBankSelect_0,
IfxEbu_ExtendedOperationBankSelect_1,
IfxEbu_ExtendedOperationBankSelect_2,
IfxEbu_ExtendedOperationBankSelect_3
} |
|
enum | IfxEbu_ExtendedRefresh {
IfxEbu_ExtendedRefresh_0,
IfxEbu_ExtendedRefresh_1,
IfxEbu_ExtendedRefresh_2,
IfxEbu_ExtendedRefresh_3
} |
|
enum | IfxEbu_ExternalBusMode {
IfxEbu_ExternalBusMode_noBus = 0,
IfxEbu_ExternalBusMode_arbiter = 1,
IfxEbu_ExternalBusMode_participant = 2,
IfxEbu_ExternalBusMode_soleMaster = 3
} |
|
enum | IfxEbu_ExternalDeviceInterface {
IfxEbu_ExternalDeviceInterface_8bitMultiplexed = 0,
IfxEbu_ExternalDeviceInterface_16bitMultiplexed = 1,
IfxEbu_ExternalDeviceInterface_twin16bitMultiplexed = 2,
IfxEbu_ExternalDeviceInterface_32bitMultiplexed = 3
} |
|
enum | IfxEbu_ExternalMemoryWriteProtect {
IfxEbu_ExternalMemoryWriteProtect_disabled = 0,
IfxEbu_ExternalMemoryWriteProtect_enabled = 1
} |
|
enum | IfxEbu_MaskForBankTag {
IfxEbu_MaskForBankTag_1 = 1,
IfxEbu_MaskForBankTag_2 = 2,
IfxEbu_MaskForBankTag_3 = 3,
IfxEbu_MaskForBankTag_4 = 4,
IfxEbu_MaskForBankTag_5 = 5,
IfxEbu_MaskForBankTag_6 = 6
} |
|
enum | IfxEbu_MemoryRegionMask {
IfxEbu_MemoryRegionMask_0,
IfxEbu_MemoryRegionMask_1,
IfxEbu_MemoryRegionMask_2,
IfxEbu_MemoryRegionMask_3,
IfxEbu_MemoryRegionMask_4,
IfxEbu_MemoryRegionMask_5,
IfxEbu_MemoryRegionMask_6,
IfxEbu_MemoryRegionMask_7,
IfxEbu_MemoryRegionMask_8,
IfxEbu_MemoryRegionMask_9,
IfxEbu_MemoryRegionMask_10,
IfxEbu_MemoryRegionMask_11,
IfxEbu_MemoryRegionMask_12,
IfxEbu_MemoryRegionMask_13,
IfxEbu_MemoryRegionMask_14,
IfxEbu_MemoryRegionMask_15
} |
|
enum | IfxEbu_ModeRegisterSetupTime {
IfxEbu_ModeRegisterSetupTime_0,
IfxEbu_ModeRegisterSetupTime_1,
IfxEbu_ModeRegisterSetupTime_2,
IfxEbu_ModeRegisterSetupTime_3
} |
|
enum | IfxEbu_PowerSaveMode {
IfxEbu_PowerSaveMode_0,
IfxEbu_PowerSaveMode_1,
IfxEbu_PowerSaveMode_2,
IfxEbu_PowerSaveMode_3
} |
|
enum | IfxEbu_RefreshCommands {
IfxEbu_RefreshCommands_0,
IfxEbu_RefreshCommands_1,
IfxEbu_RefreshCommands_2,
IfxEbu_RefreshCommands_3,
IfxEbu_RefreshCommands_4,
IfxEbu_RefreshCommands_5,
IfxEbu_RefreshCommands_6,
IfxEbu_RefreshCommands_7
} |
|
enum | IfxEbu_RowPrechargeTime {
IfxEbu_RowPrechargeTime_0,
IfxEbu_RowPrechargeTime_1,
IfxEbu_RowPrechargeTime_2,
IfxEbu_RowPrechargeTime_3
} |
|
enum | IfxEbu_RowToColumnDelay {
IfxEbu_RowToColumnDelay_0,
IfxEbu_RowToColumnDelay_1,
IfxEbu_RowToColumnDelay_2,
IfxEbu_RowToColumnDelay_3
} |
|
enum | IfxEbu_SDRAMBurstLength {
IfxEbu_SDRAMBurstLength_1 = 0,
IfxEbu_SDRAMBurstLength_2 = 1,
IfxEbu_SDRAMBurstLength_4 = 2,
IfxEbu_SDRAMBurstLength_8 = 3,
IfxEbu_SDRAMBurstLength_16 = 4
} |
|
enum | IfxEbu_SynchronousBurstBuffer {
IfxEbu_SynchronousBurstBuffer_bufferLength = 0,
IfxEbu_SynchronousBurstBuffer_continuous = 1
} |
|
enum | IfxEbu_SynchronousBurstLength {
IfxEbu_SynchronousBurstLength_1 = 0,
IfxEbu_SynchronousBurstLength_2 = 1,
IfxEbu_SynchronousBurstLength_4 = 2,
IfxEbu_SynchronousBurstLength_8 = 3
} |
|
enum | IfxEbu_WaitControl {
IfxEbu_WaitControl_off = 0,
IfxEbu_WaitControl_asynchronous = 1,
IfxEbu_WaitControl_synchronous = 2
} |
|
EBU basic functionality.
- Version
- iLLD_1_0_0_11_0
- Copyright
- Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
IMPORTANT NOTICE
Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Definition in file IfxEbu.h.