iLLD_TC29x  1.0
IfxDsadc.c
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1 /**
2  * \file IfxDsadc.c
3  * \brief DSADC basic functionality
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  */
24 
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28 
29 #include "IfxDsadc.h"
30 
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34 
35 volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
36 {
37  return &(MODULE_SRC.DSADC.DSADC[channel].SRA);
38 }
39 
40 
41 float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
42 {
43  float32 frequency = IfxDsadc_getMainCombOutFreq(dsadc, channel);
44 
45  frequency = frequency / ((float32)1.0 + dsadc->CH[channel].IWCTR.B.NVALINT);
46  Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
47 
48  if (fcfgm.B.FIR0EN != 0)
49  {
50  frequency = frequency / 2;
51  }
52 
53  if (fcfgm.B.FIR1EN != 0)
54  {
55  frequency = frequency / 2;
56  }
57 
58  return frequency;
59 }
60 
61 
62 float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
63 {
64  float32 frequency = IfxDsadc_getModulatorClockFreq(dsadc, channel);
65 
66  return frequency / ((float32)1.0 + dsadc->CH[channel].FCFGC.B.CFMDF);
67 }
68 
69 
70 float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
71 {
72  Ifx_DSADC_CH_FCFGC fcfgc = dsadc->CH[channel].FCFGC;
73  Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
74  Ifx_DSADC_CH_DICFG dicfg = dsadc->CH[channel].DICFG;
75  Ifx_DSADC_CH_IWCTR iwctr = dsadc->CH[channel].IWCTR;
76  float32 tsMod = 1.0 / IfxDsadc_getModulatorClockFreq(dsadc, channel);
77  float32 tsComb = tsMod * (1 + fcfgc.B.CFMDF);
78  float32 tsFir0 = tsComb * (1 + fcfgm.B.FIR0EN);
79  float32 tsFir1 = tsFir0 * (1 + fcfgm.B.FIR1EN);
80 
81  float32 gdDsA = 7 * tsMod;
82  uint32 combN = (1 + fcfgc.B.CFMDF);
83  float32 gdComb = tsMod * ((fcfgc.B.CFMC < 3) ? (0.5 * (fcfgc.B.CFMC + 1) * (float32)combN) : ((float32)combN + 1));
84  float32 gdFir0 = (fcfgm.B.FIR0EN != 0) ? (0.5 * 8 * tsComb) : 0;
85  float32 gdFir1 = (fcfgm.B.FIR1EN != 0) ? (0.5 * 28 * tsFir0) : 0;
86  float32 gdInt = (dicfg.B.ITRMODE == IfxDsadc_IntegratorTrigger_bypassed) ? 0 : (0.5 * (iwctr.B.NVALINT + 1) * tsFir1);
87 
88  return gdDsA + gdComb + gdFir0 + gdFir1 + gdInt;
89 }
90 
91 
92 volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
93 {
94  return &(MODULE_SRC.DSADC.DSADC[channel].SRM);
95 }
96 
97 
98 float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
99 {
100  float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc);
101 
102  return sourceFreq / ((dsadc->CH[channel].MODCFG.B.DIVM + 1) * 2);
103 }
104 
105 
106 float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
107 {
108  float32 result;
109 
110  switch (dsadc->GLOBCFG.B.MCSEL)
111  {
112  case IfxDsadc_ModulatorClock_fOSC0:
113  result = IfxScuCcu_getOsc0Frequency();
114  break;
115  case IfxDsadc_ModulatorClock_fERAY:
116  result = IfxScuCcu_getPllErayFrequency();
117  break;
118  case IfxDsadc_ModulatorClock_fDSD:
119  result = IfxScuCcu_getSpbFrequency();
120  break;
121  default:
122  result = 0;
123  break;
124  }
125 
126  return result;
127 }
128 
129 
130 void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
131 {
132  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
133 
134  IfxScuWdt_clearCpuEndinit(passwd);
135  dsadc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
136  dsadc->KRST1.B.RST = 1;
137  IfxScuWdt_setCpuEndinit(passwd);
138 
139  while (0 == dsadc->KRST0.B.RSTSTAT) /* Wait until reset is executed */
140 
141  {}
142 
143  IfxScuWdt_clearCpuEndinit(passwd);
144  dsadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
145  IfxScuWdt_setCpuEndinit(passwd);
146 }