IfxDma_cfg.h File Reference

DMA on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"

Go to the source code of this file.

Macros
#define	IFXDMA_ERROR_S   (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
	Error mask for move engine source error. More...
#define	IFXDMA_ERROR_D   (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
	Error mask for move engine destination error. More...
#define	IFXDMA_ERROR_SPB   (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
	Error mask for bus error on SPB. More...
#define	IFXDMA_ERROR_SRI   (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
	Error mask for bus error on SRI. More...
#define	IFXDMA_ERROR_RAM   (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
	Error mask for RAM error. More...
#define	IFXDMA_ERROR_SLL   (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
	Error mask for SLL (safe linked list CRC checksum) error. More...
#define	IFXDMA_ERROR_DLL   (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
	Error mask for DLL (failed linked list load) error. More...
#define	IFXDMA_NUM_CHANNELS   128

Enumerations
enum	IfxDma_ChannelId {   IfxDma_ChannelId_none = -1,   IfxDma_ChannelId_0 = 0,   IfxDma_ChannelId_1,   IfxDma_ChannelId_2,   IfxDma_ChannelId_3,   IfxDma_ChannelId_4,   IfxDma_ChannelId_5,   IfxDma_ChannelId_6,   IfxDma_ChannelId_7,   IfxDma_ChannelId_8,   IfxDma_ChannelId_9,   IfxDma_ChannelId_10,   IfxDma_ChannelId_11,   IfxDma_ChannelId_12,   IfxDma_ChannelId_13,   IfxDma_ChannelId_14,   IfxDma_ChannelId_15,   IfxDma_ChannelId_16,   IfxDma_ChannelId_17,   IfxDma_ChannelId_18,   IfxDma_ChannelId_19,   IfxDma_ChannelId_20,   IfxDma_ChannelId_21,   IfxDma_ChannelId_22,   IfxDma_ChannelId_23,   IfxDma_ChannelId_24,   IfxDma_ChannelId_25,   IfxDma_ChannelId_26,   IfxDma_ChannelId_27,   IfxDma_ChannelId_28,   IfxDma_ChannelId_29,   IfxDma_ChannelId_30,   IfxDma_ChannelId_31,   IfxDma_ChannelId_32,   IfxDma_ChannelId_33,   IfxDma_ChannelId_34,   IfxDma_ChannelId_35,   IfxDma_ChannelId_36,   IfxDma_ChannelId_37,   IfxDma_ChannelId_38,   IfxDma_ChannelId_39,   IfxDma_ChannelId_40,   IfxDma_ChannelId_41,   IfxDma_ChannelId_42,   IfxDma_ChannelId_43,   IfxDma_ChannelId_44,   IfxDma_ChannelId_45,   IfxDma_ChannelId_46,   IfxDma_ChannelId_47,   IfxDma_ChannelId_48,   IfxDma_ChannelId_49,   IfxDma_ChannelId_50,   IfxDma_ChannelId_51,   IfxDma_ChannelId_52,   IfxDma_ChannelId_53,   IfxDma_ChannelId_54,   IfxDma_ChannelId_55,   IfxDma_ChannelId_56,   IfxDma_ChannelId_57,   IfxDma_ChannelId_58,   IfxDma_ChannelId_59,   IfxDma_ChannelId_60,   IfxDma_ChannelId_61,   IfxDma_ChannelId_62,   IfxDma_ChannelId_63,   IfxDma_ChannelId_64,   IfxDma_ChannelId_65,   IfxDma_ChannelId_66,   IfxDma_ChannelId_67,   IfxDma_ChannelId_68,   IfxDma_ChannelId_69,   IfxDma_ChannelId_70,   IfxDma_ChannelId_71,   IfxDma_ChannelId_72,   IfxDma_ChannelId_73,   IfxDma_ChannelId_74,   IfxDma_ChannelId_75,   IfxDma_ChannelId_76,   IfxDma_ChannelId_77,   IfxDma_ChannelId_78,   IfxDma_ChannelId_79,   IfxDma_ChannelId_80,   IfxDma_ChannelId_81,   IfxDma_ChannelId_82,   IfxDma_ChannelId_83,   IfxDma_ChannelId_84,   IfxDma_ChannelId_85,   IfxDma_ChannelId_86,   IfxDma_ChannelId_87,   IfxDma_ChannelId_88,   IfxDma_ChannelId_89,   IfxDma_ChannelId_90,   IfxDma_ChannelId_91,   IfxDma_ChannelId_92,   IfxDma_ChannelId_93,   IfxDma_ChannelId_94,   IfxDma_ChannelId_95,   IfxDma_ChannelId_96,   IfxDma_ChannelId_97,   IfxDma_ChannelId_98,   IfxDma_ChannelId_99,   IfxDma_ChannelId_100,   IfxDma_ChannelId_101,   IfxDma_ChannelId_102,   IfxDma_ChannelId_103,   IfxDma_ChannelId_104,   IfxDma_ChannelId_105,   IfxDma_ChannelId_106,   IfxDma_ChannelId_107,   IfxDma_ChannelId_108,   IfxDma_ChannelId_109,   IfxDma_ChannelId_110,   IfxDma_ChannelId_111,   IfxDma_ChannelId_112,   IfxDma_ChannelId_113,   IfxDma_ChannelId_114,   IfxDma_ChannelId_115,   IfxDma_ChannelId_116,   IfxDma_ChannelId_117,   IfxDma_ChannelId_118,   IfxDma_ChannelId_119,   IfxDma_ChannelId_120,   IfxDma_ChannelId_121,   IfxDma_ChannelId_122,   IfxDma_ChannelId_123,   IfxDma_ChannelId_124,   IfxDma_ChannelId_125,   IfxDma_ChannelId_126,   IfxDma_ChannelId_127 }
	DMA channel resources definition. More...

Detailed Description

DMA on-chip implementation data.

Version

iLLD_1_0_0_11_0

Copyright

Copyright (c) 2013 Infineon Technologies AG. All rights reserved.

                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma_cfg.h.

Macro Definition Documentation

#define IFXDMA_ERROR_D   (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)

Error mask for move engine destination error.

Definition at line 51 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_DLL   (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)

Error mask for DLL (failed linked list load) error.

Definition at line 71 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_RAM   (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)

Error mask for RAM error.

Definition at line 63 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_S   (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)

Error mask for move engine source error.

Definition at line 47 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_SLL   (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)

Error mask for SLL (safe linked list CRC checksum) error.

Definition at line 67 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_SPB   (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)

Error mask for bus error on SPB.

Definition at line 55 of file IfxDma_cfg.h.

#define IFXDMA_ERROR_SRI   (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)

Error mask for bus error on SRI.

Definition at line 59 of file IfxDma_cfg.h.

#define IFXDMA_NUM_CHANNELS   128

Definition at line 73 of file IfxDma_cfg.h.

Enumeration Type Documentation

enum IfxDma_ChannelId

DMA channel resources definition.

Enumerator
IfxDma_ChannelId_none	None of the Ifx_DMA Channels.
IfxDma_ChannelId_0	Ifx_DMA Channel 0.
IfxDma_ChannelId_1	Ifx_DMA Channel 1.
IfxDma_ChannelId_2	Ifx_DMA Channel 2.
IfxDma_ChannelId_3	Ifx_DMA Channel 3.
IfxDma_ChannelId_4	Ifx_DMA Channel 4.
IfxDma_ChannelId_5	Ifx_DMA Channel 5.
IfxDma_ChannelId_6	Ifx_DMA Channel 6.
IfxDma_ChannelId_7	Ifx_DMA Channel 7.
IfxDma_ChannelId_8	Ifx_DMA Channel 8.
IfxDma_ChannelId_9	Ifx_DMA Channel 9.
IfxDma_ChannelId_10	Ifx_DMA Channel 10.
IfxDma_ChannelId_11	Ifx_DMA Channel 11.
IfxDma_ChannelId_12	Ifx_DMA Channel 12.
IfxDma_ChannelId_13	Ifx_DMA Channel 13.
IfxDma_ChannelId_14	Ifx_DMA Channel 14.
IfxDma_ChannelId_15	Ifx_DMA Channel 15.
IfxDma_ChannelId_16	Ifx_DMA Channel 16.
IfxDma_ChannelId_17	Ifx_DMA Channel 17.
IfxDma_ChannelId_18	Ifx_DMA Channel 18.
IfxDma_ChannelId_19	Ifx_DMA Channel 19.
IfxDma_ChannelId_20	Ifx_DMA Channel 20.
IfxDma_ChannelId_21	Ifx_DMA Channel 21.
IfxDma_ChannelId_22	Ifx_DMA Channel 22.
IfxDma_ChannelId_23	Ifx_DMA Channel 23.
IfxDma_ChannelId_24	Ifx_DMA Channel 24.
IfxDma_ChannelId_25	Ifx_DMA Channel 25.
IfxDma_ChannelId_26	Ifx_DMA Channel 26.
IfxDma_ChannelId_27	Ifx_DMA Channel 27.
IfxDma_ChannelId_28	Ifx_DMA Channel 28.
IfxDma_ChannelId_29	Ifx_DMA Channel 29.
IfxDma_ChannelId_30	Ifx_DMA Channel 30.
IfxDma_ChannelId_31	Ifx_DMA Channel 31.
IfxDma_ChannelId_32	Ifx_DMA Channel 32.
IfxDma_ChannelId_33	Ifx_DMA Channel 33.
IfxDma_ChannelId_34	Ifx_DMA Channel 34.
IfxDma_ChannelId_35	Ifx_DMA Channel 35.
IfxDma_ChannelId_36	Ifx_DMA Channel 36.
IfxDma_ChannelId_37	Ifx_DMA Channel 37.
IfxDma_ChannelId_38	Ifx_DMA Channel 38.
IfxDma_ChannelId_39	Ifx_DMA Channel 39.
IfxDma_ChannelId_40	Ifx_DMA Channel 40.
IfxDma_ChannelId_41	Ifx_DMA Channel 41.
IfxDma_ChannelId_42	Ifx_DMA Channel 42.
IfxDma_ChannelId_43	Ifx_DMA Channel 43.
IfxDma_ChannelId_44	Ifx_DMA Channel 44.
IfxDma_ChannelId_45	Ifx_DMA Channel 45.
IfxDma_ChannelId_46	Ifx_DMA Channel 46.
IfxDma_ChannelId_47	Ifx_DMA Channel 47.
IfxDma_ChannelId_48	Ifx_DMA Channel 48.
IfxDma_ChannelId_49	Ifx_DMA Channel 49.
IfxDma_ChannelId_50	Ifx_DMA Channel 50.
IfxDma_ChannelId_51	Ifx_DMA Channel 51.
IfxDma_ChannelId_52	Ifx_DMA Channel 52.
IfxDma_ChannelId_53	Ifx_DMA Channel 53.
IfxDma_ChannelId_54	Ifx_DMA Channel 54.
IfxDma_ChannelId_55	Ifx_DMA Channel 55.
IfxDma_ChannelId_56	Ifx_DMA Channel 56.
IfxDma_ChannelId_57	Ifx_DMA Channel 57.
IfxDma_ChannelId_58	Ifx_DMA Channel 58.
IfxDma_ChannelId_59	Ifx_DMA Channel 59.
IfxDma_ChannelId_60	Ifx_DMA Channel 60.
IfxDma_ChannelId_61	Ifx_DMA Channel 61.
IfxDma_ChannelId_62	Ifx_DMA Channel 62.
IfxDma_ChannelId_63	Ifx_DMA Channel 63.
IfxDma_ChannelId_64	Ifx_DMA Channel 64.
IfxDma_ChannelId_65	Ifx_DMA Channel 65.
IfxDma_ChannelId_66	Ifx_DMA Channel 66.
IfxDma_ChannelId_67	Ifx_DMA Channel 67.
IfxDma_ChannelId_68	Ifx_DMA Channel 68.
IfxDma_ChannelId_69	Ifx_DMA Channel 69.
IfxDma_ChannelId_70	Ifx_DMA Channel 70.
IfxDma_ChannelId_71	Ifx_DMA Channel 71.
IfxDma_ChannelId_72	Ifx_DMA Channel 72.
IfxDma_ChannelId_73	Ifx_DMA Channel 73.
IfxDma_ChannelId_74	Ifx_DMA Channel 74.
IfxDma_ChannelId_75	Ifx_DMA Channel 75.
IfxDma_ChannelId_76	Ifx_DMA Channel 76.
IfxDma_ChannelId_77	Ifx_DMA Channel 77.
IfxDma_ChannelId_78	Ifx_DMA Channel 78.
IfxDma_ChannelId_79	Ifx_DMA Channel 79.
IfxDma_ChannelId_80	Ifx_DMA Channel 80.
IfxDma_ChannelId_81	Ifx_DMA Channel 81.
IfxDma_ChannelId_82	Ifx_DMA Channel 82.
IfxDma_ChannelId_83	Ifx_DMA Channel 83.
IfxDma_ChannelId_84	Ifx_DMA Channel 84.
IfxDma_ChannelId_85	Ifx_DMA Channel 85.
IfxDma_ChannelId_86	Ifx_DMA Channel 86.
IfxDma_ChannelId_87	Ifx_DMA Channel 87.
IfxDma_ChannelId_88	Ifx_DMA Channel 88.
IfxDma_ChannelId_89	Ifx_DMA Channel 89.
IfxDma_ChannelId_90	Ifx_DMA Channel 90.
IfxDma_ChannelId_91	Ifx_DMA Channel 91.
IfxDma_ChannelId_92	Ifx_DMA Channel 92.
IfxDma_ChannelId_93	Ifx_DMA Channel 93.
IfxDma_ChannelId_94	Ifx_DMA Channel 94.
IfxDma_ChannelId_95	Ifx_DMA Channel 95.
IfxDma_ChannelId_96	Ifx_DMA Channel 96.
IfxDma_ChannelId_97	Ifx_DMA Channel 97.
IfxDma_ChannelId_98	Ifx_DMA Channel 98.
IfxDma_ChannelId_99	Ifx_DMA Channel 99.
IfxDma_ChannelId_100	Ifx_DMA Channel 100.
IfxDma_ChannelId_101	Ifx_DMA Channel 101.
IfxDma_ChannelId_102	Ifx_DMA Channel 102.
IfxDma_ChannelId_103	Ifx_DMA Channel 103.
IfxDma_ChannelId_104	Ifx_DMA Channel 104.
IfxDma_ChannelId_105	Ifx_DMA Channel 105.
IfxDma_ChannelId_106	Ifx_DMA Channel 106.
IfxDma_ChannelId_107	Ifx_DMA Channel 107.
IfxDma_ChannelId_108	Ifx_DMA Channel 108.
IfxDma_ChannelId_109	Ifx_DMA Channel 109.
IfxDma_ChannelId_110	Ifx_DMA Channel 110.
IfxDma_ChannelId_111	Ifx_DMA Channel 111.
IfxDma_ChannelId_112	Ifx_DMA Channel 112.
IfxDma_ChannelId_113	Ifx_DMA Channel 113.
IfxDma_ChannelId_114	Ifx_DMA Channel 114.
IfxDma_ChannelId_115	Ifx_DMA Channel 115.
IfxDma_ChannelId_116	Ifx_DMA Channel 116.
IfxDma_ChannelId_117	Ifx_DMA Channel 117.
IfxDma_ChannelId_118	Ifx_DMA Channel 118.
IfxDma_ChannelId_119	Ifx_DMA Channel 119.
IfxDma_ChannelId_120	Ifx_DMA Channel 120.
IfxDma_ChannelId_121	Ifx_DMA Channel 121.
IfxDma_ChannelId_122	Ifx_DMA Channel 122.
IfxDma_ChannelId_123	Ifx_DMA Channel 123.
IfxDma_ChannelId_124	Ifx_DMA Channel 124.
IfxDma_ChannelId_125	Ifx_DMA Channel 125.
IfxDma_ChannelId_126	Ifx_DMA Channel 126.
IfxDma_ChannelId_127	Ifx_DMA Channel 127.

Definition at line 81 of file IfxDma_cfg.h.