iLLD_TC27xD  1.0
Enumerations
Collaboration diagram for Enumerations:

Enumerations

enum  IfxPsi5s_AlternateInput {
  IfxPsi5s_AlternateInput_0 = 0,
  IfxPsi5s_AlternateInput_1,
  IfxPsi5s_AlternateInput_2,
  IfxPsi5s_AlternateInput_3
}
 MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
 
enum  IfxPsi5s_AscBaudratePrescalar {
  IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
  IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
 MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
 
enum  IfxPsi5s_AscMode {
  IfxPsi5s_AscMode_sync = 0,
  IfxPsi5s_AscMode_async_8bitData = 1,
  IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
  IfxPsi5s_AscMode_async_9bitData = 4,
  IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
  IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
 MODULE_PSI5S.CON.M:ASC mode of operation. More...
 
enum  IfxPsi5s_AscStopBits {
  IfxPsi5s_AscStopBits_1 = 0,
  IfxPsi5s_AscStopBits_2
}
 MODULE_PSI5S.CON.STP: Number of stop bits. More...
 
enum  IfxPsi5s_ChannelId {
  IfxPsi5s_ChannelId_0 = 0,
  IfxPsi5s_ChannelId_1,
  IfxPsi5s_ChannelId_2,
  IfxPsi5s_ChannelId_3,
  IfxPsi5s_ChannelId_4,
  IfxPsi5s_ChannelId_5,
  IfxPsi5s_ChannelId_6,
  IfxPsi5s_ChannelId_7,
  IfxPsi5s_ChannelId_none = -1
}
 PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
 
enum  IfxPsi5s_ClockType {
  IfxPsi5s_ClockType_fracDiv = 0,
  IfxPsi5s_ClockType_timeStamp = 1,
  IfxPsi5s_ClockType_ascFracDiv = 2,
  IfxPsi5s_ClockType_ascOutput = 3
}
 Clock Selection. More...
 
enum  IfxPsi5s_CrcOrParity {
  IfxPsi5s_CrcOrParity_parity = 0,
  IfxPsi5s_CrcOrParity_crc = 1
}
 MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
 
enum  IfxPsi5s_DividerMode {
  IfxPsi5s_DividerMode_spb = 0,
  IfxPsi5s_DividerMode_normal = 1,
  IfxPsi5s_DividerMode_fractional = 2,
  IfxPsi5s_DividerMode_off = 3
}
 MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
 
enum  IfxPsi5s_EnhancedProtocol {
  IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
  IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
  IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
 MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
 
enum  IfxPsi5s_FrameId {
  IfxPsi5s_FrameId_frameHeader = 0,
  IfxPsi5s_FrameId_rollingNumber = 1
}
 MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
 
enum  IfxPsi5s_IdleTime {
  IfxPsi5s_IdleTime_1 = 0,
  IfxPsi5s_IdleTime_2,
  IfxPsi5s_IdleTime_3,
  IfxPsi5s_IdleTime_4,
  IfxPsi5s_IdleTime_5,
  IfxPsi5s_IdleTime_6,
  IfxPsi5s_IdleTime_7,
  IfxPsi5s_IdleTime_8,
  IfxPsi5s_IdleTime_9,
  IfxPsi5s_IdleTime_10,
  IfxPsi5s_IdleTime_11,
  IfxPsi5s_IdleTime_12,
  IfxPsi5s_IdleTime_13,
  IfxPsi5s_IdleTime_14,
  IfxPsi5s_IdleTime_15,
  IfxPsi5s_IdleTime_16
}
 MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
 
enum  IfxPsi5s_MessagingBits {
  IfxPsi5s_MessagingBits_absent = 0,
  IfxPsi5s_MessagingBits_present = 1
}
 Messaging bits presence. More...
 
enum  IfxPsi5s_NumberExpectedFrames {
  IfxPsi5s_NumberExpectedFrames_1 = 1,
  IfxPsi5s_NumberExpectedFrames_2,
  IfxPsi5s_NumberExpectedFrames_3,
  IfxPsi5s_NumberExpectedFrames_4,
  IfxPsi5s_NumberExpectedFrames_5,
  IfxPsi5s_NumberExpectedFrames_6
}
 MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
 
enum  IfxPsi5s_SleepMode {
  IfxPsi5s_SleepMode_enable = 0,
  IfxPsi5s_SleepMode_disable = 1
}
 Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
 
enum  IfxPsi5s_TimeBase {
  IfxPsi5s_TimeBase_internal = 0,
  IfxPsi5s_TimeBase_external = 1
}
 MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
 
enum  IfxPsi5s_TimestampRegister {
  IfxPsi5s_TimestampRegister_a = 0,
  IfxPsi5s_TimestampRegister_b = 1
}
 MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
 
enum  IfxPsi5s_TimestampTrigger {
  IfxPsi5s_TimestampTrigger_syncPulse = 0,
  IfxPsi5s_TimestampTrigger_frame = 1
}
 MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
 
enum  IfxPsi5s_Trigger {
  IfxPsi5s_Trigger_0 = 0,
  IfxPsi5s_Trigger_1,
  IfxPsi5s_Trigger_2,
  IfxPsi5s_Trigger_3,
  IfxPsi5s_Trigger_4,
  IfxPsi5s_Trigger_5,
  IfxPsi5s_Trigger_6,
  IfxPsi5s_Trigger_7
}
 MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
 
enum  IfxPsi5s_TriggerType {
  IfxPsi5s_TriggerType_periodic = 0,
  IfxPsi5s_TriggerType_external = 1
}
 Trigger type defined in. More...
 
enum  IfxPsi5s_UartFrameCount {
  IfxPsi5s_UartFrameCount_3 = 0,
  IfxPsi5s_UartFrameCount_4,
  IfxPsi5s_UartFrameCount_5,
  IfxPsi5s_UartFrameCount_6
}
 MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
 
enum  IfxPsi5s_WatchdogTimerMode {
  IfxPsi5s_WatchdogTimerMode_frame = 0,
  IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
 MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...
 

Detailed Description

Enumeration Type Documentation

MODULE_PSI5S.IOCR.ALTI:Alternate input.

Enumerator
IfxPsi5s_AlternateInput_0 

Alternate Input 0.

IfxPsi5s_AlternateInput_1 

Alternate Input 1.

IfxPsi5s_AlternateInput_2 

Alternate Input 2.

IfxPsi5s_AlternateInput_3 

Alternate Input 3.

Definition at line 59 of file IfxPsi5s.h.

MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.

Enumerator
IfxPsi5s_AscBaudratePrescalar_divideBy2 

Divide by 2 is selected for baudrate timer prescalar.

IfxPsi5s_AscBaudratePrescalar_divideBy3 

Divide by 3 is selected for baudrate timer prescalar.

Definition at line 69 of file IfxPsi5s.h.

MODULE_PSI5S.CON.M:ASC mode of operation.

Enumerator
IfxPsi5s_AscMode_sync 

Synchronous mode.

IfxPsi5s_AscMode_async_8bitData 

Asynchronous mode with 8 bit data.

IfxPsi5s_AscMode_async_7bitDataWithParity 

Asynchronous mode with 7 bit data with parity.

IfxPsi5s_AscMode_async_9bitData 

Asynchronous mode with 9 bit data.

IfxPsi5s_AscMode_async_8bitDataWithWakeup 

Asynchronous mode with 8 bit data with wakeup.

IfxPsi5s_AscMode_async_8bitDataWithParity 

Asynchronous mode with 8 bit data with parity.

Definition at line 77 of file IfxPsi5s.h.

MODULE_PSI5S.CON.STP: Number of stop bits.

Enumerator
IfxPsi5s_AscStopBits_1 

1 stop bit

IfxPsi5s_AscStopBits_2 

2 stop bit

Definition at line 89 of file IfxPsi5s.h.

PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.

Enumerator
IfxPsi5s_ChannelId_0 

Ifx_PSI5S Channel 0.

IfxPsi5s_ChannelId_1 

Ifx_PSI5S Channel 1.

IfxPsi5s_ChannelId_2 

Ifx_PSI5S Channel 2.

IfxPsi5s_ChannelId_3 

Ifx_PSI5S Channel 3.

IfxPsi5s_ChannelId_4 

Ifx_PSI5S Channel 4.

IfxPsi5s_ChannelId_5 

Ifx_PSI5S Channel 5.

IfxPsi5s_ChannelId_6 

Ifx_PSI5S Channel 6.

IfxPsi5s_ChannelId_7 

Ifx_PSI5S Channel 7.

IfxPsi5s_ChannelId_none 

None of the Ifx_PSI5S Channels.

Definition at line 97 of file IfxPsi5s.h.

Clock Selection.

Enumerator
IfxPsi5s_ClockType_fracDiv 

Fractional Divide clock.

IfxPsi5s_ClockType_timeStamp 

Timestamp clock.

IfxPsi5s_ClockType_ascFracDiv 

Asc Fractional divider clock.

IfxPsi5s_ClockType_ascOutput 

Asc output clock.

Definition at line 112 of file IfxPsi5s.h.

MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.

Enumerator
IfxPsi5s_CrcOrParity_parity 

parity selection

IfxPsi5s_CrcOrParity_crc 

CRC selection.

Definition at line 122 of file IfxPsi5s.h.

MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.

Enumerator
IfxPsi5s_DividerMode_spb 

divider mode is off

IfxPsi5s_DividerMode_normal 

divider mode is normal

IfxPsi5s_DividerMode_fractional 

divider mode is fractional

IfxPsi5s_DividerMode_off 

divider mode is off

Definition at line 130 of file IfxPsi5s.h.

MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.

Enumerator
IfxPsi5s_EnhancedProtocol_toothGapMethod 

toothGapMethod Enhanced protocol type

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 

pulseWidth_frameFormat_1to3 Enhanced protocol type

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 

pulseWidth_frameFormat_4 Enhanced protocol type

Definition at line 140 of file IfxPsi5s.h.

MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.

Enumerator
IfxPsi5s_FrameId_frameHeader 

Frame ID is updated from packet frame header (Sync mode)

IfxPsi5s_FrameId_rollingNumber 

Frame ID is a rolling number 0 .. 5 copied from FCNT.

Definition at line 149 of file IfxPsi5s.h.

MODULE_PSI5S.GCR.IDT:Idle time bit count.

Enumerator
IfxPsi5s_IdleTime_1 

1 bit Idle time

IfxPsi5s_IdleTime_2 

2 bit Idle time

IfxPsi5s_IdleTime_3 

3 bit Idle time

IfxPsi5s_IdleTime_4 

4 bit Idle time

IfxPsi5s_IdleTime_5 

5 bit Idle time

IfxPsi5s_IdleTime_6 

6 bit Idle time

IfxPsi5s_IdleTime_7 

7 bit Idle time

IfxPsi5s_IdleTime_8 

8 bit Idle time

IfxPsi5s_IdleTime_9 

9 bit Idle time

IfxPsi5s_IdleTime_10 

10 bit Idle time

IfxPsi5s_IdleTime_11 

11 bit Idle time

IfxPsi5s_IdleTime_12 

12 bit Idle time

IfxPsi5s_IdleTime_13 

13 bit Idle time

IfxPsi5s_IdleTime_14 

14 bit Idle time

IfxPsi5s_IdleTime_15 

15 bit Idle time

IfxPsi5s_IdleTime_16 

16 bit Idle time

Definition at line 157 of file IfxPsi5s.h.

Messaging bits presence.

Enumerator
IfxPsi5s_MessagingBits_absent 

No messaging bits.

IfxPsi5s_MessagingBits_present 

2 messaging bits

Definition at line 179 of file IfxPsi5s.h.

MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.

Enumerator
IfxPsi5s_NumberExpectedFrames_1 

1 psi5s frame expected

IfxPsi5s_NumberExpectedFrames_2 

2 psi5s frame expected

IfxPsi5s_NumberExpectedFrames_3 

3 psi5s frame expected

IfxPsi5s_NumberExpectedFrames_4 

4 psi5s frame expected

IfxPsi5s_NumberExpectedFrames_5 

5 psi5s frame expected

IfxPsi5s_NumberExpectedFrames_6 

6 psi5s frame expected

Definition at line 187 of file IfxPsi5s.h.

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS.

Enumerator
IfxPsi5s_SleepMode_enable 

enables sleep mode

IfxPsi5s_SleepMode_disable 

disables sleep mode

Definition at line 200 of file IfxPsi5s.h.

MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.

Enumerator
IfxPsi5s_TimeBase_internal 

Internal time stamp clock.

IfxPsi5s_TimeBase_external 

External GTM inputs.

Definition at line 208 of file IfxPsi5s.h.

MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.

Enumerator
IfxPsi5s_TimestampRegister_a 

Timestamp register A.

IfxPsi5s_TimestampRegister_b 

Timestamp register B.

Definition at line 216 of file IfxPsi5s.h.

MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.

Enumerator
IfxPsi5s_TimestampTrigger_syncPulse 

Timestamp trigger on sync pulse.

IfxPsi5s_TimestampTrigger_frame 

Timestamp trigger on any frame.

Definition at line 224 of file IfxPsi5s.h.

MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.

Enumerator
IfxPsi5s_Trigger_0 

Trigger 0.

IfxPsi5s_Trigger_1 

Trigger 1.

IfxPsi5s_Trigger_2 

Trigger 2.

IfxPsi5s_Trigger_3 

Trigger 3.

IfxPsi5s_Trigger_4 

Trigger 4.

IfxPsi5s_Trigger_5 

Trigger 5.

IfxPsi5s_Trigger_6 

Trigger 6.

IfxPsi5s_Trigger_7 

Trigger 7.

Definition at line 232 of file IfxPsi5s.h.

Trigger type defined in.

Enumerator
IfxPsi5s_TriggerType_periodic 

Periodic trigger.

IfxPsi5s_TriggerType_external 

External trigger.

Definition at line 246 of file IfxPsi5s.h.

MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.

Enumerator
IfxPsi5s_UartFrameCount_3 

3 UART frames

IfxPsi5s_UartFrameCount_4 

4 UART frames

IfxPsi5s_UartFrameCount_5 

5 UART frames

IfxPsi5s_UartFrameCount_6 

6 UART frames

Definition at line 254 of file IfxPsi5s.h.

MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.

Enumerator
IfxPsi5s_WatchdogTimerMode_frame 

Watch Dog Timer is restarted on reception of each recoverable frame (async mode)

IfxPsi5s_WatchdogTimerMode_syncPulse 

Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode)

Definition at line 264 of file IfxPsi5s.h.