| Enumerator |
|---|
| IfxDma_ChannelShadow_none |
shadow address register not used. Source and destination address register are written directly
|
| IfxDma_ChannelShadow_src |
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
|
| IfxDma_ChannelShadow_dst |
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
|
| IfxDma_ChannelShadow_srcDirectWrite |
Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction.
|
| IfxDma_ChannelShadow_dstDirectWrite |
Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction.
|
| IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch |
Software switch only. Shadow address used for double buffering.
|
| IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch |
Automatic Hardware and Software switch. Shadow address used for double buffering.
|
| IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch |
Software switch only. Shadow address used for double buffering.
|
| IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch |
Automatic Hardware and Software switch. Shadow address used for double buffering.
|
| IfxDma_ChannelShadow_linkedList |
The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z.
|
| IfxDma_ChannelShadow_accumulatedLinkedList |
The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z.
|
| IfxDma_ChannelShadow_safeLinkedList |
The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set.
|
| IfxDma_ChannelShadow_conditionalLinkedList |
Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions.
|
