iLLD_TC27xD  1.0
Miscellaneous Intrinsic Functions
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void __cacheawi (uint8 *p)
 
IFX_INLINE void __cacheiwi (uint8 *p)
 
IFX_INLINE uint8__cacheawi_bo_post_inc (uint8 *p)
 
IFX_INLINE sint32 __mulsc (sint32 a, sint32 b, sint32 offset)
 
IFX_INLINE uint32 __rol (uint32 operand, uint32 count)
 
IFX_INLINE uint32 __ror (uint32 operand, uint32 count)
 

Detailed Description

Function Documentation

IFX_INLINE void __cacheawi ( uint8 p)

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 470 of file IfxCpu_IntrinsicsGnuc.h.

IFX_INLINE uint8* __cacheawi_bo_post_inc ( uint8 p)

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 484 of file IfxCpu_IntrinsicsGnuc.h.

IFX_INLINE void __cacheiwi ( uint8 p)

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 476 of file IfxCpu_IntrinsicsGnuc.h.

IFX_INLINE sint32 __mulsc ( sint32  a,
sint32  b,
sint32  offset 
)

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 494 of file IfxCpu_IntrinsicsGnuc.h.

IFX_INLINE uint32 __rol ( uint32  operand,
uint32  count 
)

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 505 of file IfxCpu_IntrinsicsGnuc.h.

IFX_INLINE uint32 __ror ( uint32  operand,
uint32  count 
)

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 514 of file IfxCpu_IntrinsicsGnuc.h.