iLLD_TC27xD  1.0
Miscellaneous Intrinsic Functions
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

void __cacheawi (void *) __attribute__((intrinsic_function(0x110
 
asm volatile uint8__cacheawi_bo_post_inc (uint8 *p)
 
asm volatile void __cacheiwi (uint8 *p)
 
asm circ_t __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
 
asm volatile sint32 __mulsc (sint32 a, sint32 b, sint32 offset)
 
asm volatile uint32 __rol (uint32 operand, uint32 count)
 
asm volatile uint32 __ror (uint32 operand, uint32 count)
 

Variables

void cachea wi
 

Detailed Description

Function Documentation

void __cacheawi ( void *  )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

asm volatile uint8* __cacheawi_bo_post_inc ( uint8 p)

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 399 of file IfxCpu_IntrinsicsDcc.h.

asm volatile void __cacheiwi ( uint8 p)

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 409 of file IfxCpu_IntrinsicsDcc.h.

asm circ_t __initcirc ( void *  buf,
uint16  bufsize,
uint16  byteindex 
)

Initialize a circular pointer with a dynamically allocated buffer at run-time.

Definition at line 418 of file IfxCpu_IntrinsicsDcc.h.

asm volatile sint32 __mulsc ( sint32  a,
sint32  b,
sint32  offset 
)

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 432 of file IfxCpu_IntrinsicsDcc.h.

asm volatile uint32 __rol ( uint32  operand,
uint32  count 
)

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 442 of file IfxCpu_IntrinsicsDcc.h.

asm volatile uint32 __ror ( uint32  operand,
uint32  count 
)

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 451 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

void cachea wi

Definition at line 394 of file IfxCpu_IntrinsicsDcc.h.