Enumerations

Collaboration diagram for Enumerations:

Enumerations
enum	IfxAsclin_Checksum {   IfxAsclin_Checksum_classic = 0,   IfxAsclin_Checksum_enhanced = 1 }
	Defines if the classic or the enhanced checksum will be calculated by the checksum block. Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum	IfxAsclin_ChecksumInjection {   IfxAsclin_ChecksumInjection_notWritten = 0,   IfxAsclin_ChecksumInjection_written = 1 }
	Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum	IfxAsclin_ClockPolarity {   IfxAsclin_ClockPolarity_idleLow = 0,   IfxAsclin_ClockPolarity_idleHigh = 1 }
	CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the data transmission time intervals. Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum	IfxAsclin_ClockSource {   IfxAsclin_ClockSource_noClock = 0,   IfxAsclin_ClockSource_kernelClock = 1,   IfxAsclin_ClockSource_oscillatorClock = 2,   IfxAsclin_ClockSource_flexRayClock = 4,   IfxAsclin_ClockSource_ascFastClock = 8,   IfxAsclin_ClockSource_ascSlowClock = 16 }
	Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum	IfxAsclin_CtsInputSelect {   IfxAsclin_CtsInputSelect_0,   IfxAsclin_CtsInputSelect_1,   IfxAsclin_CtsInputSelect_2,   IfxAsclin_CtsInputSelect_3 }
	CTS input pin selection Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum	IfxAsclin_DataLength {   IfxAsclin_DataLength_1 = 0,   IfxAsclin_DataLength_2,   IfxAsclin_DataLength_3,   IfxAsclin_DataLength_4,   IfxAsclin_DataLength_5,   IfxAsclin_DataLength_6,   IfxAsclin_DataLength_7,   IfxAsclin_DataLength_8,   IfxAsclin_DataLength_9,   IfxAsclin_DataLength_10,   IfxAsclin_DataLength_11,   IfxAsclin_DataLength_12,   IfxAsclin_DataLength_13,   IfxAsclin_DataLength_14,   IfxAsclin_DataLength_15,   IfxAsclin_DataLength_16 }
	Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum	IfxAsclin_FrameMode {   IfxAsclin_FrameMode_initialise = 0,   IfxAsclin_FrameMode_asc = 1,   IfxAsclin_FrameMode_spi = 2,   IfxAsclin_FrameMode_lin = 3 }
	Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode. Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum	IfxAsclin_HeaderResponseSelect {   IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,   IfxAsclin_HeaderResponseSelect_headerOnly = 1 }
	Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum	IfxAsclin_IdleDelay {   IfxAsclin_IdleDelay_0,   IfxAsclin_IdleDelay_1,   IfxAsclin_IdleDelay_2,   IfxAsclin_IdleDelay_3,   IfxAsclin_IdleDelay_4,   IfxAsclin_IdleDelay_5,   IfxAsclin_IdleDelay_6,   IfxAsclin_IdleDelay_7 }
	Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the frames. ASC and LIN mode: this is the pause inserted between transmission of bytes. Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum	IfxAsclin_LeadDelay {   IfxAsclin_LeadDelay_0,   IfxAsclin_LeadDelay_1,   IfxAsclin_LeadDelay_2,   IfxAsclin_LeadDelay_3,   IfxAsclin_LeadDelay_4,   IfxAsclin_LeadDelay_5,   IfxAsclin_LeadDelay_6,   IfxAsclin_LeadDelay_7 }
	Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between the end of the break and the start of the sync character. Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum	IfxAsclin_LinMode {   IfxAsclin_LinMode_slave = 0,   IfxAsclin_LinMode_master = 1 }
	Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum	IfxAsclin_LinResponseTimeoutMode {   IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,   IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1 }
	Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout. Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum	IfxAsclin_OversamplingFactor {   IfxAsclin_OversamplingFactor_4 = 3,   IfxAsclin_OversamplingFactor_5 = 4,   IfxAsclin_OversamplingFactor_6 = 5,   IfxAsclin_OversamplingFactor_7 = 6,   IfxAsclin_OversamplingFactor_8 = 7,   IfxAsclin_OversamplingFactor_9 = 8,   IfxAsclin_OversamplingFactor_10 = 9,   IfxAsclin_OversamplingFactor_11 = 10,   IfxAsclin_OversamplingFactor_12 = 11,   IfxAsclin_OversamplingFactor_13 = 12,   IfxAsclin_OversamplingFactor_14 = 13,   IfxAsclin_OversamplingFactor_15 = 14,   IfxAsclin_OversamplingFactor_16 = 15 }
	Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum	IfxAsclin_ParityType {   IfxAsclin_ParityType_even = 0,   IfxAsclin_ParityType_odd = 1 }
	Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum	IfxAsclin_ReceiveBufferMode {   IfxAsclin_ReceiveBufferMode_rxFifo = 0,   IfxAsclin_ReceiveBufferMode_rxBuffer = 1 }
	Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum	IfxAsclin_RtsCtsPolarity {   IfxAsclin_RtsCtsPolarity_activeHigh = 0,   IfxAsclin_RtsCtsPolarity_activeLow = 1 }
	Polarity of the RTS and CTS signals Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum	IfxAsclin_RxFifoInterruptLevel {   IfxAsclin_RxFifoInterruptLevel_1,   IfxAsclin_RxFifoInterruptLevel_2,   IfxAsclin_RxFifoInterruptLevel_3,   IfxAsclin_RxFifoInterruptLevel_4,   IfxAsclin_RxFifoInterruptLevel_5,   IfxAsclin_RxFifoInterruptLevel_6,   IfxAsclin_RxFifoInterruptLevel_7,   IfxAsclin_RxFifoInterruptLevel_8,   IfxAsclin_RxFifoInterruptLevel_9,   IfxAsclin_RxFifoInterruptLevel_10,   IfxAsclin_RxFifoInterruptLevel_11,   IfxAsclin_RxFifoInterruptLevel_12,   IfxAsclin_RxFifoInterruptLevel_13,   IfxAsclin_RxFifoInterruptLevel_14,   IfxAsclin_RxFifoInterruptLevel_15,   IfxAsclin_RxFifoInterruptLevel_16 }
	Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum	IfxAsclin_RxFifoOutletWidth {   IfxAsclin_RxFifoOutletWidth_0,   IfxAsclin_RxFifoOutletWidth_1,   IfxAsclin_RxFifoOutletWidth_2,   IfxAsclin_RxFifoOutletWidth_3 }
	Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum	IfxAsclin_RxInputSelect {   IfxAsclin_RxInputSelect_0,   IfxAsclin_RxInputSelect_1,   IfxAsclin_RxInputSelect_2,   IfxAsclin_RxInputSelect_3,   IfxAsclin_RxInputSelect_4,   IfxAsclin_RxInputSelect_5,   IfxAsclin_RxInputSelect_6,   IfxAsclin_RxInputSelect_7 }
	Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum	IfxAsclin_SamplePointPosition {   IfxAsclin_SamplePointPosition_1 = 1,   IfxAsclin_SamplePointPosition_2 = 2,   IfxAsclin_SamplePointPosition_3 = 3,   IfxAsclin_SamplePointPosition_4 = 4,   IfxAsclin_SamplePointPosition_5 = 5,   IfxAsclin_SamplePointPosition_6 = 6,   IfxAsclin_SamplePointPosition_7 = 7,   IfxAsclin_SamplePointPosition_8 = 8,   IfxAsclin_SamplePointPosition_9 = 9,   IfxAsclin_SamplePointPosition_10 = 10,   IfxAsclin_SamplePointPosition_11 = 11,   IfxAsclin_SamplePointPosition_12 = 12,   IfxAsclin_SamplePointPosition_13 = 13,   IfxAsclin_SamplePointPosition_14 = 14,   IfxAsclin_SamplePointPosition_15 = 15 }
	Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum	IfxAsclin_SamplesPerBit {   IfxAsclin_SamplesPerBit_one = 0,   IfxAsclin_SamplesPerBit_three = 1 }
	Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum	IfxAsclin_ShiftDirection {   IfxAsclin_ShiftDirection_lsbFirst = 0,   IfxAsclin_ShiftDirection_msbFirst = 1 }
	SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0. Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum	IfxAsclin_SlavePolarity {   IfxAsclin_SlavePolarity_idleLow = 0,   IfxAsclin_SlavePolarity_idlehigh = 1 }
	Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum	IfxAsclin_SleepMode {   IfxAsclin_SleepMode_enable = 0,   IfxAsclin_SleepMode_disable = 1 }
	Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum	IfxAsclin_Status {   IfxAsclin_Status_configurationError = 0,   IfxAsclin_Status_noError = 1 }
	Error status. More...
enum	IfxAsclin_StopBit {   IfxAsclin_StopBit_0,   IfxAsclin_StopBit_1,   IfxAsclin_StopBit_2,   IfxAsclin_StopBit_3,   IfxAsclin_StopBit_4,   IfxAsclin_StopBit_5,   IfxAsclin_StopBit_6,   IfxAsclin_StopBit_7 }
	ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum	IfxAsclin_TxFifoInletWidth {   IfxAsclin_TxFifoInletWidth_0,   IfxAsclin_TxFifoInletWidth_1,   IfxAsclin_TxFifoInletWidth_2,   IfxAsclin_TxFifoInletWidth_3 }
	Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum	IfxAsclin_TxFifoInterruptLevel {   IfxAsclin_TxFifoInterruptLevel_0,   IfxAsclin_TxFifoInterruptLevel_1,   IfxAsclin_TxFifoInterruptLevel_2,   IfxAsclin_TxFifoInterruptLevel_3,   IfxAsclin_TxFifoInterruptLevel_4,   IfxAsclin_TxFifoInterruptLevel_5,   IfxAsclin_TxFifoInterruptLevel_6,   IfxAsclin_TxFifoInterruptLevel_7,   IfxAsclin_TxFifoInterruptLevel_8,   IfxAsclin_TxFifoInterruptLevel_9,   IfxAsclin_TxFifoInterruptLevel_10,   IfxAsclin_TxFifoInterruptLevel_11,   IfxAsclin_TxFifoInterruptLevel_12,   IfxAsclin_TxFifoInterruptLevel_13,   IfxAsclin_TxFifoInterruptLevel_14,   IfxAsclin_TxFifoInterruptLevel_15 }
	Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Detailed Description

Enumeration Type Documentation

enum IfxAsclin_Checksum

Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM.

Enumerator
IfxAsclin_Checksum_classic	classic checksum
IfxAsclin_Checksum_enhanced	enhanced checksum

Definition at line 62 of file IfxAsclin.h.

enum IfxAsclin_ChecksumInjection

Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI.

Enumerator
IfxAsclin_ChecksumInjection_notWritten	checksum byte is not written
IfxAsclin_ChecksumInjection_written	checksum byte is written

Definition at line 71 of file IfxAsclin.h.

enum IfxAsclin_ClockPolarity

CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL.

Enumerator
IfxAsclin_ClockPolarity_idleLow	idle low
IfxAsclin_ClockPolarity_idleHigh	idle high

Definition at line 81 of file IfxAsclin.h.

enum IfxAsclin_ClockSource

Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL.

Enumerator
IfxAsclin_ClockSource_noClock	no clock will be supplied
IfxAsclin_ClockSource_kernelClock	f clc will be supplied
IfxAsclin_ClockSource_oscillatorClock	XTAL oscillator clock foso0 will be supplied.
IfxAsclin_ClockSource_flexRayClock	f eray will be supplied
IfxAsclin_ClockSource_ascFastClock	f asclinf wiil be supplied
IfxAsclin_ClockSource_ascSlowClock	f asclins will be supplied

Definition at line 90 of file IfxAsclin.h.

enum IfxAsclin_CtsInputSelect

CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS.

Enumerator
IfxAsclin_CtsInputSelect_0	CTS input pin 0.
IfxAsclin_CtsInputSelect_1	CTS input pin 1.
IfxAsclin_CtsInputSelect_2	CTS input pin 2.
IfxAsclin_CtsInputSelect_3	CTS input pin 3.

Definition at line 103 of file IfxAsclin.h.

enum IfxAsclin_DataLength

Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.

Enumerator
IfxAsclin_DataLength_1	number of bits per transfer 0
IfxAsclin_DataLength_2	number of bits per transfer 1
IfxAsclin_DataLength_3	number of bits per transfer 2
IfxAsclin_DataLength_4	number of bits per transfer 3
IfxAsclin_DataLength_5	number of bits per transfer 4
IfxAsclin_DataLength_6	number of bits per transfer 5
IfxAsclin_DataLength_7	number of bits per transfer 6
IfxAsclin_DataLength_8	number of bits per transfer 7
IfxAsclin_DataLength_9	number of bits per transfer 8
IfxAsclin_DataLength_10	number of bits per transfer 9
IfxAsclin_DataLength_11	number of bits per transfer 10
IfxAsclin_DataLength_12	number of bits per transfer 11
IfxAsclin_DataLength_13	number of bits per transfer 12
IfxAsclin_DataLength_14	number of bits per transfer 13
IfxAsclin_DataLength_15	number of bits per transfer 14
IfxAsclin_DataLength_16	number of bits per transfer 15

Definition at line 114 of file IfxAsclin.h.

enum IfxAsclin_FrameMode

Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE.

Enumerator
IfxAsclin_FrameMode_initialise	initialise mode
IfxAsclin_FrameMode_asc	asc mode
IfxAsclin_FrameMode_spi	spi mode
IfxAsclin_FrameMode_lin	lin mode

Definition at line 137 of file IfxAsclin.h.

enum IfxAsclin_HeaderResponseSelect

Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO.

Enumerator
IfxAsclin_HeaderResponseSelect_headerAndResponse	header and response expected
IfxAsclin_HeaderResponseSelect_headerOnly	header only expected

Definition at line 148 of file IfxAsclin.h.

enum IfxAsclin_IdleDelay

Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE.

Enumerator
IfxAsclin_IdleDelay_0	idle delay in 0 bit times
IfxAsclin_IdleDelay_1	idle delay in 1 bit times
IfxAsclin_IdleDelay_2	idle delay in 2 bit times
IfxAsclin_IdleDelay_3	idle delay in 3 bit times
IfxAsclin_IdleDelay_4	idle delay in 4 bit times
IfxAsclin_IdleDelay_5	idle delay in 5 bit times
IfxAsclin_IdleDelay_6	idle delay in 6 bit times
IfxAsclin_IdleDelay_7	idle delay in 7 bit times

Definition at line 159 of file IfxAsclin.h.

enum IfxAsclin_LeadDelay

Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD.

Enumerator
IfxAsclin_LeadDelay_0	lead delay in 0 bit times
IfxAsclin_LeadDelay_1	lead delay in 1 bit times
IfxAsclin_LeadDelay_2	lead delay in 2 bit times
IfxAsclin_LeadDelay_3	lead delay in 3 bit times
IfxAsclin_LeadDelay_4	lead delay in 4 bit times
IfxAsclin_LeadDelay_5	lead delay in 5 bit times
IfxAsclin_LeadDelay_6	lead delay in 6 bit times
IfxAsclin_LeadDelay_7	lead delay in 7 bit times

Definition at line 175 of file IfxAsclin.h.

enum IfxAsclin_LinMode

Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS.

Enumerator
IfxAsclin_LinMode_slave	operates in slave mode
IfxAsclin_LinMode_master	operates in master mode

Definition at line 190 of file IfxAsclin.h.

enum IfxAsclin_LinResponseTimeoutMode

Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM.

Enumerator
IfxAsclin_LinResponseTimeoutMode_frameTimeout	timeout threshold is for frame
IfxAsclin_LinResponseTimeoutMode_responseTimeout	timeout threshold is for reponse

Definition at line 199 of file IfxAsclin.h.

enum IfxAsclin_OversamplingFactor

Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING.

Enumerator
IfxAsclin_OversamplingFactor_4	oversampling factor 4
IfxAsclin_OversamplingFactor_5	oversampling factor 5
IfxAsclin_OversamplingFactor_6	oversampling factor 6
IfxAsclin_OversamplingFactor_7	oversampling factor 7
IfxAsclin_OversamplingFactor_8	oversampling factor 8
IfxAsclin_OversamplingFactor_9	oversampling factor 9
IfxAsclin_OversamplingFactor_10	oversampling factor 10
IfxAsclin_OversamplingFactor_11	oversampling factor 11
IfxAsclin_OversamplingFactor_12	oversampling factor 12
IfxAsclin_OversamplingFactor_13	oversampling factor 13
IfxAsclin_OversamplingFactor_14	oversampling factor 14
IfxAsclin_OversamplingFactor_15	oversampling factor 15
IfxAsclin_OversamplingFactor_16	oversampling factor 16

Definition at line 208 of file IfxAsclin.h.

enum IfxAsclin_ParityType

Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD.

Enumerator
IfxAsclin_ParityType_even	even parity
IfxAsclin_ParityType_odd	odd parity

Definition at line 228 of file IfxAsclin.h.

enum IfxAsclin_ReceiveBufferMode

Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.

Enumerator
IfxAsclin_ReceiveBufferMode_rxFifo	RxFIFO mode.
IfxAsclin_ReceiveBufferMode_rxBuffer	single stage Rx buffer

Definition at line 237 of file IfxAsclin.h.

enum IfxAsclin_RtsCtsPolarity

Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL.

Enumerator
IfxAsclin_RtsCtsPolarity_activeHigh	ready/clear are active-high
IfxAsclin_RtsCtsPolarity_activeLow	ready/clear are active-low

Definition at line 246 of file IfxAsclin.h.

enum IfxAsclin_RxFifoInterruptLevel

Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_RxFifoInterruptLevel_1	RX FIFO level 1.
IfxAsclin_RxFifoInterruptLevel_2	RX FIFO level 2.
IfxAsclin_RxFifoInterruptLevel_3	RX FIFO level 3.
IfxAsclin_RxFifoInterruptLevel_4	RX FIFO level 4.
IfxAsclin_RxFifoInterruptLevel_5	RX FIFO level 5.
IfxAsclin_RxFifoInterruptLevel_6	RX FIFO level 6.
IfxAsclin_RxFifoInterruptLevel_7	RX FIFO level 7.
IfxAsclin_RxFifoInterruptLevel_8	RX FIFO level 8.
IfxAsclin_RxFifoInterruptLevel_9	RX FIFO level 9.
IfxAsclin_RxFifoInterruptLevel_10	RX FIFO level 10.
IfxAsclin_RxFifoInterruptLevel_11	RX FIFO level 11.
IfxAsclin_RxFifoInterruptLevel_12	RX FIFO level 12.
IfxAsclin_RxFifoInterruptLevel_13	RX FIFO level 13.
IfxAsclin_RxFifoInterruptLevel_14	RX FIFO level 14.
IfxAsclin_RxFifoInterruptLevel_15	RX FIFO level 15.
IfxAsclin_RxFifoInterruptLevel_16	RX FIFO level 16.

Definition at line 255 of file IfxAsclin.h.

enum IfxAsclin_RxFifoOutletWidth

Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW.

Enumerator
IfxAsclin_RxFifoOutletWidth_0	number of bytes 0
IfxAsclin_RxFifoOutletWidth_1	number of bytes 1
IfxAsclin_RxFifoOutletWidth_2	number of bytes 2
IfxAsclin_RxFifoOutletWidth_3	number of bytes 3

Definition at line 278 of file IfxAsclin.h.

enum IfxAsclin_RxInputSelect

Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI.

Enumerator
IfxAsclin_RxInputSelect_0	alternate input selection 0
IfxAsclin_RxInputSelect_1	alternate input selection 1
IfxAsclin_RxInputSelect_2	alternate input selection 2
IfxAsclin_RxInputSelect_3	alternate input selection 3
IfxAsclin_RxInputSelect_4	alternate input selection 4
IfxAsclin_RxInputSelect_5	alternate input selection 5
IfxAsclin_RxInputSelect_6	alternate input selection 6
IfxAsclin_RxInputSelect_7	alternate input selection 7

Definition at line 289 of file IfxAsclin.h.

enum IfxAsclin_SamplePointPosition

Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.

Enumerator
IfxAsclin_SamplePointPosition_1	sample point position at 1
IfxAsclin_SamplePointPosition_2	sample point position at 2
IfxAsclin_SamplePointPosition_3	sample point position at 3
IfxAsclin_SamplePointPosition_4	sample point position at 4
IfxAsclin_SamplePointPosition_5	sample point position at 5
IfxAsclin_SamplePointPosition_6	sample point position at 6
IfxAsclin_SamplePointPosition_7	sample point position at 7
IfxAsclin_SamplePointPosition_8	sample point position at 8
IfxAsclin_SamplePointPosition_9	sample point position at 9
IfxAsclin_SamplePointPosition_10	sample point position at 10
IfxAsclin_SamplePointPosition_11	sample point position at 11
IfxAsclin_SamplePointPosition_12	sample point position at 12
IfxAsclin_SamplePointPosition_13	sample point position at 13
IfxAsclin_SamplePointPosition_14	sample point position at 14
IfxAsclin_SamplePointPosition_15	sample point position at 15

Definition at line 304 of file IfxAsclin.h.

enum IfxAsclin_SamplesPerBit

Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM.

Enumerator
IfxAsclin_SamplesPerBit_one	one sample per bit
IfxAsclin_SamplesPerBit_three	three samples per bit

Definition at line 326 of file IfxAsclin.h.

enum IfxAsclin_ShiftDirection

SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB.

Enumerator
IfxAsclin_ShiftDirection_lsbFirst	LSB first.
IfxAsclin_ShiftDirection_msbFirst	MSB first.

Definition at line 336 of file IfxAsclin.h.

enum IfxAsclin_SlavePolarity

Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL.

Enumerator
IfxAsclin_SlavePolarity_idleLow	idle low
IfxAsclin_SlavePolarity_idlehigh	idle high

Definition at line 346 of file IfxAsclin.h.

enum IfxAsclin_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS.

Enumerator
IfxAsclin_SleepMode_enable	enables sleep mode
IfxAsclin_SleepMode_disable	disables sleep mode

Definition at line 355 of file IfxAsclin.h.

enum IfxAsclin_Status

Error status.

Enumerator
IfxAsclin_Status_configurationError	Configuration error.
IfxAsclin_Status_noError	No error.

Definition at line 363 of file IfxAsclin.h.

enum IfxAsclin_StopBit

ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP.

Enumerator
IfxAsclin_StopBit_0	number of stop bits 0
IfxAsclin_StopBit_1	number of stop bits 1
IfxAsclin_StopBit_2	number of stop bits 2
IfxAsclin_StopBit_3	number of stop bits 3
IfxAsclin_StopBit_4	number of stop bits 4
IfxAsclin_StopBit_5	number of stop bits 5
IfxAsclin_StopBit_6	number of stop bits 6
IfxAsclin_StopBit_7	number of stop bits 7

Definition at line 372 of file IfxAsclin.h.

enum IfxAsclin_TxFifoInletWidth

Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW.

Enumerator
IfxAsclin_TxFifoInletWidth_0	number of bytes 0
IfxAsclin_TxFifoInletWidth_1	number of bytes 1
IfxAsclin_TxFifoInletWidth_2	number of bytes 2
IfxAsclin_TxFifoInletWidth_3	number of bytes 3

Definition at line 387 of file IfxAsclin.h.

enum IfxAsclin_TxFifoInterruptLevel

Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_TxFifoInterruptLevel_0	TX FIFO level 0.
IfxAsclin_TxFifoInterruptLevel_1	TX FIFO level 1.
IfxAsclin_TxFifoInterruptLevel_2	TX FIFO level 2.
IfxAsclin_TxFifoInterruptLevel_3	TX FIFO level 3.
IfxAsclin_TxFifoInterruptLevel_4	TX FIFO level 4.
IfxAsclin_TxFifoInterruptLevel_5	TX FIFO level 5.
IfxAsclin_TxFifoInterruptLevel_6	TX FIFO level 6.
IfxAsclin_TxFifoInterruptLevel_7	TX FIFO level 7.
IfxAsclin_TxFifoInterruptLevel_8	TX FIFO level 8.
IfxAsclin_TxFifoInterruptLevel_9	TX FIFO level 9.
IfxAsclin_TxFifoInterruptLevel_10	TX FIFO level 10.
IfxAsclin_TxFifoInterruptLevel_11	TX FIFO level 11.
IfxAsclin_TxFifoInterruptLevel_12	TX FIFO level 12.
IfxAsclin_TxFifoInterruptLevel_13	TX FIFO level 13.
IfxAsclin_TxFifoInterruptLevel_14	TX FIFO level 14.
IfxAsclin_TxFifoInterruptLevel_15	TX FIFO level 15.

Definition at line 398 of file IfxAsclin.h.