iLLD_TC29x  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 
60 /******************************************************************************/
61 /*--------------------------------Enumerations--------------------------------*/
62 /******************************************************************************/
63 
64 /** \addtogroup IfxLld_Vadc_Std_Enum
65  * \{ */
66 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
67  */
68 typedef enum
69 {
70  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
71  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
72  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
73  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
74 } IfxVadc_AnalogConverterMode;
75 
76 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
77  */
78 typedef enum
79 {
80  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
81  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
82  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
83  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
84 } IfxVadc_ArbitrationRounds;
85 
86 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
87  */
88 typedef enum
89 {
90  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
91  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
92  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
93  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
94  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
95  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
96  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
97  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
98  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
99  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
100  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
101  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
102  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
103  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
104  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
105  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
106 } IfxVadc_BoundaryExtension;
107 
108 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
109  */
110 typedef enum
111 {
112  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
113  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
114  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
115  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
116 } IfxVadc_BoundarySelection;
117 
118 /** \brief VADC Channels
119  */
120 typedef enum
121 {
122  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
123  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
124  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
125  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
126  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
127  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
128  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
129  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
130  IfxVadc_ChannelId_7 = 7 /**< \brief Channel 7 */
131 } IfxVadc_ChannelId;
132 
133 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
134  */
135 typedef enum
136 {
137  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
138  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
139 } IfxVadc_ChannelReference;
140 
141 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
142  */
143 typedef enum
144 {
145  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
146  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
147  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
148  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
149 } IfxVadc_ChannelResolution;
150 
151 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
152  */
153 typedef enum
154 {
155  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
156  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
157  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
158  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
159  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
160  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
161  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
162  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
163  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
164  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
165  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
166  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
167  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
168  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
169  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
170  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
171 } IfxVadc_ChannelResult;
172 
173 /** \brief External Multiplexer Channel Selection Style as defined in
174  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
175  */
176 typedef enum
177 {
178  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
179  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
180  * associated channel for EMUX control */
181 } IfxVadc_ChannelSelectionStyle;
182 
183 /** \brief type of conversion
184  */
185 typedef enum
186 {
187  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
188 } IfxVadc_ConversionType;
189 
190 /** \brief Specifies the External Coding scheme(binary/gray)
191  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
192  */
193 typedef enum
194 {
195  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
196  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
197 } IfxVadc_EmuxCodingScheme;
198 
199 /** \brief Specifies the Emux interface
200  */
201 typedef enum
202 {
203  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
204  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
205 } IfxVadc_EmuxInterface;
206 
207 /** \brief External Multiplexer sample time control
208  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
209  */
210 typedef enum
211 {
212  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
213  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
214 } IfxVadc_EmuxSampleTimeControl;
215 
216 /** \brief specifies the External Channel Start select value
217  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
218  */
219 typedef enum
220 {
221  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
222  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
223  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
224  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
225  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
226  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
227  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
228  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
229 } IfxVadc_EmuxSelectValue;
230 
231 /** \brief Specifies External Multiplexer Mode
232  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
233  */
234 typedef enum
235 {
236  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
237  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
238  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
239  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
240 } IfxVadc_ExternalMultiplexerMode;
241 
242 /** \brief FIFO mode enable
243  */
244 typedef enum
245 {
246  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
247  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
248  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
249  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
250 } IfxVadc_FifoMode;
251 
252 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
253  */
254 typedef enum
255 {
256  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
257  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
258  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
259  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
260 } IfxVadc_GatingMode;
261 
262 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
263  */
264 typedef enum
265 {
266  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
267  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
268  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
269  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
270  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
271  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
272  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
273  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
274  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
275  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
276  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
277  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
278  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
279  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
280  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
281  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
282 } IfxVadc_GatingSource;
283 
284 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
285  */
286 typedef enum
287 {
288  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
289  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
290  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
291  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
292 } IfxVadc_InputClasses;
293 
294 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
295  */
296 typedef enum
297 {
298  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
299  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
300  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
301  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
302 } IfxVadc_LimitCheck;
303 
304 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
305  */
306 typedef enum
307 {
308  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
309  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
310  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
311  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
312  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
313  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
314  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
315  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
316  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
317  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
318  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
319  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
320  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
321  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
322  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
323  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
324  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
325  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
326  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
327  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
328  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
329  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
330  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
331  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
332  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
333  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
334  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
335  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
336  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
337  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
338  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
340  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
341  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
342  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
343  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
344  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
345  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
346  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
347  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
348  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
349  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
350  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
351  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
352  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
353  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
354  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
356  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
357  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
358  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
359  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
360  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
361  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
362  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
363  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
364  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
365  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
366  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
367  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
368  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
369  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
370  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371 } IfxVadc_Protection;
372 
373 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
374  */
375 typedef enum
376 {
377  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
378  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
379  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
380  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
381 } IfxVadc_RequestSlotPriority;
382 
383 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
384  */
385 typedef enum
386 {
387  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
388  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
389 } IfxVadc_RequestSlotStartMode;
390 
391 /** \brief Request sources
392  */
393 typedef enum
394 {
395  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
396  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
397  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
398 } IfxVadc_RequestSource;
399 
400 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
401  * Definition in Ifx_VADC.CLC.B.EDIS
402  */
403 typedef enum
404 {
405  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
406  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
407 } IfxVadc_SleepMode;
408 
409 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
410  */
411 typedef enum
412 {
413  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
414  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
415  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
416  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
417  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
418  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
419  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
420  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
421 } IfxVadc_SrcNr;
422 
423 /** \brief API return values defined in
424  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
425  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
426  */
427 typedef enum
428 {
429  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
430  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
431  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
432  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
433  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
434  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
435  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
436 } IfxVadc_Status;
437 
438 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
439  */
440 typedef enum
441 {
442  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
443  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
444  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
445  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
446 } IfxVadc_TriggerMode;
447 
448 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
449  */
450 typedef enum
451 {
452  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
453  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
454  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
455  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
456  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
457  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
458  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
459  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
460  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
461  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
462  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
463  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
464  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
465  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
466  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
467  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
468 } IfxVadc_TriggerSource;
469 
470 /** \} */
471 
472 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
473  * \{ */
474 
475 /******************************************************************************/
476 /*-------------------------Inline Function Prototypes-------------------------*/
477 /******************************************************************************/
478 
479 /** \brief access function to enable/disable wait for read mode for result registers
480  * \param group pointer to the VADC group
481  * \param resultIdx result register index
482  * \param waitForRead wait for read mode enabled/disabled
483  * \return None
484  */
485 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
486 
487 /** \brief access function to enable/disable wait for read mode for global result register
488  * \param vadc pointer to the VADC
489  * \param waitForRead wait for read mode enabled/disabled
490  * \return None
491  */
492 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
493 
494 /** \brief Enables the background sacn external trigger.
495  * \param vadc pointer to the base of VADC registers.
496  * \return None
497  */
498 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
499 
500 /** \brief Gets the background scan gating mode.
501  * \param vadc pointer to the base of VADC registers.
502  * \return background scan gating mode.
503  */
504 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
505 
506 /** \brief Gets the gating input selection.
507  * \param vadc pointer to the base of VADC registers.
508  * \return background scan gating input selection.
509  */
510 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
511 
512 /** \brief Gets the requested background scan slot priority.
513  * \param vadcG pointer to VADC group registers.
514  * \return requested background scan slot priority.
515  */
516 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
517 
518 /** \brief Gets the requested background scan slot start mode.
519  * \param vadcG pointer to VADC group registers.
520  * \return requested background scan slot start mode.
521  */
522 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
523 
524 /** \brief Gets the background scan trigger input.
525  * \param vadc pointer to the base of VADC registers.
526  * \return Gets the background scan external trigger source.
527  */
528 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
529 
530 /** \brief Gets the background scan external trigger mode.
531  * \param vadc pointer to the base of VADC registers.
532  * \return background scan external trigger mode.
533  */
534 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
535 
536 /** \brief get global input class resolution
537  * \param vadc Pointer to the VADC Group
538  * \param inputClassNum global input class number
539  * \return ADC input class channel resolution.
540  */
541 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
542 
543 /** \brief return conversion result stored in the Global result Register
544  * \param vadc pointer to the VADC module
545  * \return global result register
546  *
547  * \code
548  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
549  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
550  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
551  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
552  *
553  * //confiure wait for read mode for global result register
554  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
555  *
556  * // configure background scan
557  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
558  *
559  * // enable auto scan
560  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
561  *
562  * // start the background scan
563  * IfxVadc_startBackgroundScan(vadc);
564  *
565  * Ifx_VADC_GLOBRES result;
566  * result = IfxVadc_getGlobalResult (vadc);
567  *
568  * \endcode
569  *
570  */
571 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
572 
573 /** \brief get global input class sample time in sec
574  * \param vadc Pointer to the VADC Group Register space
575  * \param inputClassNum ADC input class number
576  * \param analogFrequency ADC module analog frequency in Hz.
577  * \return ADC input class channel sample time in sec.
578  */
579 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
580 
581 /** \brief Get conversion result for the group
582  * \param group pointer to the VADC group
583  * \param results pointer to scaled conversion results
584  * \param resultOffset offset for the first result
585  * \param numResults number of results
586  * \return None
587  *
588  * \code
589  * Ifx_VADC* vadc = &MODULE_VADC
590  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
591  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
592  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
593  *
594  * //confiure wait for read mode for global result register
595  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
596  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
597  *
598  * // configure scan
599  * IfxVadc_setScan(group, channels, mask);
600  *
601  * // enable auto scan
602  * IfxVadc_setAutoScan(group, TRUE);
603  *
604  * // start the scan
605  * IfxVadc_startScan(group);
606  *
607  * // wait for conversion to finish
608  *
609  * // fetch the 2 results of conversion for group 0
610  * Ifx_VADC_RES results[10];
611  * result = IfxVadc_getGroupResult(group, results, 0, 2);
612  * \endcode
613  *
614  */
615 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
616 
617 /** \brief Get conversion result (Function does not care about the alignment)
618  * value = raw * gain + offset.
619  * \param group pointer to the VADC group
620  * \param resultIdx result register index
621  * \return scaled Conversion result
622  *
623  * \code
624  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
625  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
626  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
627  *
628  * //confiure wait for read mode for global result register
629  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
630  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
631  *
632  * // configure scan
633  * IfxVadc_setScan(group, channels, mask);
634  *
635  * // enable auto scan
636  * IfxVadc_setAutoScan(group, TRUE);
637  *
638  * // start the scan
639  * IfxVadc_startScan(group);
640  *
641  * // wait for conversion to finish
642  *
643  * // fetch the result of conversion from result register 0 for group 0
644  * Ifx_VADC_RES result;
645  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
646  * \endcode
647  *
648  */
649 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
650 
651 /** \brief Returns the auto background scan status.
652  * \param vadc pointer to the base of VADC registers.
653  * \return TRUE if enabled otherwise FALSE.
654  */
655 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
656 
657 /** \brief Returns the background scan slot requested status.
658  * \param vadcG pointer to VADC group registers.
659  * \return background scan slot requested status.
660  */
661 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
662 
663 /** \brief Enables/Disables continuous background auto scan
664  * \param vadc pointer to the base of VADC registers.
665  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
666  * \return None
667  */
668 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
669 
670 /** \brief configures a background scan; can also stop autoscan if all channels are 0
671  * \param vadc pointer to the VADC module registers
672  * \param groupId group index
673  * \param channels specifies the channels which should be enabled/disabled
674  * \param mask specifies the channels which should be modified
675  * \return None
676  *
677  * Background scan can be enabled/disabled for the given channels which are selected with the mask
678  *
679  * \code
680  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
681  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
682  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
683  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
684  *
685  * //confiure wait for read mode for global result register
686  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
687  *
688  * // configure background scan
689  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
690  *
691  * // enable auto scan
692  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
693  *
694  * // start the background scan
695  * IfxVadc_startBackgroundScan(vadc);
696  * \endcode
697  *
698  */
699 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
700 
701 /** \brief Sets the background scan slot gating configurations.
702  * \param vadc pointer to the base of VADC registers.
703  * \param gatingSource gate input for group.
704  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
705  * \return None
706  */
707 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
708 
709 /** \brief Sets the background scan exteranal trigger operating configurations.
710  * \param vadc pointer to the base of VADC registers.
711  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
712  * \param triggerSource trigger input for group.
713  * \return None
714  */
715 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
716 
717 /** \brief Starts a background scan
718  * \param vadc pointer to the VADC module
719  * \return None
720  *
721  * \see IfxVadc_setBackgroundScan
722  *
723  */
724 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
725 
726 /******************************************************************************/
727 /*-------------------------Global Function Prototypes-------------------------*/
728 /******************************************************************************/
729 
730 /** \brief Gives the background scan status for a group
731  * \param vadc pointer to the VADC module
732  * \return IfxVadc_Status
733  */
734 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
735 
736 /** \brief Get conversion result (Function does not care about the alignment)
737  * value = raw * gain + offset.
738  * \param vadc VADC module pointer
739  * \param group pointer to the VADC group
740  * \param channel channel Id
741  * \param sourceType type of request source
742  * \return scaled Conversion result
743  *
744  * \code
745  * Ifx_VADC vadc;
746  * vadc.vadc = &MODULE_VADC;
747  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
748  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
749  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
750  *
751  * //confiure wait for read mode for global result register
752  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
753  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
754  *
755  * // configure scan
756  * IfxVadc_setScan(group, channels, mask);
757  *
758  * // start the scan
759  * IfxVadc_startScan(group);
760  *
761  * // wait for conversion to finish
762  *
763  * // fetch the result of conversion for channel 2 of group 0
764  * Ifx_VADC_RESresult2;
765  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
766  * Ifx_VADC_RESresult5;
767  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
768  * \endcode
769  *
770  */
771 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
772 
773 /** \} */
774 
775 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
776  * \{ */
777 
778 /******************************************************************************/
779 /*-------------------------Inline Function Prototypes-------------------------*/
780 /******************************************************************************/
781 
782 /** \brief Disables the scan slot external trigger.
783  * \param vadcG pointer to VADC group registers.
784  * \return None
785  */
786 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
787 
788 /** \brief Enables the scan slot external trigger.
789  * \param vadcG pointer to VADC group registers.
790  * \return None
791  */
792 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
793 
794 /** \brief Gets the request scan slot gating mode.
795  * \param vadcG pointer to VADC group registers.
796  * \return requested scan slot gating mode.
797  */
798 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
799 
800 /** \brief Gets the request scan slot gating input.
801  * \param vadcG pointer to VADC group registers.
802  * \return request scan slot gating input.
803  */
804 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
805 
806 /** \brief Gets the request scan slot priority.
807  * \param vadcG pointer to VADC group registers.
808  * \return request scan slot priority.
809  */
810 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
811 
812 /** \brief Gets the request scan slot start mode.
813  * \param vadcG pointer to VADC group registers.
814  * \return request scan slot start mode.
815  */
816 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
817 
818 /** \brief Gets the requested scan slot trigger input.
819  * \param vadcG pointer to VADC group registers.
820  * \return requested scan slot trigger input.
821  */
822 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
823 
824 /** \brief Gets the requested scan slot trigger mode.
825  * \param vadcG pointer to VADC group registers.
826  * \return requested scan slot trigger mode.
827  */
828 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
829 
830 /** \brief Gets the auto scan enable status.
831  * \param vadcG pointer to VADC group registers.
832  * \return TRUE if auto scan enabled otherwise FALSE.
833  */
834 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
835 
836 /** \brief Returns the scan slot requested status.
837  * \param vadcG pointer to VADC group registers.
838  * \return TRUE if scan slot request enabled otherwise FALSE.
839  */
840 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
841 
842 /** \brief Enables/Disables continuous auto scan
843  * \param vadcG pointer to VADC group registers.
844  * \param autoscanEnable whether autoscan is enabled or not.
845  * \return None
846  */
847 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
848 
849 /** \brief Sets the scan slot gating configuration.
850  * \param vadcG pointer to VADC group registers.
851  * \param gatingSource gate input for group.
852  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
853  * \return None
854  */
855 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
856 
857 /** \brief Sets the scan slot trigger operating configurations.
858  * \param vadcG pointer to VADC group registers.
859  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
860  * \param triggerSource trigger input for group.
861  * \return None
862  */
863 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
864 
865 /** \brief Starts an autoscan on the specified group
866  * \param group pointer to the VADC group
867  * \return None
868  *
869  * See \ref IfxVadc_setScan
870  *
871  */
872 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
873 
874 /******************************************************************************/
875 /*-------------------------Global Function Prototypes-------------------------*/
876 /******************************************************************************/
877 
878 /** \brief Gives the scan status for a group
879  * \param group pointer to the VADC group
880  * \return IfxVadc_Status
881  */
882 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
883 
884 /** \brief Configures an (auto-)scan
885  * \param group pointer to the VADC group
886  * \param channels specifies the channels which should be enabled/disabled
887  * \param mask specifies the channels which should be modified
888  * \return None
889  *
890  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
891  *
892  * \code
893  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
894  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
895  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
896  *
897  * // configure scan
898  * IfxVadc_setScan(group, channels, mask);
899  *
900  * // enable Auto-Scan
901  * IfxVadc_setAutoScan(group, TRUE);
902  *
903  * // start the scan
904  * IfxVadc_startScan(group);
905  * \endcode
906  *
907  */
908 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
909 
910 /** \} */
911 
912 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
913  * \{ */
914 
915 /******************************************************************************/
916 /*-------------------------Inline Function Prototypes-------------------------*/
917 /******************************************************************************/
918 
919 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
920  * refill incase of aborted conversion
921  * source interrupt enable/disable
922  * external trigger control of the aborted conversion
923  * \param group pointer to the VADC group
924  * \param channel specifies channel Id
925  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
926  * \return None
927  *
928  * \code
929  *
930  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
931  * IfxVadc_ChannelId channel = 1; // for channel 1
932  * // Add channel 1 to queue of group 0 with the refill turned on
933  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
934  * \endcode
935  *
936  */
937 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
938 
939 /** \brief Clears all the queue entries including backup stage.
940  * \param vadcG pointer to VADC group registers.
941  * \param flushQueue Whether queue is cleared or not.
942  * \return None
943  */
944 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
945 
946 /** \brief Disables the external trigger.
947  * \param vadcG pointer to VADC group registers.
948  * \return None
949  */
950 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
951 
952 /** \brief Enables the external trigger.
953  * \param vadcG pointer to VADC group registers.
954  * \return None
955  */
956 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
957 
958 /** \brief Gets the requested queue slot gating mode.
959  * \param vadcG pointer to VADC group registers.
960  * \return requested queue slot gating mode.
961  */
962 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
963 
964 /** \brief Gets the requested queue slot gating input.
965  * \param vadcG pointer to VADC group registers.
966  * \return requested queue slot gating input.
967  */
968 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
969 
970 /** \brief Gets the request queue slot priority.
971  * \param vadcG pointer to VADC group registers.
972  * \return requested queue slot priority.
973  */
974 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
975 
976 /** \brief Gets the requested queue slot start mode.
977  * \param vadcG pointer to VADC group registers.
978  * \return requested queue slot start mode.
979  */
980 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
981 
982 /** \brief Gets the requested queue slot trigger input.
983  * \param vadcG pointer to VADC group registers.
984  * \return requested queue slot trigger input.
985  */
986 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
987 
988 /** \brief Gets the requested queue slot trigger mode.
989  * \param vadcG pointer to VADC group registers.
990  * \return requested queue slot trigger mode.
991  */
992 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
993 
994 /** \brief Returns the queue slot requested status.
995  * \param vadcG pointer to VADC group registers.
996  * \return TRUE if queue slot request enabled otherwise FALSE.
997  */
998 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
999 
1000 /** \brief Sets the gating configurations.
1001  * \param vadcG pointer to VADC group registers.
1002  * \param gatingSource gate input for group.
1003  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1004  * \return None
1005  */
1006 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1007 
1008 /** \brief Sets the trigger operating configurations.
1009  * \param vadcG pointer to VADC group registers.
1010  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1011  * \param triggerSource trigger input for group.
1012  * \return None
1013  */
1014 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1015 
1016 /** \brief Starts a queue of a group by generating a trigger event through software
1017  * \param group pointer to the VADC group
1018  * \return None
1019  */
1020 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1021 
1022 /******************************************************************************/
1023 /*-------------------------Global Function Prototypes-------------------------*/
1024 /******************************************************************************/
1025 
1026 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1027  * \param group pointer to the VADC group
1028  * \return status of the Queue
1029  *
1030  * \code
1031  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1032  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1033  * \endcode
1034  *
1035  */
1036 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1037 
1038 /** \} */
1039 
1040 /** \addtogroup IfxLld_Vadc_Std_IO
1041  * \{ */
1042 
1043 /******************************************************************************/
1044 /*-------------------------Inline Function Prototypes-------------------------*/
1045 /******************************************************************************/
1046 
1047 /** \brief Initializes a EMUX output
1048  * \param emux the Emux Pin which should be configured
1049  * \param outputMode the pin output mode which should be configured
1050  * \param padDriver the pad driver mode which should be configured
1051  * \return None
1052  */
1053 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1054 
1055 /** \brief Initializes a GxBFL output
1056  * \param gxBfl the GxBFL Pin which should be configured
1057  * \param outputMode the pin output mode which should be configured
1058  * \param padDriver the pad driver mode which should be configured
1059  * \return None
1060  */
1061 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1062 
1063 /** \} */
1064 
1065 /** \addtogroup IfxLld_Vadc_Std_Frequency
1066  * \{ */
1067 
1068 /******************************************************************************/
1069 /*-------------------------Inline Function Prototypes-------------------------*/
1070 /******************************************************************************/
1071 
1072 /** \brief Calculate the time using analog frequency.
1073  * \param analogFrequency analog frequency in Hz.
1074  * \param sampleTime sample time in sec.
1075  * \return sample time in sec.
1076  */
1077 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1078 
1079 /******************************************************************************/
1080 /*-------------------------Global Function Prototypes-------------------------*/
1081 /******************************************************************************/
1082 
1083 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1084  * \param vadc pointer to the base of VADC registers
1085  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1086  */
1087 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1088 
1089 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1090  * \param vadc pointer to the base of VADC registers
1091  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1092  */
1093 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1094 
1095 /** \} */
1096 
1097 /** \addtogroup IfxLld_Vadc_Std_Group
1098  * \{ */
1099 
1100 /******************************************************************************/
1101 /*-------------------------Inline Function Prototypes-------------------------*/
1102 /******************************************************************************/
1103 
1104 /** \brief Clears the all group requests.
1105  * \param vadcG pointer to VADC group registers.
1106  * \return None
1107  */
1108 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1109 
1110 /** \brief Gets the ADC group arbitration round length.
1111  * \param vadcG pointer to VADC group registers.
1112  * \return ADC group arbitration round length.
1113  */
1114 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1115 
1116 /** \brief Gets the channel esult service request node pointer 0.
1117  * \param vadcG pointer to VADC group registers.
1118  * \return channel result service request node pointer 0.
1119  */
1120 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1121 
1122 /** \brief Gets the channel esult service request node pointer 1.
1123  * \param vadcG pointer to VADC group registers.
1124  * \return channel result service request node pointer 1.
1125  */
1126 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1127 
1128 /** \brief Gets the channel service request node pointer.
1129  * \param vadcG pointer to VADC group registers.
1130  * \return channel service request node pointer.
1131  */
1132 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1133 
1134 /** \brief Gets the configured master index.
1135  * \param vadcG pointer to VADC group registers.
1136  * \return configured master kernel index.
1137  */
1138 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1139 
1140 /** \brief Resets the ADC group.
1141  * \param vadcG pointer to VADC group registers.
1142  * \return None
1143  */
1144 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1145 
1146 /** \brief Sets analog converter group number.
1147  * \param vadcG pointer to VADC group registers.
1148  * \param analogConverterMode group analog converter mode.
1149  * \return None
1150  */
1151 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1152 
1153 /** \brief Sets the arbiter round length.
1154  * \param vadcG pointer to VADC group registers.
1155  * \param arbiterRoundLength arbiter round length.
1156  * \return None
1157  */
1158 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1159 
1160 /** \brief Sets the ADC input class channel resolution.
1161  * \param vadcG pointer to VADC group registers.
1162  * \param inputClassNum input class number.
1163  * \param resolution ADC input class channel resolution.
1164  * \return None
1165  */
1166 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1167 
1168 /** \brief Sets the ADC input class sample time.
1169  * \param vadcG pointer to VADC group registers.
1170  * \param inputClassNum input class number.
1171  * \param analogFrequency ADC analog frequency in Hz.
1172  * \param sampleTime request sample time in sec for input class.
1173  * \return None
1174  */
1175 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1176 
1177 /** \brief Sets the master index.
1178  * \param vadcG pointer to VADC group registers.
1179  * \param masterIndex master index.
1180  * \return None
1181  */
1182 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1183 
1184 /******************************************************************************/
1185 /*-------------------------Global Function Prototypes-------------------------*/
1186 /******************************************************************************/
1187 
1188 /** \brief Sets the Arbiter slot configurations.
1189  * \param vadcG pointer to VADC group registers.
1190  * \param slotEnable enable/disable of slot.
1191  * \param prio channel request priority.
1192  * \param mode Channel Slot start mode.
1193  * \param slot channel slot Request source.
1194  * \return None
1195  */
1196 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1197 
1198 /** \} */
1199 
1200 /** \addtogroup IfxLld_Vadc_Std_Module
1201  * \{ */
1202 
1203 /******************************************************************************/
1204 /*-------------------------Inline Function Prototypes-------------------------*/
1205 /******************************************************************************/
1206 
1207 /** \brief Disable VADC Module
1208  * \param vadc Pointer to VADC Module
1209  * \return None
1210  */
1211 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1212 
1213 /** \brief Enable VADC kernel.
1214  * \param vadc pointer to the base of VADC registers.
1215  * \return None
1216  */
1217 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1218 
1219 /** \brief gets ADC Calibration Flag CAL status.
1220  * \param vadc pointer to VADC group registers.
1221  * \param adcCalGroupNum ADC CAL group number.
1222  * \return CAL group status.
1223  */
1224 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1225 
1226 /** \brief get the converter clock type
1227  * \return Adc clock type
1228  */
1229 IFX_INLINE IfxScuCcu_AdcClockSelection IfxVadc_getConverterClockType(void);
1230 
1231 /** \brief Gets the global control configuration value.
1232  * \param vadc pointer to the base of VADC registers.
1233  * \return global control configuration value.
1234  */
1235 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1236 
1237 /** \brief get SUCAL bit field status
1238  * \param vadc Pointer to VADC Module
1239  * \return Indicate the start-up calibration phase
1240  */
1241 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1242 
1243 /** \brief initiates the calibration pulse phase.
1244  * \param vadc pointer to the base of VADC registers
1245  * \return None
1246  */
1247 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1248 
1249 /** \brief Sets the channel conversion mode.
1250  * \param vadc pointer to VADC module registers.
1251  * \param inputClassNum global input class number.
1252  * \param resolution ADC channel resolution.
1253  * \return None
1254  */
1255 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1256 
1257 /** \brief Sets the sample time of ADC global class.
1258  * \param vadc pointer to VADC module registers.
1259  * \param inputClassNum global input class number.
1260  * \param analogFrequency ADC analog frequency in Hz.
1261  * \param sampleTime the requested sample time for input class in sec.
1262  * \return None
1263  */
1264 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1265 
1266 /** \brief Sets the sensitivity of the module to sleep signal
1267  * \param vadc pointer to VADC registers
1268  * \param mode mode selection (enable/disable)
1269  * \return None
1270  */
1271 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1272 
1273 /******************************************************************************/
1274 /*-------------------------Global Function Prototypes-------------------------*/
1275 /******************************************************************************/
1276 
1277 /** \brief Disable write access to the VADC config/control registers.
1278  * \param vadc pointer to the base of VADC registers.
1279  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1280  * \return None
1281  */
1282 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1283 
1284 /** \brief Disables the post calibration.
1285  * \param vadc pointer to the base of VADC registers.
1286  * \param group Index of the group.
1287  * \param disable disable or not.
1288  * \return None
1289  */
1290 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1291 
1292 /** \brief Enable write access to the VADC config/control registers.
1293  * \param vadc pointer to the base of VADC registers.
1294  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1295  * \return None
1296  */
1297 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1298 
1299 /** \brief Module Frequency in Hz
1300  * \return Module Frequency in Hz.
1301  */
1302 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1303 
1304 /** \brief Gives the SRC source address.
1305  * \param group Index of the group
1306  * \param index SRC number
1307  * \return SRC source address
1308  */
1309 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1310 
1311 /** \brief Initialises ADC arbiter clock.
1312  * \param vadc pointer to the base of VADC registers
1313  * \param arbiterClockDivider ADC arbiter clock divider.
1314  * \return None
1315  */
1316 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1317 
1318 /** \brief Initialises the ADC Converter clock.
1319  * \param vadc pointer to the base of VADC registers
1320  * \param converterClockDivider ADC converter clock divider.
1321  * \return None
1322  */
1323 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1324 
1325 /** \brief Configure the FadcD vadc digital clock.
1326  * \param vadc pointer to the base of VADC registers.
1327  * \param fAdcD ADC digital clock frequency in Hz.
1328  * \return calculated ADC digital clock frequency in Hz.
1329  */
1330 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1331 
1332 /** \brief Configure the ADC analog clock.
1333  * \param vadc pointer to the base of VADC registers.
1334  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1335  * \return ADC analog clock frequency in Hz.
1336  */
1337 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1338 
1339 /** \brief Return the post calibration status
1340  * \param vadc Pointer to VADC module
1341  * \param group specifies Group ID
1342  * \return TRUE if the post calibration is enabled for the group else false
1343  */
1344 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1345 
1346 /** \brief Resets the kernel.
1347  * \param vadc pointer to the base of VADC registers.
1348  * \return None
1349  */
1350 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1351 
1352 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1353  * \param vadc pointer to the base of VADC registers.
1354  * \return None
1355  */
1356 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1357 
1358 /** \} */
1359 
1360 /** \addtogroup IfxLld_Vadc_Std_Channel
1361  * \{ */
1362 
1363 /******************************************************************************/
1364 /*-------------------------Inline Function Prototypes-------------------------*/
1365 /******************************************************************************/
1366 
1367 /** \brief Clears the channel request.
1368  * \param vadcG pointer to VADC group registers.
1369  * \param channelId channel id whose request to be cleared.
1370  * \return None
1371  */
1372 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1373 
1374 /** \brief Enables the FIFO mode.
1375  * \param vadcG pointer to VADC group registers.
1376  * \param resultRegister channel result register.
1377  * \param fifoMode FIFO mode .
1378  * \return None
1379  */
1380 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1381 
1382 /**
1383  * \param vadcG pointer to VADC group registers.
1384  * \param resultRegister channel result register.
1385  * \return None
1386  */
1387 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1388 
1389 /** \brief Gets the group's assigned channels.
1390  * \param vadcG pointer to VADC group registers.
1391  * \return group's assigned channels.
1392  */
1393 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1394 
1395 /** \brief Gets the current ADC channel control configurations.
1396  * \param vadcG pointer to VADC group registers.
1397  * \param channelIndex ADC channel number.
1398  * \return current ADC channel control configuration.
1399  */
1400 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1401 
1402 /** \brief Gets the channel input class
1403  * \param vadcG pointer to VADC Group register space
1404  * \param channelIndex specifies channel ID
1405  * \return Input class
1406  */
1407 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1408 
1409 /** \brief Gets the ADC input class channel resolution.
1410  * \param vadcG pointer to VADC group registers.
1411  * \param inputClassNum ADC input class number.
1412  * \return ADC input class channel resolution.
1413  */
1414 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1415 
1416 /** \brief Gets the ADC input class channel sample time.
1417  * \param vadcG pointer to VADC group registers.
1418  * \param inputClassNum ADC input class number.
1419  * \param analogFrequency ADC module analog frequency in Hz.
1420  * \return ADC input class channel sample time in sec.
1421  */
1422 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1423 
1424 /** \brief Sets the channels with low priority as background channel.
1425  * \param vadcG pointer to VADC group registers.
1426  * \param channelIndex group channel id.
1427  * \return None
1428  */
1429 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1430 
1431 /** \brief Sets the target for result background source.
1432  * \param vadcG pointer to VADC group registers.
1433  * \param channelIndex group channel id.
1434  * \param globalResultUsage whether storage in global result register.
1435  * \return None
1436  */
1437 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1438 
1439 /** \brief Selects boundary extension.
1440  * \param vadcG pointer to VADC group registers.
1441  * \param channelIndex group channel id.
1442  * \param boundaryMode boundary extension mode.
1443  * \return None
1444  */
1445 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1446 
1447 /** \brief Sets the channel event service request line.
1448  * \param vadcG pointer to VADC group registers.
1449  * \param channelSrcNr channel event Service Node.
1450  * \param channel channel number.
1451  * \return None
1452  */
1453 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1454 
1455 /** \brief Sets the channel input class.
1456  * \param vadcG pointer to VADC group registers.
1457  * \param channelIndex group channel id.
1458  * \param inputClass group input class.
1459  * \return None
1460  */
1461 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1462 
1463 /** \brief Sets the channel event mode.
1464  * \param vadcG pointer to VADC group registers.
1465  * \param channelIndex group channel id.
1466  * \param limitCheck channel event mode.
1467  * \return None
1468  */
1469 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1470 
1471 /** \brief Sets channel as priority channel with in the group.
1472  * \param vadcG pointer to VADC group registers.
1473  * \param channelIndex group channel id.
1474  * \return None
1475  */
1476 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1477 
1478 /** \brief Sets group's lower boundary.
1479  * \param vadcG pointer to VADC group registers.
1480  * \param channelIndex group channel id.
1481  * \param lowerBoundary group lower boundary.
1482  * \return None
1483  */
1484 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1485 
1486 /** \brief Selects the refernce input.
1487  * \param vadcG pointer to VADC group registers.
1488  * \param channelIndex group channel id.
1489  * \param reference reference input.
1490  * \return None
1491  */
1492 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1493 
1494 /** \brief Sets result event node pointer 0.
1495  * \param vadcG pointer to VADC group registers.
1496  * \param resultSrcNr channel result event service node.
1497  * \param resultRegister channel result register.
1498  * \return None
1499  */
1500 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1501 
1502 /** \brief Sets result event node pointer 1.
1503  * \param vadcG pointer to VADC group registers.
1504  * \param resultSrcNr channel result event service node.
1505  * \param resultRegister channel result register.
1506  * \return None
1507  */
1508 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1509 
1510 /** \brief Sets result store position.
1511  * \param vadcG pointer to VADC group registers.
1512  * \param channelIndex group channel id.
1513  * \param rightAlignedStorage result store position.
1514  * \return None
1515  */
1516 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1517 
1518 /** \brief Sets channel synchronization request.
1519  * \param vadcG pointer to VADC group registers.
1520  * \param channelIndex group channel id.
1521  * \param synchonize whether channel synchronize or stand alone operation.
1522  * \return None
1523  */
1524 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1525 
1526 /** \brief Sets group's upper boundary.
1527  * \param vadcG pointer to VADC group registers.
1528  * \param channelIndex group channel id.
1529  * \param upperBoundary group upper boundary.
1530  * \return None
1531  */
1532 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1533 
1534 /** \brief Sets the group result register.
1535  * \param vadcG pointer to VADC group registers.
1536  * \param channelIndex group channel id.
1537  * \param resultRegister result register for group result storage.
1538  * \return None
1539  */
1540 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1541 
1542 /******************************************************************************/
1543 /*-------------------------Global Function Prototypes-------------------------*/
1544 /******************************************************************************/
1545 
1546 /** \brief get channel conversion timing
1547  * \param vadc Pointer to VADC module
1548  * \param group specifies the Group
1549  * \param inputClass Input class used
1550  * \param analogFrequency ADC module analog frequency fadci in Hz.
1551  * \param moduleFrequency ADC module frequency fvadc in Hz.
1552  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1553  * \return Channel conversion Time in sec
1554  */
1555 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1556 
1557 /** \} */
1558 
1559 /** \addtogroup IfxLld_Vadc_Std_Emux
1560  * \{ */
1561 
1562 /******************************************************************************/
1563 /*-------------------------Inline Function Prototypes-------------------------*/
1564 /******************************************************************************/
1565 
1566 /** \brief get global input class resolution
1567  * \param vadc Pointer to VADC Module space
1568  * \param inputClassNum global input class number
1569  * \return External channel resolution for global input class
1570  */
1571 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1572 
1573 /** \brief Get the sample time of ADC global class for external channel.
1574  * \param vadc pointer to VADC Module space
1575  * \param inputClassNum Adc input class number
1576  * \param analogFrequency ADC module analog frequency in Hz.
1577  * \return ADC input class external channel sample time in sec.
1578  */
1579 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1580 
1581 /** \brief get the external channel resolution
1582  * \param vadcG Pointer to VADC group register space
1583  * \param inputClassNum Adc input class number
1584  * \return Adc input class External channel resolution
1585  */
1586 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1587 
1588 /** \brief Gets the ADC input class sample time of external channel.
1589  * \param vadcG Pointer to Register Group space
1590  * \param inputClassNum ADC input class number
1591  * \param analogFrequency ADC module analog frequency in Hz.
1592  * \return ADC input class external channel sample time in sec.
1593  */
1594 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1595 
1596 /** \brief set the external channel resolution of Global class
1597  * \param vadc pointer to VADC Module space
1598  * \param inputClassNum Global Input Class Number
1599  * \param resolution External Channel resolution
1600  * \return None
1601  */
1602 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1603 
1604 /** \brief Sets the sample time of ADC global class for external channel.
1605  * \param vadc Pointer to VADC Module space
1606  * \param inputClassNum Adc input class number
1607  * \param analogFrequency ADC analog Frequency in HZ
1608  * \param sampleTime the requested sample time for input class in sec
1609  * \return None
1610  */
1611 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1612 
1613 /** \brief set the external channel resolution of ADC input class
1614  * \param vadcG pointer to VADC Group Register space
1615  * \param inputClassNum input class number
1616  * \param resolution input class external channel resolution
1617  * \return None
1618  */
1619 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1620 
1621 /** \brief Sets the ADC input class sample time for external channel.
1622  * \param vadcG Pointer to VADC Group Register Space
1623  * \param inputClassNum input class number
1624  * \param analogFrequency ADC analog frequency in Hz.
1625  * \param sampleTime request sample time in sec for input class.
1626  * \return None
1627  */
1628 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1629 
1630 /** \brief Sets the Emux Interface for a particular group
1631  * \param vadc Pointer to VADC Module Space
1632  * \param emuxInterface specifies the EmuxInterface
1633  * \param group specifies the group ID
1634  * \return None
1635  */
1636 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1637 
1638 /******************************************************************************/
1639 /*-------------------------Global Function Prototypes-------------------------*/
1640 /******************************************************************************/
1641 
1642 /**
1643  * \param vadc pointer to Module space
1644  * \param vadcG Pointer to VADC group register space
1645  * \param mode External Multiplexer mode
1646  * \param channels Specifies channel Id
1647  * \param startChannel specifies the external channel value from which conversion to be carried out
1648  * \param code Output the channel number in binary code/gray code
1649  * \param sampleTimeControl specifies when to use a sample time for external channel
1650  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1651  * \return None
1652  */
1653 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1654 
1655 /** \} */
1656 
1657 /******************************************************************************/
1658 /*---------------------Inline Function Implementations------------------------*/
1659 /******************************************************************************/
1660 
1661 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1662 {
1663  group->QINR0.U = channel | options;
1664 }
1665 
1666 
1667 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1668 {
1669  uint32 ticks;
1670 
1671  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1672 
1673  if (ticks > 31)
1674  {
1675  ticks = (ticks / 16) + 15;
1676  }
1677 
1678  ticks = __minu(ticks, 0xFFu);
1679 
1680  return ticks;
1681 }
1682 
1683 
1684 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1685 {
1686  vadcG->REFCLR.U = 0x0000FFFFu;
1687 }
1688 
1689 
1690 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1691 {
1692  vadcG->CEFCLR.U = 1 << channelId;
1693 }
1694 
1695 
1696 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1697 {
1698  vadcG->QMR0.B.FLUSH = flushQueue;
1699 }
1700 
1701 
1702 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1703 {
1704  group->RCR[resultIdx].B.WFR = waitForRead;
1705 }
1706 
1707 
1708 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1709 {
1710  vadc->GLOBRCR.B.WFR = waitForRead;
1711 }
1712 
1713 
1714 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1715 {
1716  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1717  IfxScuWdt_clearCpuEndinit(passwd);
1718  vadc->CLC.B.DISR = 1;
1719  IfxScuWdt_setCpuEndinit(passwd);
1720 }
1721 
1722 
1723 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1724 {
1725  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1726 }
1727 
1728 
1729 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1730 {
1731  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1732 }
1733 
1734 
1735 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1736 {
1737  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1738 }
1739 
1740 
1741 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1742 {
1743  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1744 }
1745 
1746 
1747 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1748 {
1749  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1750 
1751  IfxScuWdt_clearCpuEndinit(passwd);
1752  vadc->CLC.U = 0x00000000;
1753  IfxScuWdt_setCpuEndinit(passwd);
1754 }
1755 
1756 
1757 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1758 {
1759  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1760 }
1761 
1762 
1763 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1764 {
1765  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1766 }
1767 
1768 
1769 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1770 {
1771  vadcG->RCR[resultRegister].B.SRGEN = 1;
1772 }
1773 
1774 
1775 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1776 {
1777  uint8 status;
1778  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1779  return status;
1780 }
1781 
1782 
1783 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1784 {
1785  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1786 }
1787 
1788 
1789 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1790 {
1791  Ifx_VADC_G_CHASS assignChannels;
1792  assignChannels.U = vadcG->CHASS.U;
1793  return assignChannels;
1794 }
1795 
1796 
1797 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1798 {
1799  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1800 }
1801 
1802 
1803 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1804 {
1805  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1806 }
1807 
1808 
1809 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1810 {
1811  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1812 }
1813 
1814 
1815 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1816 {
1817  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1818 }
1819 
1820 
1821 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1822 {
1823  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1824 }
1825 
1826 
1827 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1828 {
1829  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1830 }
1831 
1832 
1833 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1834 {
1835  Ifx_VADC_CHCTR tempChctr;
1836  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1837  return tempChctr;
1838 }
1839 
1840 
1841 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1842 {
1843  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1844 }
1845 
1846 
1847 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1848 {
1849  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1850  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1851  return resultServiceRequestNodePtr0;
1852 }
1853 
1854 
1855 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1856 {
1857  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1858  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1859  return resultServiceRequestNodePtr1;
1860 }
1861 
1862 
1863 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1864 {
1865  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1866  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1867  return serviceRequestNodePtr;
1868 }
1869 
1870 
1871 IFX_INLINE IfxScuCcu_AdcClockSelection IfxVadc_getConverterClockType(void)
1872 {
1873  return (IfxScuCcu_AdcClockSelection)MODULE_SCU.CCUCON0.B.ADCCLKSEL;
1874 }
1875 
1876 
1877 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1878 {
1879  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1880 }
1881 
1882 
1883 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1884 {
1885  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1886 }
1887 
1888 
1889 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1890 {
1891  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1892 }
1893 
1894 
1895 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1896 {
1897  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1898 }
1899 
1900 
1901 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1902 {
1903  Ifx_VADC_GLOBCFG globCfg;
1904  globCfg.U = vadc->GLOBCFG.U;
1905  return globCfg;
1906 }
1907 
1908 
1909 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1910 {
1911  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1912 }
1913 
1914 
1915 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1916 {
1917  Ifx_VADC_GLOBRES tmpGlobalResult;
1918 
1919  tmpGlobalResult.U = vadc->GLOBRES.U;
1920 
1921  return tmpGlobalResult;
1922 }
1923 
1924 
1925 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1926 {
1927  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1928 
1929  if (sampleTime > 16)
1930  {
1931  sampleTime = (sampleTime - 15) * 16;
1932  }
1933 
1934  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1935 }
1936 
1937 
1938 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1939 {
1940  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1941 }
1942 
1943 
1944 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1945 {
1946  uint32 idx;
1947 
1948  for (idx = 0; idx < numResults; idx++)
1949  {
1950  results[idx].U = group->RES[resultOffset + idx].U;
1951  }
1952 }
1953 
1954 
1955 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1956 {
1957  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
1958 
1959  if (sampleTime > 16)
1960  {
1961  sampleTime = (sampleTime - 15) * 16;
1962  }
1963 
1964  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1965 }
1966 
1967 
1968 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
1969 {
1970  uint8 masterIndex = 0;
1971  masterIndex = vadcG->SYNCTR.B.STSEL;
1972  return masterIndex;
1973 }
1974 
1975 
1976 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
1977 {
1978  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
1979 }
1980 
1981 
1982 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
1983 {
1984  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
1985 }
1986 
1987 
1988 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
1989 {
1990  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
1991 }
1992 
1993 
1994 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
1995 {
1996  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
1997 }
1998 
1999 
2000 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2001 {
2002  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2003 }
2004 
2005 
2006 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2007 {
2008  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2009 }
2010 
2011 
2012 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2013 {
2014  Ifx_VADC_RES tmpResult;
2015 
2016  tmpResult.U = group->RES[resultIdx].U;
2017 
2018  return tmpResult;
2019 }
2020 
2021 
2022 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2023 {
2024  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2025 }
2026 
2027 
2028 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2029 {
2030  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2031 }
2032 
2033 
2034 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2035 {
2036  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2037 }
2038 
2039 
2040 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2041 {
2042  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2043 }
2044 
2045 
2046 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2047 {
2048  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2049 }
2050 
2051 
2052 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2053 {
2054  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2055 }
2056 
2057 
2058 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2059 {
2060  return (boolean)vadc->GLOBCFG.B.SUCAL;
2061 }
2062 
2063 
2064 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2065 {
2066  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2067  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2068 }
2069 
2070 
2071 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2072 {
2073  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2074  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2075 }
2076 
2077 
2078 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2079 {
2080  vadc->GLOBCFG.B.SUCAL = 1;
2081 }
2082 
2083 
2084 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2085 {
2086  return (boolean)vadc->BRSMR.B.SCAN;
2087 }
2088 
2089 
2090 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2091 {
2092  return (boolean)vadcG->ASMR.B.SCAN;
2093 }
2094 
2095 
2096 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2097 {
2098  return (boolean)vadcG->ARBPR.B.ASEN2;
2099 }
2100 
2101 
2102 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2103 {
2104  return (boolean)vadcG->ARBPR.B.ASEN0;
2105 }
2106 
2107 
2108 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2109 {
2110  return (boolean)vadcG->ARBPR.B.ASEN1;
2111 }
2112 
2113 
2114 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2115 {
2116  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2117 }
2118 
2119 
2120 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2121 {
2122  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2123 }
2124 
2125 
2126 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2127 {
2128  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2129 }
2130 
2131 
2132 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2133 {
2134  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2135 }
2136 
2137 
2138 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2139 {
2140  vadcG->ASMR.B.SCAN = autoscanEnable;
2141 }
2142 
2143 
2144 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2145 {
2146  vadcG->CHASS.U &= ~(1 << channelIndex);
2147 }
2148 
2149 
2150 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2151 {
2152  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2153 }
2154 
2155 
2156 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2157 {
2158  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2159  vadc->BRSSEL[groupId].U = channels;
2160 }
2161 
2162 
2163 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2164 {
2165  Ifx_VADC_BRSCTRL brsctrl;
2166  brsctrl.U = vadc->BRSCTRL.U;
2167  brsctrl.B.GTWC = 1;
2168  brsctrl.B.GTSEL = gatingSource;
2169  vadc->BRSCTRL.U = brsctrl.U;
2170  vadc->BRSMR.B.ENGT = gatingMode;
2171 }
2172 
2173 
2174 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2175 {
2176  Ifx_VADC_BRSCTRL brsctrl;
2177  brsctrl.U = vadc->BRSCTRL.U;
2178  brsctrl.B.XTWC = 1;
2179  brsctrl.B.XTMODE = triggerMode;
2180  brsctrl.B.XTSEL = triggerSource;
2181  vadc->BRSCTRL.U = brsctrl.U;
2182 }
2183 
2184 
2185 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2186 {
2187  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2188 }
2189 
2190 
2191 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2192 {
2193  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2194  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2195 }
2196 
2197 
2198 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2199 {
2200  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2201 }
2202 
2203 
2204 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2205 {
2206  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2207 }
2208 
2209 
2210 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2211 {
2212  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2213 }
2214 
2215 
2216 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2217 {
2218  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2219 }
2220 
2221 
2222 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2223 {
2224  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2225 }
2226 
2227 
2228 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2229 {
2230  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2231 }
2232 
2233 
2234 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2235 {
2236  if (emuxInterface == IfxVadc_EmuxInterface_0)
2237  {
2238  vadc->EMUXSEL.B.EMUXGRP0 = group;
2239  }
2240  else
2241  {
2242  vadc->EMUXSEL.B.EMUXGRP1 = group;
2243  }
2244 }
2245 
2246 
2247 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2248 {
2249  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2250 }
2251 
2252 
2253 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2254 {
2255  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2256 }
2257 
2258 
2259 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2260 {
2261  vadcG->CHASS.U |= (1 << channelIndex);
2262 }
2263 
2264 
2265 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2266 {
2267  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2268 }
2269 
2270 
2271 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2272 {
2273  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2274 }
2275 
2276 
2277 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2278 {
2279  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2280 }
2281 
2282 
2283 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2284 {
2285  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2286  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2287 }
2288 
2289 
2290 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2291 {
2292  Ifx_VADC_G_QCTRL0 qctrl0;
2293  qctrl0.U = vadcG->QCTRL0.U;
2294  qctrl0.B.GTWC = 1;
2295  qctrl0.B.GTSEL = gatingSource;
2296  vadcG->QCTRL0.U = qctrl0.U;
2297  vadcG->QMR0.B.ENGT = gatingMode;
2298 }
2299 
2300 
2301 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2302 {
2303  Ifx_VADC_G_QCTRL0 qctrl0;
2304  qctrl0.U = vadcG->QCTRL0.U;
2305  qctrl0.B.XTWC = 1;
2306  qctrl0.B.XTMODE = triggerMode;
2307  qctrl0.B.XTSEL = triggerSource;
2308  vadcG->QCTRL0.U = qctrl0.U;
2309 }
2310 
2311 
2312 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2313 {
2314  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2315 }
2316 
2317 
2318 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2319 {
2320  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2321  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2322 }
2323 
2324 
2325 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2326 {
2327  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2328  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2329 }
2330 
2331 
2332 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2333 {
2334  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2335 }
2336 
2337 
2338 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2339 {
2340  Ifx_VADC_G_ASCTRL asctrl;
2341  asctrl.U = vadcG->ASCTRL.U;
2342  asctrl.B.GTWC = 1;
2343  asctrl.B.GTSEL = gatingSource;
2344  vadcG->ASCTRL.U = asctrl.U;
2345  vadcG->ASMR.B.ENGT = gatingMode;
2346 }
2347 
2348 
2349 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2350 {
2351  Ifx_VADC_G_ASCTRL asctrl;
2352  asctrl.U = vadcG->ASCTRL.U;
2353  asctrl.B.XTWC = 1;
2354  asctrl.B.XTMODE = triggerMode;
2355  asctrl.B.XTSEL = triggerSource;
2356  vadcG->ASCTRL.U = asctrl.U;
2357 }
2358 
2359 
2360 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2361 {
2362  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2363  IfxScuWdt_clearCpuEndinit(passwd);
2364  vadc->CLC.B.EDIS = mode;
2365  IfxScuWdt_setCpuEndinit(passwd);
2366 }
2367 
2368 
2369 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2370 {
2371  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2372 }
2373 
2374 
2375 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2376 {
2377  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2378 }
2379 
2380 
2381 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2382 {
2383  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2384 }
2385 
2386 
2387 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2388 {
2389  group->QMR0.B.TREV = 1;
2390 }
2391 
2392 
2393 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2394 {
2395  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2396 }
2397 
2398 
2399 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2400 {
2401  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2402 }
2403 
2404 
2405 #endif /* IFXVADC_H */