iLLD_TC29x  1.0
IfxMtu.h
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1 /**
2  * \file IfxMtu.h
3  * \brief MTU basic functionality
4  * \ingroup IfxLld_Mtu
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  *
25  * \defgroup IfxLld_Mtu_Usage How to use the Mtu driver?
26  * \ingroup IfxLld_Mtu
27  *
28  * The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device
29  *
30  * The Mtu driver provides set of routines for various Mbist operations
31  *
32  * In the following sections it will be described, how to integrate the Mtu driver into the application framework.
33  *
34  * \section IfxLld_Mtu_SramInit Sram Initialisation
35  * \subsection IfxLld_Mtu_Include Include Files
36  *
37  * Include following header file into your C code:
38  * \code
39  * #include <Mtu/IfxMtu.h>
40  * \endcode
41  *
42  *
43  * \subsection IfxLld_Mtu_ClearSram_SyncPolling Clear Sram (Synchronous polling mode)
44  *
45  * The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:
46  *
47  * \code
48  * clearSram(IfxMtu_MbistSel_cpu0Dspr);
49  * \endcode
50  *
51  * \subsection IfxLld_Mtu_ClearSram_ASyncPolling Clear Sram (Asynchronous polling mode)
52  *
53  * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be
54  * called.
55  * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
56  *
57  * Following code triggers Sram initilisation.
58  * \code
59  *
60  * uint16 password = 0;
61  *
62  * password = IfxScuWdt_getSafetyWatchdogPassword();
63  *
64  * // Clear EndInit
65  * IfxScuWdt_clearSafetyEndinit(password);
66  *
67  * IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
68  *
69  * // Set EndInit Watchdog
70  * IfxScuWdt_setSafetyEndinit(password);
71  * \endcode
72  *
73  * Sram initialisation status can be queried in a task and once done complete the operation using:
74  * \code
75  * if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
76  * {
77  * // Sram Clear operation done
78  *
79  * // Clear EndInit
80  * IfxScuWdt_clearSafetyEndinit(password);
81  *
82  * IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
83  *
84  * // Set EndInit Watchdog
85  * IfxScuWdt_setSafetyEndinit(password);
86  * }
87  * else
88  * {
89  * // Sram operation is still in progress
90  * }
91  * \endcode
92  *
93  *
94  * \section IfxLld_Mtu_SramError Sram Error tracking
95  * Example usage of Sram Error tracking
96  * \code
97  * IfxScuWdt_clearSafetyEndinit(password);
98  *
99  * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
100  * Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
101  *
102  * IfxMtu_enableMbistShell(mbistSel);
103  *
104  * // for auto-init memories: wait for the end of the clear operation
105  * while (IfxMtu_isAutoInitRunning(mbistSel))
106  * {}
107  * IfxMtu_enableErrorTracking(mbistSel, TRUE);
108  * uint32 numEtrr = 5;
109  * // print tracked error address
110  * {
111  * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
112  * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
113  * for(uint32 i=0; i<numEtrr; ++i) {
114  * printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
115  * i,
116  * trackedSramAddresses[i].B.ADDR,
117  * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
118  * }
119  * }
120  * }
121  *
122  * IfxMtu_disableMbistShell(mbistSel);
123  * IfxScuWdt_setSafetyEndinit(password);
124  * \endcode
125  *
126  * \section IfxLld_Mtu_MemoryTest Memory Tests
127  * \subsection IfxLld_Mtu_MemoryTest_NDI Non Destructive Inversion Test
128  *
129  * Usage Example:
130  * \code
131  * // Enable MTU clock
132  * {
133  * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
134  * IfxScuWdt_clearCpuEndinit(password);
135  * IfxMtu_enableModule();
136  * IfxScuWdt_setCpuEndinit(password);
137  * }
138  *
139  *
140  * {
141  * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
142  * uint16 errAddr = 0;
143  * IfxScuWdt_clearSafetyEndinit(password);
144  *
145  * // run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
146  * IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr);
147  *
148  * IfxScuWdt_setSafetyEndinit(password);
149  * }
150  * \endcode
151  * \subsection IfxLld_Mtu_MemoryTest_CheckerBoard Checker Board Test
152  *
153  * Usage Example:
154  * \code
155  * // Enable MTU clock
156  * {
157  * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
158  * IfxScuWdt_clearCpuEndinit(password);
159  * IfxMtu_enableModule();
160  * IfxScuWdt_setCpuEndinit(password);
161  * }
162  *
163  *
164  * {
165  * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
166  * uint16 errAddr = 0;
167  * IfxScuWdt_clearSafetyEndinit(password);
168  * // run checkerboard test for cpu0 DSPR memory (Range selection disabled)
169  * IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr, 0);
170  *
171  * IfxScuWdt_setSafetyEndinit(password);
172  * }
173  * \endcode
174  *
175  * \subsection IfxLld_Mtu_MemoryTest_MarchU MarchU Test
176  * Usage Example:
177  * \code
178  * // Enable MTU clock
179  * {
180  * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
181  * IfxScuWdt_clearCpuEndinit(password);
182  * IfxMtu_enableModule();
183  * IfxScuWdt_setCpuEndinit(password);
184  * }
185  *
186  *
187  * {
188  * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
189  * uint16 errAddr = 0;
190  * IfxScuWdt_clearSafetyEndinit(password);
191  * // run March U test for cpu0 DSPR memory (Range selection disabled)
192  * IfxMtu_runMarchUTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr);
193  *
194  * IfxScuWdt_setSafetyEndinit(password);
195  * }
196  * \endcode
197  *
198  * \defgroup IfxLld_Mtu_Std_Utility Utility Functions
199  * \ingroup IfxLld_Mtu_Std
200  * \defgroup IfxLld_Mtu_Std_Operative MBIST Operations
201  * \ingroup IfxLld_Mtu_Std
202  * \defgroup IfxLld_Mtu_Std_ErrorTracking MBIST Error Tracking
203  * \ingroup IfxLld_Mtu_Std
204  */
205 
206 #ifndef IFXMTU_H
207 #define IFXMTU_H 1
208 
209 /******************************************************************************/
210 /*----------------------------------Includes----------------------------------*/
211 /******************************************************************************/
212 
213 #include "_Impl/IfxMtu_cfg.h"
214 #include "IfxMc_bf.h"
215 #include "IfxMtu_reg.h"
216 #include "IfxMc_reg.h"
217 #include "IfxScu_reg.h"
218 #include "_Utilities/Ifx_Assert.h"
219 #include "Scu/Std/IfxScuWdt.h"
220 #include "Scu/Std/IfxScuCcu.h"
221 /** \addtogroup IfxLld_Mtu_Std_Utility
222  * \{ */
223 
224 /******************************************************************************/
225 /*-------------------------Inline Function Prototypes-------------------------*/
226 /******************************************************************************/
227 
228 /** \brief Enables the MTU module
229  * \return None
230  */
231 IFX_INLINE void IfxMtu_enableModule(void);
232 
233 /** \brief Returns the status of whether the module is enabled or not
234  * \return
235  */
236 IFX_INLINE boolean IfxMtu_isModuleEnabled(void);
237 
238 /******************************************************************************/
239 /*-------------------------Global Function Prototypes-------------------------*/
240 /******************************************************************************/
241 
242 /** \brief Disables the MBIST Shell of the given SRAM
243  * \param mbistSel Memory Selection
244  * \return None
245  *
246  * Usage Example
247  * \code
248  *
249  * IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
250  *
251  * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
252  * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
253  * {}
254  * \endcode
255  *
256  */
257 IFX_EXTERN void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel);
258 
259 /** \brief Enables the MBIST Shell of the given SRAM.
260  * \param mbistSel Memory Selection
261  * \return None
262  *
263  * Usage Example
264  * \code
265  * // Enable MTU clock
266  * {
267  * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
268  * IfxScuWdt_clearCpuEndinit(password);
269  * IfxMtu_enableModule();
270  * IfxScuWdt_setCpuEndinit(password);
271  * }
272  *
273  * {
274  * IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
275  *
276  * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
277  * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
278  * {}
279  * }
280  * \endcode
281  *
282  */
283 IFX_EXTERN void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel);
284 
285 /** \brief Returns TRUE if Auto-Initialisation is running for the given SRAM.
286  *
287  * Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.
288  * \param mbistSel Memory Selection
289  * \return TRUE if auto-initialisation running.
290  */
291 IFX_EXTERN boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel);
292 
293 /** \} */
294 
295 /** \addtogroup IfxLld_Mtu_Std_Operative
296  * \{ */
297 
298 /******************************************************************************/
299 /*-------------------------Global Function Prototypes-------------------------*/
300 /******************************************************************************/
301 
302 /** \brief Function to Clear the MBIST SRAM (Synchronous mode).
303  * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
304  * \param mbistSel Memory Selection
305  * \return None
306  *
307  * A coding example can be found in \ref IfxLld_Mtu_Usage
308  *
309  */
310 IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel);
311 
312 /** \brief This Function should be called after MBIST Clear SRAM operation is completed.
313  * Note: The function should be called with safety endinit bit cleared.
314  * \param mbistSel Memory Selection
315  * \return None
316  *
317  * A coding example can be found in \ref IfxLld_Mtu_Usage
318  *
319  */
320 IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel);
321 
322 /** \brief This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation.
323  * The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation.
324  * If Synchronous usage is need, use IfxMtu_clearSram() function.
325  * Note: The function should be called with safety endinit bit cleared.
326  * \param mbistSel Memory Selection
327  * \return None
328  *
329  * A coding example can be found in \ref IfxLld_Mtu_Usage
330  *
331  */
332 IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel);
333 
334 /** \brief This Function returns the status of MBIST clear Sram operation.
335  * Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode.
336  * \param mbistSel Memory Selection
337  * \return status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)
338  *
339  * A coding example can be found in \ref IfxLld_Mtu_Usage
340  *
341  */
342 IFX_EXTERN boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel);
343 
344 /**
345  * \param mbistSel Memory Selection
346  * \param sramAddress SRAM address which should be read
347  * \return None
348  *
349  * A coding example can be found in \ref IfxLld_Mtu_Usage
350  *
351  */
352 IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
353 
354 /** \brief Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification
355  * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
356  * \param mbistSel Memory Selection
357  * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
358  * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
359  * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
360  * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
361  * \return Test Status (0-PASS, 1- FAIL)
362  */
363 IFX_EXTERN uint8 IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines);
364 
365 /** \brief Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value.
366  * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
367  * \param mbistSel Memory Selection
368  * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
369  * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
370  * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
371  * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
372  * \return Test Status (0-PASS, 1- FAIL)
373  */
374 IFX_EXTERN uint8 IfxMtu_runMarchUTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
375 
376 /** \brief This function runs the Non-Destructive Inversion test algorithm.
377  * Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times.
378  * Test Steps:
379  * 1. Read data Word including check bits
380  * 2. write back all bits inverted
381  * 3. Read data Word including check bits
382  * 4. Write back all bits inverted
383  * At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error.
384  * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
385  * \param mbistSel Memory Selection
386  * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
387  * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
388  * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
389  * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
390  * \return Test Status (0-PASS, 1- FAIL)
391  */
392 IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
393 
394 /**
395  * \param mbistSel Memory Selection
396  * \param sramAddress SRAM address which should be written
397  * \return None
398  */
399 IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
400 
401 /** \} */
402 
403 /** \addtogroup IfxLld_Mtu_Std_ErrorTracking
404  * \{ */
405 
406 /******************************************************************************/
407 /*-------------------------Global Function Prototypes-------------------------*/
408 /******************************************************************************/
409 
410 /** \brief Clears the error tracking registers (ETRR), valid and overflow bits.
411  * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
412  * \param mbistSel Memory Selection
413  * \return None
414  *
415  * A coding example can be found in \ref IfxLld_Mtu_Usage
416  *
417  */
418 IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel);
419 
420 /** \brief Enables the tracking of SRAM errors.
421  * \param mbistSel Memory Selection
422  * \param enable TRUE to enable error tracking, FALSE to disable error tracking.
423  * \return None
424  *
425  * A coding example can be found in \ref IfxLld_Mtu_Usage
426  *
427  */
428 IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable);
429 
430 /** \brief Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)
431  *
432  * Please note that not all memories of the system are supported by this function.
433  * Additional memories will be considered on request.
434  * \param mbistSel Memory Selection
435  * \param trackedSramAddress tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
436  * \return descrambled system address if supported by this function, otherwise 0
437  *
438  * Example usage: see \ref IfxMtu_getTrackedSramAddresses
439  *
440  */
441 IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress);
442 
443 /** \brief Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers.
444  * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
445  * \param mbistSel Memory Selection
446  * \param trackedSramAddresses will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI
447  *
448  * The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES
449  * \return number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)
450  *
451  * Example usage to print out tracked errors of a given memory:
452  *
453  * We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:
454  * \code
455  * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
456  * IfxScuWdt_clearCpuEndinit(password);
457  *
458  * IfxMtu_enableModule();
459  *
460  * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
461  *
462  * IfxMtu_enableMbistShell(mbistSel);
463  *
464  * // for auto-init memories: wait for the end of the clear operation
465  * while (IfxMtu_isAutoInitRunning(mbistSel))
466  * {}
467  * \endcode
468  *
469  * Now the tracking information can be retrieved with:
470  *
471  * \code
472  * {
473  * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
474  * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
475  *
476  * clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
477  * numTrackedAddresses,
478  * IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
479  *
480  * for(int i=0; i<numTrackedAddresses; ++i) {
481  * clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
482  * i,
483  * trackedSramAddresses[i].B.ADDR,
484  * trackedSramAddresses[i].B.MBI,
485  * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
486  * }
487  * }
488  * \endcode
489  *
490  */
491 IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses);
492 
493 /** \brief Returns the status of the error tracking
494  * \param mbistSel Memory Selection
495  * \return TRUE if error tracking enabled.
496  */
497 IFX_EXTERN boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel);
498 
499 /** \brief Returns the error tracking overflow status.
500  * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
501  * \param mbistSel Memory Selection
502  * \return TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.
503  */
504 IFX_EXTERN boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel);
505 
506 /** \} */
507 
508 /******************************************************************************/
509 /*---------------------Inline Function Implementations------------------------*/
510 /******************************************************************************/
511 
512 IFX_INLINE void IfxMtu_enableModule(void)
513 {
514  // MTU clock enable
515  MTU_CLC.U = 0x0;
516 }
517 
518 
519 IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
520 {
521  return MTU_CLC.B.DISS == 0;
522 }
523 
524 
525 #endif /* IFXMTU_H */