iLLD_TC29x  1.0
IfxHssl.c
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1 /**
2  * \file IfxHssl.c
3  * \brief HSSL basic functionality
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  *
24  */
25 
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29 
30 #include "IfxHssl.h"
31 
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35 
36 void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
37 {
39  IfxScuWdt_clearCpuEndinit(psw); // clears the endinit protection
40  hsct->CLC.B.DISR = 0; // enables the module
41  IfxScuWdt_setCpuEndinit(psw); // sets the endinit protection back on
42 }
43 
44 
45 void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
46 {
48  IfxScuWdt_clearCpuEndinit(psw); // clears the endinit protection
49  hssl->CLC.B.DISR = 0; // enables the module
50  IfxScuWdt_setCpuEndinit(psw); // sets the endinit protection back on
51 }
52 
53 
54 volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
55 {
56  return &MODULE_SRC.HSCT.HSCT[0].SR;
57 }
58 
59 
60 volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
61 {
62  return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].COK;
63 }
64 
65 
66 volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
67 {
68  return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].ERR;
69 }
70 
71 
72 volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
73 {
74  return &MODULE_SRC.HSSL.EXI;
75 }
76 
77 
78 volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
79 {
80  return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].RDI;
81 }
82 
83 
84 volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
85 {
86  return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].TRG;
87 }
88 
89 
90 void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
91 {
93 
95  hsct->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
96  hsct->KRST1.B.RST = 1;
98 
99  while (0 == hsct->KRST0.B.RSTSTAT) /* Wait until reset is executed */
100 
101  {}
102 
104  hsct->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
105  IfxScuWdt_setCpuEndinit(passwd);
106 }
107 
108 
109 void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
110 {
112 
114  hssl->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
115  hssl->KRST1.B.RST = 1;
116  IfxScuWdt_setCpuEndinit(passwd);
117 
118  while (0 == hssl->KRST0.B.RSTSTAT) /* Wait until reset is executed */
119 
120  {}
121 
123  hssl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
124  IfxScuWdt_setCpuEndinit(passwd);
125 }