iLLD_TC27xD  1.0
SpiIf.h
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1 /**
2  * \file SpiIf.h
3  * \brief SPI interface types
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  * \defgroup library_srvsw_if_spi SPI interface
24  * \ingroup library_srvsw_if
25  *
26  */
27 
28 #ifndef SPIIF_H
29 #define SPIIF_H 1
30 
31 //________________________________________________________________________________________
32 // INCLUDES
33 
34 #include "Src/Std/IfxSrc.h" /* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
35 
36 /** \addtogroup library_srvsw_if_spi
37  * \{ */
38 
39 //________________________________________________________________________________________
40 // CONFIGURATION SWITCHES
41 
42 //________________________________________________________________________________________
43 // HELPER MACROS
44 
45 /* Get Fifo size required for Long / Long continous mode interms 32-bit
46  * LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)*/
47 #define IFXQSPI_BACONSIZE(Datasize) \
48  ((((Datasize) % 16)== 0) ? ((uint8)((Datasize)/16)) : ((uint8)((Datasize)/16) + 1))
49 
50 #define IFXQSPI_FIFO32BITSIZE(Datasize) \
51  (((Datasize) % 4)== 0) ? ((uint8)((Datasize)/4)) : ((uint8)((Datasize)/4) + 1)
52 
53 #define IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize)
54 
55 //________________________________________________________________________________________
56 // BASIC TYPES
57 
58 /** \brief SPI Interface Status */
59 typedef enum
60 {
61  SpiIf_Status_ok,
62  SpiIf_Status_busy,
63  SpiIf_Status_unknown
64 } SpiIf_Status;
65 
66 /** \brief Slave select output timing */
67 typedef enum
68 {
69  SpiIf_SlsoTiming_0 = 0, /**< zero delay clock */
70  SpiIf_SlsoTiming_1, /**< 1 half-clock delay */
71  SpiIf_SlsoTiming_2, /**< 2 half-clock delay */
72  SpiIf_SlsoTiming_3, /**< 3 half-clock delay */
73  SpiIf_SlsoTiming_4, /**< 4 half-clock delay */
74  SpiIf_SlsoTiming_5, /**< 5 half-clock delay */
75  SpiIf_SlsoTiming_6, /**< 6 half-clock delay */
76  SpiIf_SlsoTiming_7 /**< 7 half-clock delay */
77 } SpiIf_SlsoTiming;
78 
79 /** \brief Heading */
80 typedef enum
81 {
82  SpiIf_DataHeading_lsbFirst = 0, /**< LSB first */
83  SpiIf_DataHeading_msbFirst /**< MSB first */
84 } SpiIf_DataHeading;
85 
86 /** \brief Clock phase */
87 typedef enum
88 {
89  SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0, /**< Shift Tx data on leading edge */
90  SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge /**< Shift Tx data on training edge */
91 } SpiIf_ShiftClock;
92 
93 /** \brief Clock polarity */
94 typedef enum
95 {
96  SpiIf_ClockPolarity_idleLow = 0, /**< Idle clock line is low */
97  SpiIf_ClockPolarity_idleHigh /**< Idle clock line is high */
98 } SpiIf_ClockPolarity;
99 
100 //________________________________________________________________________________________
101 // DATA STRUCTURES
102 
103 /** \brief Alias to the channel structure */
104 typedef struct SpiIf_Ch_ SpiIf_Ch;
105 typedef struct SpiIf_ChConfig_ SpiIf_ChConfig;
106 typedef struct SpiIf_ SpiIf;
107 
108 typedef volatile struct
109 {
110  uint32 onTransfer : 1; /**< \brief Channel status: On transfer */
111  uint32 byteAccess : 1; /**< \brief Channel status: 8bit / 16 bit access */
112 } SpiIf_Flags;
113 
114 typedef struct
115 {
116  void *data;
117  Ifx_SizeT remaining;
118 } SpiIf_Job;
119 
120 /** SPI operation modes */
121 typedef enum
122 { /* FIXME check conflicts with IfxQspi_Mode */
123  SpiIf_Mode_master, /**< \brief Master mode */
124  SpiIf_Mode_slave, /**< \brief Slave mode */
125  SpiIf_Mode_undefined /**< \brief Undefined mode */
126 } SpiIf_Mode;
127 
128 typedef SpiIf_Status (*SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
129 typedef SpiIf_Status (*SpiIf_GetStatus)(SpiIf_Ch *handle);
130 typedef void (*SpiIf_OnEvent)(SpiIf *handle);
131 
132 typedef struct
133 {
134  SpiIf_Exchange exchange;
135  SpiIf_GetStatus getStatus;
136  SpiIf_OnEvent onTx;
137  SpiIf_OnEvent onRx;
138  SpiIf_OnEvent onError;
139 } SpiIf_funcs;
140 
141 struct SpiIf_
142 {
143  pvoid driver; /**< \brief Spi specific driver */
144  uint32 sending; /**< \brief */
145  SpiIf_Ch *activeChannel; /**< \brief Channel actually transmitting / receiving */
146  uint32 txCount;
147  uint32 rxCount;
148  SpiIf_funcs functions;
149 };
150 
151 typedef struct
152 {
153  SpiIf_Mode mode; /**< \brief Specifies the interface operation mode */
154  Ifx_Priority rxPriority; /**< \brief Specifies the priority of the receive interrupt */
155  Ifx_Priority txPriority; /**< \brief Specifies the priority of the transmit interrupt */
156  Ifx_Priority erPriority; /**< \brief Specifies the priority of the error interrupt */
157  IfxSrc_Tos isrProvider; /**< \brief Specifies the handler of the interrupts */
158  Ifx_SizeT bufferSize; /**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
159  void *buffer; /**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
160  * buffer object will be initialised. The Size of this area must be at least
161  * equals to "Size + sizeof(Ifx_Fifo) + 8",
162  * with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
163  * this in account may result in unpredictable behaviour. */
164  float32 maximumBaudrate; /**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
165 } SpiIf_Config;
166 
167 typedef struct
168 {
169  uint32 baudrate : 1; /**< \brief TRUE = checked, FALSE = ignored */
170  uint32 phase : 1; /**< \brief TRUE = checked, FALSE = ignored */
171  uint32 receive : 1; /**< \brief TRUE = checked, FALSE = ignored */
172  uint32 transmit : 1; /**< \brief TRUE = checked, FALSE = ignored */
173  uint32 reserved : 28;
174 } Spi_ErrorChecks;
175 
176 /** Channel operation mode */
177 typedef struct
178 {
179  uint32 enabled : 1; /**< \brief 1 = channel enabled, 0 = channel disabled */
180  uint32 autoCS : 1; /**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
181  uint32 loopback : 1; /**< \brief 0 = normal mode, 1 = loopback mode */
182  uint32 clockPolarity : 1; /**< \brief \ref SpiIf_ClockPolarity*/
183  uint32 shiftClock : 1; /**< \brief \ref SpiIf_ShiftClock */
184  uint32 dataHeading : 1; /**< \brief \ref SpiIf_DataHeading */
185  uint32 dataWidth : 6; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
186 
187  uint32 csActiveLevel : 1; /**< \brief \ref Ifx_ActiveState */
188  uint32 csLeadDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
189  uint32 csTrailDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
190  uint32 csInactiveDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
191  uint32 parityCheck : 1; /**< \brief 0 = disabled, 1 = enabled */
192  uint32 parityMode : 1; /**< \brief \ref Ifx_ParityMode */
193 } SpiIf_ChMode;
194 
195 /** \brief SPI channel callback prototype */
196 typedef void (*SpiIf_Cbk)(void *data);
197 typedef void (*TxRxHandler)(SpiIf_Ch *handle);
198 
199 struct SpiIf_Ch_
200 {
201  SpiIf *driver; /**< \brief Pointer to the SPI interface driver */
202  SpiIf_Flags flags;
203  Spi_ErrorChecks errorChecks; /**< \brief Error checks */
204  sint32 baudrate; /**< \brief Real baudrate */
205  SpiIf_Job tx;
206  SpiIf_Job rx;
207  SpiIf_Cbk onExchangeEnd; /**< \brief Specifies the callback function on end of exchange */
208  void *callbackData; /**< \brief Specifies pointer to the user specific data on transmit end */
209  TxRxHandler txHandler;
210  TxRxHandler rxHandler;
211 };
212 
213 struct SpiIf_ChConfig_
214 {
215  SpiIf *driver; /**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_SpiMaster_ChannelConfig */
216  float32 baudrate; /**< \brief Specifies the SPI baudrate */
217  SpiIf_ChMode mode; /**< \brief */
218  Spi_ErrorChecks errorChecks; /**< \brief */
219 };
220 
221 //________________________________________________________________________________________
222 // EXPORTED VARIABLES
223 
224 //________________________________________________________________________________________
225 // FUNCTION PROTOTYPES
226 
227 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle);
228 IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config);
229 IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver);
230 
231 /** \name Virtual functions
232  * These functions are implemented by a driver.
233  * \{ */
234 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
235 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle);
236 /** \} */
237 
238 /** \} */
239 //________________________________________________________________________________________
240 // INLINE FUNCTION IMPLEMENTATIONS
241 
242 /** Wait as long as the transmission is on-going
243  * \note This function blocks CPU for some-time */
244 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
245 {
246  while (handle->flags.onTransfer != FALSE)
247  {}
248 }
249 
250 
251 /** Perform the SPI exchange operation.
252  * \param handle Pointer to an implementation of SPI interface driver
253  * \param src Pointer to the start of data buffer for data to transmit
254  * \param dest Pointer to the start of data buffer for received data
255  * \param numOfData specifies number of byte/bit to transfer
256  * \return STATUS of SPI
257  * \note the src and dest may be the same data location.
258  */
259 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
260 {
261  return handle->driver->functions.exchange(handle, src, dest, numOfData);
262 }
263 
264 
265 /** get the SPI status
266  * * \param handle Pointer to an implementation of SPI interface driver
267  * \return STATUS of SPI
268  * */
269 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
270 {
271  return handle->driver->functions.getStatus(handle);
272 }
273 
274 
275 //________________________________________________________________________________________
276 #endif