iLLD_TC27xD  1.0
IfxVadc_cfg.c
Go to the documentation of this file.
1 /**
2  * \file IfxVadc_cfg.c
3  * \brief VADC on-chip implementation data
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  */
24 
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28 
29 #include "IfxVadc_cfg.h"
30 
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34 
35 const uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS * 4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
36  (uint32)&SRC_VADC_G0_SR0,
37  (uint32)&SRC_VADC_G0_SR1,
38  (uint32)&SRC_VADC_G0_SR2,
39  (uint32)&SRC_VADC_G0_SR3,
40  (uint32)&SRC_VADC_G1_SR0,
41  (uint32)&SRC_VADC_G1_SR1,
42  (uint32)&SRC_VADC_G1_SR2,
43  (uint32)&SRC_VADC_G1_SR3,
44  (uint32)&SRC_VADC_G2_SR0,
45  (uint32)&SRC_VADC_G2_SR1,
46  (uint32)&SRC_VADC_G2_SR2,
47  (uint32)&SRC_VADC_G2_SR3,
48  (uint32)&SRC_VADC_G3_SR0,
49  (uint32)&SRC_VADC_G3_SR1,
50  (uint32)&SRC_VADC_G3_SR2,
51  (uint32)&SRC_VADC_G3_SR3,
52  (uint32)&SRC_VADC_G4_SR0,
53  (uint32)&SRC_VADC_G4_SR1,
54  (uint32)&SRC_VADC_G4_SR2,
55  (uint32)&SRC_VADC_G4_SR3,
56  (uint32)&SRC_VADC_G5_SR0,
57  (uint32)&SRC_VADC_G5_SR1,
58  (uint32)&SRC_VADC_G5_SR2,
59  (uint32)&SRC_VADC_G5_SR3,
60  (uint32)&SRC_VADC_G6_SR0,
61  (uint32)&SRC_VADC_G6_SR1,
62  (uint32)&SRC_VADC_G6_SR2,
63  (uint32)&SRC_VADC_G6_SR3,
64  (uint32)&SRC_VADC_G7_SR0,
65  (uint32)&SRC_VADC_G7_SR1,
66  (uint32)&SRC_VADC_G7_SR2,
67  (uint32)&SRC_VADC_G7_SR3,
68  (uint32)&SRC_VADC_CG0_SR0,
69  (uint32)&SRC_VADC_CG0_SR1,
70  (uint32)&SRC_VADC_CG0_SR2,
71  (uint32)&SRC_VADC_CG0_SR3,
72  (uint32)&SRC_VADC_CG1_SR0,
73  (uint32)&SRC_VADC_CG1_SR1,
74  (uint32)&SRC_VADC_CG1_SR2,
75  (uint32)&SRC_VADC_CG1_SR3
76 };