iLLD_TC27xD  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61 
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65 
66 /** \addtogroup IfxLld_Vadc_Std_Enum
67  * \{ */
68 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
69  */
70 typedef enum
71 {
72  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
73  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
74  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
75  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
76 } IfxVadc_AnalogConverterMode;
77 
78 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
79  */
80 typedef enum
81 {
82  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
83  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
84  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
85  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
86 } IfxVadc_ArbitrationRounds;
87 
88 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
89  */
90 typedef enum
91 {
92  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
93  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
94  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
95  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
96  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
97  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
98  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
99  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
100  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
101  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
102  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
103  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
104  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
105  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
106  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
107  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
108 } IfxVadc_BoundaryExtension;
109 
110 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
111  */
112 typedef enum
113 {
114  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
115  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
116  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
117  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
118 } IfxVadc_BoundarySelection;
119 
120 /** \brief VADC Channels
121  */
122 typedef enum
123 {
124  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
125  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
126  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
127  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
128  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
129  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
130  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
131  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
132  IfxVadc_ChannelId_7 = 7 /**< \brief Channel 7 */
133 } IfxVadc_ChannelId;
134 
135 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
136  */
137 typedef enum
138 {
139  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
140  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
141 } IfxVadc_ChannelReference;
142 
143 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
144  */
145 typedef enum
146 {
147  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
148  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
149  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
150  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
151 } IfxVadc_ChannelResolution;
152 
153 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
154  */
155 typedef enum
156 {
157  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
158  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
159  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
160  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
161  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
162  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
163  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
164  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
165  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
166  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
167  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
168  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
169  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
170  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
171  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
172  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
173 } IfxVadc_ChannelResult;
174 
175 /** \brief External Multiplexer Channel Selection Style as defined in
176  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
177  */
178 typedef enum
179 {
180  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
181  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
182  * associated channel for EMUX control */
183 } IfxVadc_ChannelSelectionStyle;
184 
185 /** \brief type of conversion
186  */
187 typedef enum
188 {
189  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
190 } IfxVadc_ConversionType;
191 
192 /** \brief Specifies the External Coding scheme(binary/gray)
193  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
194  */
195 typedef enum
196 {
197  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
198  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
199 } IfxVadc_EmuxCodingScheme;
200 
201 /** \brief Specifies the Emux interface
202  */
203 typedef enum
204 {
205  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
206  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
207 } IfxVadc_EmuxInterface;
208 
209 /** \brief External Multiplexer sample time control
210  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
211  */
212 typedef enum
213 {
214  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
215  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
216 } IfxVadc_EmuxSampleTimeControl;
217 
218 /** \brief specifies the External Channel Start select value
219  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
220  */
221 typedef enum
222 {
223  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
224  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
225  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
226  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
227  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
228  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
229  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
230  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
231 } IfxVadc_EmuxSelectValue;
232 
233 /** \brief Specifies External Multiplexer Mode
234  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
235  */
236 typedef enum
237 {
238  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
239  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
240  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
241  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
242 } IfxVadc_ExternalMultiplexerMode;
243 
244 /** \brief FIFO mode enable
245  */
246 typedef enum
247 {
248  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
249  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
250  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
251  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
252 } IfxVadc_FifoMode;
253 
254 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
255  */
256 typedef enum
257 {
258  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
259  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
260  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
261  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
262 } IfxVadc_GatingMode;
263 
264 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
265  */
266 typedef enum
267 {
268  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
269  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
270  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
271  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
272  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
273  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
274  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
275  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
276  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
277  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
278  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
279  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
280  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
281  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
282  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
283  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
284 } IfxVadc_GatingSource;
285 
286 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
287  */
288 typedef enum
289 {
290  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
291  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
292  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
293  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
294 } IfxVadc_InputClasses;
295 
296 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
297  */
298 typedef enum
299 {
300  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
301  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
302  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
303  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
304 } IfxVadc_LimitCheck;
305 
306 /** \brief Low Power Supply Voltage Select
307  */
308 typedef enum
309 {
310  IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
311  IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
312 } IfxVadc_LowSupplyVoltageSelect;
313 
314 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
315  */
316 typedef enum
317 {
318  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
319  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
320  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
321  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
322  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
323  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
324  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
325  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
326  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
327  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
328  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
329  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
330  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
331  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
332  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
333  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
334  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
335  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
336  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
337  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
338  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
340  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
341  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
342  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
348  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
349  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
350  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
351  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
352  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
353  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
354  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
356  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
357  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
358  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
364  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
365  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
366  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
367  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
368  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
369  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
370  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
372  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
373  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
374  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
380  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
381 } IfxVadc_Protection;
382 
383 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
384  */
385 typedef enum
386 {
387  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
388  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
389  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
390  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
391 } IfxVadc_RequestSlotPriority;
392 
393 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
394  */
395 typedef enum
396 {
397  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
398  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
399 } IfxVadc_RequestSlotStartMode;
400 
401 /** \brief Request sources
402  */
403 typedef enum
404 {
405  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
406  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
407  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
408 } IfxVadc_RequestSource;
409 
410 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
411  * Definition in Ifx_VADC.CLC.B.EDIS
412  */
413 typedef enum
414 {
415  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
416  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
417 } IfxVadc_SleepMode;
418 
419 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
420  */
421 typedef enum
422 {
423  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
424  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
425  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
426  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
427  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
428  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
429  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
430  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
431 } IfxVadc_SrcNr;
432 
433 /** \brief API return values defined in
434  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
435  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
436  */
437 typedef enum
438 {
439  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
440  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
441  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
442  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
443  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
444  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
445  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
446 } IfxVadc_Status;
447 
448 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
449  */
450 typedef enum
451 {
452  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
453  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
454  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
455  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
456 } IfxVadc_TriggerMode;
457 
458 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
459  */
460 typedef enum
461 {
462  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
463  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
464  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
465  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
466  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
467  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
468  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
469  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
470  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
471  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
472  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
473  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
474  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
475  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
476  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
477  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
478 } IfxVadc_TriggerSource;
479 
480 /** \} */
481 
482 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
483  * \{ */
484 
485 /******************************************************************************/
486 /*-------------------------Inline Function Prototypes-------------------------*/
487 /******************************************************************************/
488 
489 /** \brief access function to enable/disable wait for read mode for result registers
490  * \param group pointer to the VADC group
491  * \param resultIdx result register index
492  * \param waitForRead wait for read mode enabled/disabled
493  * \return None
494  */
495 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
496 
497 /** \brief access function to enable/disable wait for read mode for global result register
498  * \param vadc pointer to the VADC
499  * \param waitForRead wait for read mode enabled/disabled
500  * \return None
501  */
502 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
503 
504 /** \brief Enables the background sacn external trigger.
505  * \param vadc pointer to the base of VADC registers.
506  * \return None
507  */
508 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
509 
510 /** \brief Gets the background scan gating mode.
511  * \param vadc pointer to the base of VADC registers.
512  * \return background scan gating mode.
513  */
514 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
515 
516 /** \brief Gets the gating input selection.
517  * \param vadc pointer to the base of VADC registers.
518  * \return background scan gating input selection.
519  */
520 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
521 
522 /** \brief Gets the requested background scan slot priority.
523  * \param vadcG pointer to VADC group registers.
524  * \return requested background scan slot priority.
525  */
526 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
527 
528 /** \brief Gets the requested background scan slot start mode.
529  * \param vadcG pointer to VADC group registers.
530  * \return requested background scan slot start mode.
531  */
532 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
533 
534 /** \brief Gets the background scan trigger input.
535  * \param vadc pointer to the base of VADC registers.
536  * \return Gets the background scan external trigger source.
537  */
538 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
539 
540 /** \brief Gets the background scan external trigger mode.
541  * \param vadc pointer to the base of VADC registers.
542  * \return background scan external trigger mode.
543  */
544 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
545 
546 /** \brief get global input class resolution
547  * \param vadc Pointer to the VADC Group
548  * \param inputClassNum global input class number
549  * \return ADC input class channel resolution.
550  */
551 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
552 
553 /** \brief return conversion result stored in the Global result Register
554  * \param vadc pointer to the VADC module
555  * \return global result register
556  *
557  * \code
558  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
559  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
560  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
561  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
562  *
563  * //confiure wait for read mode for global result register
564  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
565  *
566  * // configure background scan
567  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
568  *
569  * // enable auto scan
570  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
571  *
572  * // start the background scan
573  * IfxVadc_startBackgroundScan(vadc);
574  *
575  * Ifx_VADC_GLOBRES result;
576  * result = IfxVadc_getGlobalResult (vadc);
577  *
578  * \endcode
579  *
580  */
581 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
582 
583 /** \brief get global input class sample time in sec
584  * \param vadc Pointer to the VADC Group Register space
585  * \param inputClassNum ADC input class number
586  * \param analogFrequency ADC module analog frequency in Hz.
587  * \return ADC input class channel sample time in sec.
588  */
589 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
590 
591 /** \brief Get conversion result for the group
592  * \param group pointer to the VADC group
593  * \param results pointer to scaled conversion results
594  * \param resultOffset offset for the first result
595  * \param numResults number of results
596  * \return None
597  *
598  * \code
599  * Ifx_VADC* vadc = &MODULE_VADC
600  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
601  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
602  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
603  *
604  * //confiure wait for read mode for global result register
605  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
606  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
607  *
608  * // configure scan
609  * IfxVadc_setScan(group, channels, mask);
610  *
611  * // enable auto scan
612  * IfxVadc_setAutoScan(group, TRUE);
613  *
614  * // start the scan
615  * IfxVadc_startScan(group);
616  *
617  * // wait for conversion to finish
618  *
619  * // fetch the 2 results of conversion for group 0
620  * Ifx_VADC_RES results[10];
621  * result = IfxVadc_getGroupResult(group, results, 0, 2);
622  * \endcode
623  *
624  */
625 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
626 
627 /** \brief Get conversion result (Function does not care about the alignment)
628  * value = raw * gain + offset.
629  * \param group pointer to the VADC group
630  * \param resultIdx result register index
631  * \return scaled Conversion result
632  *
633  * \code
634  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
635  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
636  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
637  *
638  * //confiure wait for read mode for global result register
639  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
640  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
641  *
642  * // configure scan
643  * IfxVadc_setScan(group, channels, mask);
644  *
645  * // enable auto scan
646  * IfxVadc_setAutoScan(group, TRUE);
647  *
648  * // start the scan
649  * IfxVadc_startScan(group);
650  *
651  * // wait for conversion to finish
652  *
653  * // fetch the result of conversion from result register 0 for group 0
654  * Ifx_VADC_RES result;
655  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
656  * \endcode
657  *
658  */
659 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
660 
661 /** \brief Returns the auto background scan status.
662  * \param vadc pointer to the base of VADC registers.
663  * \return TRUE if enabled otherwise FALSE.
664  */
665 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
666 
667 /** \brief Returns the background scan slot requested status.
668  * \param vadcG pointer to VADC group registers.
669  * \return background scan slot requested status.
670  */
671 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
672 
673 /** \brief Enables/Disables continuous background auto scan
674  * \param vadc pointer to the base of VADC registers.
675  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
676  * \return None
677  */
678 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
679 
680 /** \brief configures a background scan; can also stop autoscan if all channels are 0
681  * \param vadc pointer to the VADC module registers
682  * \param groupId group index
683  * \param channels specifies the channels which should be enabled/disabled
684  * \param mask specifies the channels which should be modified
685  * \return None
686  *
687  * Background scan can be enabled/disabled for the given channels which are selected with the mask
688  *
689  * \code
690  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
691  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
692  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
693  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
694  *
695  * //confiure wait for read mode for global result register
696  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
697  *
698  * // configure background scan
699  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
700  *
701  * // enable auto scan
702  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
703  *
704  * // start the background scan
705  * IfxVadc_startBackgroundScan(vadc);
706  * \endcode
707  *
708  */
709 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
710 
711 /** \brief Sets the background scan slot gating configurations.
712  * \param vadc pointer to the base of VADC registers.
713  * \param gatingSource gate input for group.
714  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
715  * \return None
716  */
717 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
718 
719 /** \brief Sets the background scan exteranal trigger operating configurations.
720  * \param vadc pointer to the base of VADC registers.
721  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
722  * \param triggerSource trigger input for group.
723  * \return None
724  */
725 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
726 
727 /** \brief Starts a background scan
728  * \param vadc pointer to the VADC module
729  * \return None
730  *
731  * \see IfxVadc_setBackgroundScan
732  *
733  */
734 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
735 
736 /******************************************************************************/
737 /*-------------------------Global Function Prototypes-------------------------*/
738 /******************************************************************************/
739 
740 /** \brief Gives the background scan status for a group
741  * \param vadc pointer to the VADC module
742  * \return IfxVadc_Status
743  */
744 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
745 
746 /** \brief Get conversion result (Function does not care about the alignment)
747  * value = raw * gain + offset.
748  * \param vadc VADC module pointer
749  * \param group pointer to the VADC group
750  * \param channel channel Id
751  * \param sourceType type of request source
752  * \return scaled Conversion result
753  *
754  * \code
755  * Ifx_VADC vadc;
756  * vadc.vadc = &MODULE_VADC;
757  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
758  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
759  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
760  *
761  * //confiure wait for read mode for global result register
762  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
763  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
764  *
765  * // configure scan
766  * IfxVadc_setScan(group, channels, mask);
767  *
768  * // start the scan
769  * IfxVadc_startScan(group);
770  *
771  * // wait for conversion to finish
772  *
773  * // fetch the result of conversion for channel 2 of group 0
774  * Ifx_VADC_RESresult2;
775  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
776  * Ifx_VADC_RESresult5;
777  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
778  * \endcode
779  *
780  */
781 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
782 
783 /** \} */
784 
785 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
786  * \{ */
787 
788 /******************************************************************************/
789 /*-------------------------Inline Function Prototypes-------------------------*/
790 /******************************************************************************/
791 
792 /** \brief Disables the scan slot external trigger.
793  * \param vadcG pointer to VADC group registers.
794  * \return None
795  */
796 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
797 
798 /** \brief Enables the scan slot external trigger.
799  * \param vadcG pointer to VADC group registers.
800  * \return None
801  */
802 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
803 
804 /** \brief Gets the request scan slot gating mode.
805  * \param vadcG pointer to VADC group registers.
806  * \return requested scan slot gating mode.
807  */
808 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
809 
810 /** \brief Gets the request scan slot gating input.
811  * \param vadcG pointer to VADC group registers.
812  * \return request scan slot gating input.
813  */
814 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
815 
816 /** \brief Gets the request scan slot priority.
817  * \param vadcG pointer to VADC group registers.
818  * \return request scan slot priority.
819  */
820 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
821 
822 /** \brief Gets the request scan slot start mode.
823  * \param vadcG pointer to VADC group registers.
824  * \return request scan slot start mode.
825  */
826 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
827 
828 /** \brief Gets the requested scan slot trigger input.
829  * \param vadcG pointer to VADC group registers.
830  * \return requested scan slot trigger input.
831  */
832 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
833 
834 /** \brief Gets the requested scan slot trigger mode.
835  * \param vadcG pointer to VADC group registers.
836  * \return requested scan slot trigger mode.
837  */
838 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
839 
840 /** \brief Gets the auto scan enable status.
841  * \param vadcG pointer to VADC group registers.
842  * \return TRUE if auto scan enabled otherwise FALSE.
843  */
844 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
845 
846 /** \brief Returns the scan slot requested status.
847  * \param vadcG pointer to VADC group registers.
848  * \return TRUE if scan slot request enabled otherwise FALSE.
849  */
850 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
851 
852 /** \brief Enables/Disables continuous auto scan
853  * \param vadcG pointer to VADC group registers.
854  * \param autoscanEnable whether autoscan is enabled or not.
855  * \return None
856  */
857 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
858 
859 /** \brief Sets the scan slot gating configuration.
860  * \param vadcG pointer to VADC group registers.
861  * \param gatingSource gate input for group.
862  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
863  * \return None
864  */
865 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
866 
867 /** \brief Sets the scan slot trigger operating configurations.
868  * \param vadcG pointer to VADC group registers.
869  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
870  * \param triggerSource trigger input for group.
871  * \return None
872  */
873 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
874 
875 /** \brief Starts an autoscan on the specified group
876  * \param group pointer to the VADC group
877  * \return None
878  *
879  * See \ref IfxVadc_setScan
880  *
881  */
882 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
883 
884 /******************************************************************************/
885 /*-------------------------Global Function Prototypes-------------------------*/
886 /******************************************************************************/
887 
888 /** \brief Gives the scan status for a group
889  * \param group pointer to the VADC group
890  * \return IfxVadc_Status
891  */
892 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
893 
894 /** \brief Configures an (auto-)scan
895  * \param group pointer to the VADC group
896  * \param channels specifies the channels which should be enabled/disabled
897  * \param mask specifies the channels which should be modified
898  * \return None
899  *
900  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
901  *
902  * \code
903  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
904  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
905  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
906  *
907  * // configure scan
908  * IfxVadc_setScan(group, channels, mask);
909  *
910  * // enable Auto-Scan
911  * IfxVadc_setAutoScan(group, TRUE);
912  *
913  * // start the scan
914  * IfxVadc_startScan(group);
915  * \endcode
916  *
917  */
918 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
919 
920 /** \} */
921 
922 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
923  * \{ */
924 
925 /******************************************************************************/
926 /*-------------------------Inline Function Prototypes-------------------------*/
927 /******************************************************************************/
928 
929 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
930  * refill incase of aborted conversion
931  * source interrupt enable/disable
932  * external trigger control of the aborted conversion
933  * \param group pointer to the VADC group
934  * \param channel specifies channel Id
935  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
936  * \return None
937  *
938  * \code
939  *
940  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
941  * IfxVadc_ChannelId channel = 1; // for channel 1
942  * // Add channel 1 to queue of group 0 with the refill turned on
943  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
944  * \endcode
945  *
946  */
947 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
948 
949 /** \brief Clears all the queue entries including backup stage.
950  * \param vadcG pointer to VADC group registers.
951  * \param flushQueue Whether queue is cleared or not.
952  * \return None
953  */
954 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
955 
956 /** \brief Disables the external trigger.
957  * \param vadcG pointer to VADC group registers.
958  * \return None
959  */
960 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
961 
962 /** \brief Enables the external trigger.
963  * \param vadcG pointer to VADC group registers.
964  * \return None
965  */
966 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
967 
968 /** \brief Gets the requested queue slot gating mode.
969  * \param vadcG pointer to VADC group registers.
970  * \return requested queue slot gating mode.
971  */
972 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
973 
974 /** \brief Gets the requested queue slot gating input.
975  * \param vadcG pointer to VADC group registers.
976  * \return requested queue slot gating input.
977  */
978 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
979 
980 /** \brief Gets the request queue slot priority.
981  * \param vadcG pointer to VADC group registers.
982  * \return requested queue slot priority.
983  */
984 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
985 
986 /** \brief Gets the requested queue slot start mode.
987  * \param vadcG pointer to VADC group registers.
988  * \return requested queue slot start mode.
989  */
990 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
991 
992 /** \brief Gets the requested queue slot trigger input.
993  * \param vadcG pointer to VADC group registers.
994  * \return requested queue slot trigger input.
995  */
996 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
997 
998 /** \brief Gets the requested queue slot trigger mode.
999  * \param vadcG pointer to VADC group registers.
1000  * \return requested queue slot trigger mode.
1001  */
1002 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1003 
1004 /** \brief Returns the queue slot requested status.
1005  * \param vadcG pointer to VADC group registers.
1006  * \return TRUE if queue slot request enabled otherwise FALSE.
1007  */
1008 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1009 
1010 /** \brief Sets the gating configurations.
1011  * \param vadcG pointer to VADC group registers.
1012  * \param gatingSource gate input for group.
1013  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1014  * \return None
1015  */
1016 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1017 
1018 /** \brief Sets the trigger operating configurations.
1019  * \param vadcG pointer to VADC group registers.
1020  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1021  * \param triggerSource trigger input for group.
1022  * \return None
1023  */
1024 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1025 
1026 /** \brief Starts a queue of a group by generating a trigger event through software
1027  * \param group pointer to the VADC group
1028  * \return None
1029  */
1030 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1031 
1032 /******************************************************************************/
1033 /*-------------------------Global Function Prototypes-------------------------*/
1034 /******************************************************************************/
1035 
1036 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1037  * \param group pointer to the VADC group
1038  * \return status of the Queue
1039  *
1040  * \code
1041  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1042  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1043  * \endcode
1044  *
1045  */
1046 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1047 
1048 /** \} */
1049 
1050 /** \addtogroup IfxLld_Vadc_Std_IO
1051  * \{ */
1052 
1053 /******************************************************************************/
1054 /*-------------------------Inline Function Prototypes-------------------------*/
1055 /******************************************************************************/
1056 
1057 /** \brief Initializes a EMUX output
1058  * \param emux the Emux Pin which should be configured
1059  * \param outputMode the pin output mode which should be configured
1060  * \param padDriver the pad driver mode which should be configured
1061  * \return None
1062  */
1063 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1064 
1065 /** \brief Initializes a GxBFL output
1066  * \param gxBfl the GxBFL Pin which should be configured
1067  * \param outputMode the pin output mode which should be configured
1068  * \param padDriver the pad driver mode which should be configured
1069  * \return None
1070  */
1071 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1072 
1073 /** \} */
1074 
1075 /** \addtogroup IfxLld_Vadc_Std_Frequency
1076  * \{ */
1077 
1078 /******************************************************************************/
1079 /*-------------------------Inline Function Prototypes-------------------------*/
1080 /******************************************************************************/
1081 
1082 /** \brief Calculate the time using analog frequency.
1083  * \param analogFrequency analog frequency in Hz.
1084  * \param sampleTime sample time in sec.
1085  * \return sample time in sec.
1086  */
1087 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1088 
1089 /******************************************************************************/
1090 /*-------------------------Global Function Prototypes-------------------------*/
1091 /******************************************************************************/
1092 
1093 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1094  * \param vadc pointer to the base of VADC registers
1095  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1096  */
1097 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1098 
1099 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1100  * \param vadc pointer to the base of VADC registers
1101  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1102  */
1103 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1104 
1105 /** \} */
1106 
1107 /** \addtogroup IfxLld_Vadc_Std_Group
1108  * \{ */
1109 
1110 /******************************************************************************/
1111 /*-------------------------Inline Function Prototypes-------------------------*/
1112 /******************************************************************************/
1113 
1114 /** \brief Clears the all group requests.
1115  * \param vadcG pointer to VADC group registers.
1116  * \return None
1117  */
1118 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1119 
1120 /** \brief Gets the ADC group arbitration round length.
1121  * \param vadcG pointer to VADC group registers.
1122  * \return ADC group arbitration round length.
1123  */
1124 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1125 
1126 /** \brief Gets the channel esult service request node pointer 0.
1127  * \param vadcG pointer to VADC group registers.
1128  * \return channel result service request node pointer 0.
1129  */
1130 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1131 
1132 /** \brief Gets the channel esult service request node pointer 1.
1133  * \param vadcG pointer to VADC group registers.
1134  * \return channel result service request node pointer 1.
1135  */
1136 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1137 
1138 /** \brief Gets the channel service request node pointer.
1139  * \param vadcG pointer to VADC group registers.
1140  * \return channel service request node pointer.
1141  */
1142 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1143 
1144 /** \brief Gets the configured master index.
1145  * \param vadcG pointer to VADC group registers.
1146  * \return configured master kernel index.
1147  */
1148 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1149 
1150 /** \brief Resets the ADC group.
1151  * \param vadcG pointer to VADC group registers.
1152  * \return None
1153  */
1154 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1155 
1156 /** \brief Sets analog converter group number.
1157  * \param vadcG pointer to VADC group registers.
1158  * \param analogConverterMode group analog converter mode.
1159  * \return None
1160  */
1161 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1162 
1163 /** \brief Sets the arbiter round length.
1164  * \param vadcG pointer to VADC group registers.
1165  * \param arbiterRoundLength arbiter round length.
1166  * \return None
1167  */
1168 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1169 
1170 /** \brief Sets the ADC input class channel resolution.
1171  * \param vadcG pointer to VADC group registers.
1172  * \param inputClassNum input class number.
1173  * \param resolution ADC input class channel resolution.
1174  * \return None
1175  */
1176 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1177 
1178 /** \brief Sets the ADC input class sample time.
1179  * \param vadcG pointer to VADC group registers.
1180  * \param inputClassNum input class number.
1181  * \param analogFrequency ADC analog frequency in Hz.
1182  * \param sampleTime request sample time in sec for input class.
1183  * \return None
1184  */
1185 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1186 
1187 /** \brief Sets the master index.
1188  * \param vadcG pointer to VADC group registers.
1189  * \param masterIndex master index.
1190  * \return None
1191  */
1192 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1193 
1194 /******************************************************************************/
1195 /*-------------------------Global Function Prototypes-------------------------*/
1196 /******************************************************************************/
1197 
1198 /** \brief Sets the Arbiter slot configurations.
1199  * \param vadcG pointer to VADC group registers.
1200  * \param slotEnable enable/disable of slot.
1201  * \param prio channel request priority.
1202  * \param mode Channel Slot start mode.
1203  * \param slot channel slot Request source.
1204  * \return None
1205  */
1206 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1207 
1208 /** \} */
1209 
1210 /** \addtogroup IfxLld_Vadc_Std_Module
1211  * \{ */
1212 
1213 /******************************************************************************/
1214 /*-------------------------Inline Function Prototypes-------------------------*/
1215 /******************************************************************************/
1216 
1217 /** \brief Disable VADC Module
1218  * \param vadc Pointer to VADC Module
1219  * \return None
1220  */
1221 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1222 
1223 /** \brief Enable VADC kernel.
1224  * \param vadc pointer to the base of VADC registers.
1225  * \return None
1226  */
1227 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1228 
1229 /** \brief gets ADC Calibration Flag CAL status.
1230  * \param vadc pointer to VADC group registers.
1231  * \param adcCalGroupNum ADC CAL group number.
1232  * \return CAL group status.
1233  */
1234 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1235 
1236 /** \brief Gets the global control configuration value.
1237  * \param vadc pointer to the base of VADC registers.
1238  * \return global control configuration value.
1239  */
1240 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1241 
1242 /** \brief get SUCAL bit field status
1243  * \param vadc Pointer to VADC Module
1244  * \return Indicate the start-up calibration phase
1245  */
1246 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1247 
1248 /** \brief initiates the calibration pulse phase.
1249  * \param vadc pointer to the base of VADC registers
1250  * \return None
1251  */
1252 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1253 
1254 /** \brief Sets the channel conversion mode.
1255  * \param vadc pointer to VADC module registers.
1256  * \param inputClassNum global input class number.
1257  * \param resolution ADC channel resolution.
1258  * \return None
1259  */
1260 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1261 
1262 /** \brief Sets the sample time of ADC global class.
1263  * \param vadc pointer to VADC module registers.
1264  * \param inputClassNum global input class number.
1265  * \param analogFrequency ADC analog frequency in Hz.
1266  * \param sampleTime the requested sample time for input class in sec.
1267  * \return None
1268  */
1269 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1270 
1271 /** \brief Sets the sensitivity of the module to sleep signal
1272  * \param vadc pointer to VADC registers
1273  * \param mode mode selection (enable/disable)
1274  * \return None
1275  */
1276 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1277 
1278 /******************************************************************************/
1279 /*-------------------------Global Function Prototypes-------------------------*/
1280 /******************************************************************************/
1281 
1282 /** \brief Disable write access to the VADC config/control registers.
1283  * \param vadc pointer to the base of VADC registers.
1284  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1285  * \return None
1286  */
1287 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1288 
1289 /** \brief Disables the post calibration.
1290  * \param vadc pointer to the base of VADC registers.
1291  * \param group Index of the group.
1292  * \param disable disable or not.
1293  * \return None
1294  */
1295 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1296 
1297 /** \brief Enable write access to the VADC config/control registers.
1298  * \param vadc pointer to the base of VADC registers.
1299  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1300  * \return None
1301  */
1302 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1303 
1304 /** \brief Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068
1305  * \param vadc pointer to the base of VADC registers.
1306  * \param ccu6Num selects CCU60 or CCU61
1307  * \return None
1308  */
1309 IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num);
1310 
1311 /** \brief Module Frequency in Hz
1312  * \return Module Frequency in Hz.
1313  */
1314 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1315 
1316 /** \brief Gives the SRC source address.
1317  * \param group Index of the group
1318  * \param index SRC number
1319  * \return SRC source address
1320  */
1321 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1322 
1323 /** \brief Initialises ADC arbiter clock.
1324  * \param vadc pointer to the base of VADC registers
1325  * \param arbiterClockDivider ADC arbiter clock divider.
1326  * \return None
1327  */
1328 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1329 
1330 /** \brief Initialises the ADC Converter clock.
1331  * \param vadc pointer to the base of VADC registers
1332  * \param converterClockDivider ADC converter clock divider.
1333  * \return None
1334  */
1335 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1336 
1337 /** \brief Configure the FadcD vadc digital clock.
1338  * \param vadc pointer to the base of VADC registers.
1339  * \param fAdcD ADC digital clock frequency in Hz.
1340  * \return calculated ADC digital clock frequency in Hz.
1341  */
1342 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1343 
1344 /** \brief Configure the ADC analog clock.
1345  * \param vadc pointer to the base of VADC registers.
1346  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1347  * \return ADC analog clock frequency in Hz.
1348  */
1349 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1350 
1351 /** \brief Return the post calibration status
1352  * \param vadc Pointer to VADC module
1353  * \param group specifies Group ID
1354  * \return TRUE if the post calibration is enabled for the group else false
1355  */
1356 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1357 
1358 /** \brief Resets the kernel.
1359  * \param vadc pointer to the base of VADC registers.
1360  * \return None
1361  */
1362 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1363 
1364 /** \brief Select Low Power Supply Voltage
1365  * \param vadc Pointer to Module space
1366  * \param supplyVoltage Select Supply Voltage
1367  * \return None
1368  */
1369 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1370 
1371 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1372  * \param vadc pointer to the base of VADC registers.
1373  * \return None
1374  */
1375 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1376 
1377 /** \} */
1378 
1379 /** \addtogroup IfxLld_Vadc_Std_Channel
1380  * \{ */
1381 
1382 /******************************************************************************/
1383 /*-------------------------Inline Function Prototypes-------------------------*/
1384 /******************************************************************************/
1385 
1386 /** \brief Clears the channel request.
1387  * \param vadcG pointer to VADC group registers.
1388  * \param channelId channel id whose request to be cleared.
1389  * \return None
1390  */
1391 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1392 
1393 /** \brief Enables the FIFO mode.
1394  * \param vadcG pointer to VADC group registers.
1395  * \param resultRegister channel result register.
1396  * \param fifoMode FIFO mode .
1397  * \return None
1398  */
1399 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1400 
1401 /**
1402  * \param vadcG pointer to VADC group registers.
1403  * \param resultRegister channel result register.
1404  * \return None
1405  */
1406 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1407 
1408 /** \brief Gets the group's assigned channels.
1409  * \param vadcG pointer to VADC group registers.
1410  * \return group's assigned channels.
1411  */
1412 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1413 
1414 /** \brief Gets the current ADC channel control configurations.
1415  * \param vadcG pointer to VADC group registers.
1416  * \param channelIndex ADC channel number.
1417  * \return current ADC channel control configuration.
1418  */
1419 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1420 
1421 /** \brief Gets the channel input class
1422  * \param vadcG pointer to VADC Group register space
1423  * \param channelIndex specifies channel ID
1424  * \return Input class
1425  */
1426 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1427 
1428 /** \brief Gets the ADC input class channel resolution.
1429  * \param vadcG pointer to VADC group registers.
1430  * \param inputClassNum ADC input class number.
1431  * \return ADC input class channel resolution.
1432  */
1433 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1434 
1435 /** \brief Gets the ADC input class channel sample time.
1436  * \param vadcG pointer to VADC group registers.
1437  * \param inputClassNum ADC input class number.
1438  * \param analogFrequency ADC module analog frequency in Hz.
1439  * \return ADC input class channel sample time in sec.
1440  */
1441 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1442 
1443 /** \brief Sets the channels with low priority as background channel.
1444  * \param vadcG pointer to VADC group registers.
1445  * \param channelIndex group channel id.
1446  * \return None
1447  */
1448 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1449 
1450 /** \brief Sets the target for result background source.
1451  * \param vadcG pointer to VADC group registers.
1452  * \param channelIndex group channel id.
1453  * \param globalResultUsage whether storage in global result register.
1454  * \return None
1455  */
1456 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1457 
1458 /** \brief Selects boundary extension.
1459  * \param vadcG pointer to VADC group registers.
1460  * \param channelIndex group channel id.
1461  * \param boundaryMode boundary extension mode.
1462  * \return None
1463  */
1464 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1465 
1466 /** \brief Sets the channel event service request line.
1467  * \param vadcG pointer to VADC group registers.
1468  * \param channelSrcNr channel event Service Node.
1469  * \param channel channel number.
1470  * \return None
1471  */
1472 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1473 
1474 /** \brief Sets the channel input class.
1475  * \param vadcG pointer to VADC group registers.
1476  * \param channelIndex group channel id.
1477  * \param inputClass group input class.
1478  * \return None
1479  */
1480 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1481 
1482 /** \brief Sets the channel event mode.
1483  * \param vadcG pointer to VADC group registers.
1484  * \param channelIndex group channel id.
1485  * \param limitCheck channel event mode.
1486  * \return None
1487  */
1488 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1489 
1490 /** \brief Sets channel as priority channel with in the group.
1491  * \param vadcG pointer to VADC group registers.
1492  * \param channelIndex group channel id.
1493  * \return None
1494  */
1495 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1496 
1497 /** \brief Sets group's lower boundary.
1498  * \param vadcG pointer to VADC group registers.
1499  * \param channelIndex group channel id.
1500  * \param lowerBoundary group lower boundary.
1501  * \return None
1502  */
1503 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1504 
1505 /** \brief Selects the refernce input.
1506  * \param vadcG pointer to VADC group registers.
1507  * \param channelIndex group channel id.
1508  * \param reference reference input.
1509  * \return None
1510  */
1511 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1512 
1513 /** \brief Sets result event node pointer 0.
1514  * \param vadcG pointer to VADC group registers.
1515  * \param resultSrcNr channel result event service node.
1516  * \param resultRegister channel result register.
1517  * \return None
1518  */
1519 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1520 
1521 /** \brief Sets result event node pointer 1.
1522  * \param vadcG pointer to VADC group registers.
1523  * \param resultSrcNr channel result event service node.
1524  * \param resultRegister channel result register.
1525  * \return None
1526  */
1527 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1528 
1529 /** \brief Sets result store position.
1530  * \param vadcG pointer to VADC group registers.
1531  * \param channelIndex group channel id.
1532  * \param rightAlignedStorage result store position.
1533  * \return None
1534  */
1535 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1536 
1537 /** \brief Sets channel synchronization request.
1538  * \param vadcG pointer to VADC group registers.
1539  * \param channelIndex group channel id.
1540  * \param synchonize whether channel synchronize or stand alone operation.
1541  * \return None
1542  */
1543 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1544 
1545 /** \brief Sets group's upper boundary.
1546  * \param vadcG pointer to VADC group registers.
1547  * \param channelIndex group channel id.
1548  * \param upperBoundary group upper boundary.
1549  * \return None
1550  */
1551 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1552 
1553 /** \brief Sets the group result register.
1554  * \param vadcG pointer to VADC group registers.
1555  * \param channelIndex group channel id.
1556  * \param resultRegister result register for group result storage.
1557  * \return None
1558  */
1559 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1560 
1561 /******************************************************************************/
1562 /*-------------------------Global Function Prototypes-------------------------*/
1563 /******************************************************************************/
1564 
1565 /** \brief get channel conversion timing
1566  * \param vadc Pointer to VADC module
1567  * \param group specifies the Group
1568  * \param inputClass Input class used
1569  * \param analogFrequency ADC module analog frequency fadci in Hz.
1570  * \param moduleFrequency ADC module frequency fvadc in Hz.
1571  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1572  * \return Channel conversion Time in sec
1573  */
1574 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1575 
1576 /** \} */
1577 
1578 /** \addtogroup IfxLld_Vadc_Std_Emux
1579  * \{ */
1580 
1581 /******************************************************************************/
1582 /*-------------------------Inline Function Prototypes-------------------------*/
1583 /******************************************************************************/
1584 
1585 /** \brief get global input class resolution
1586  * \param vadc Pointer to VADC Module space
1587  * \param inputClassNum global input class number
1588  * \return External channel resolution for global input class
1589  */
1590 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1591 
1592 /** \brief Get the sample time of ADC global class for external channel.
1593  * \param vadc pointer to VADC Module space
1594  * \param inputClassNum Adc input class number
1595  * \param analogFrequency ADC module analog frequency in Hz.
1596  * \return ADC input class external channel sample time in sec.
1597  */
1598 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1599 
1600 /** \brief get the external channel resolution
1601  * \param vadcG Pointer to VADC group register space
1602  * \param inputClassNum Adc input class number
1603  * \return Adc input class External channel resolution
1604  */
1605 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1606 
1607 /** \brief Gets the ADC input class sample time of external channel.
1608  * \param vadcG Pointer to Register Group space
1609  * \param inputClassNum ADC input class number
1610  * \param analogFrequency ADC module analog frequency in Hz.
1611  * \return ADC input class external channel sample time in sec.
1612  */
1613 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1614 
1615 /** \brief set the external channel resolution of Global class
1616  * \param vadc pointer to VADC Module space
1617  * \param inputClassNum Global Input Class Number
1618  * \param resolution External Channel resolution
1619  * \return None
1620  */
1621 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1622 
1623 /** \brief Sets the sample time of ADC global class for external channel.
1624  * \param vadc Pointer to VADC Module space
1625  * \param inputClassNum Adc input class number
1626  * \param analogFrequency ADC analog Frequency in HZ
1627  * \param sampleTime the requested sample time for input class in sec
1628  * \return None
1629  */
1630 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1631 
1632 /** \brief set the external channel resolution of ADC input class
1633  * \param vadcG pointer to VADC Group Register space
1634  * \param inputClassNum input class number
1635  * \param resolution input class external channel resolution
1636  * \return None
1637  */
1638 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1639 
1640 /** \brief Sets the ADC input class sample time for external channel.
1641  * \param vadcG Pointer to VADC Group Register Space
1642  * \param inputClassNum input class number
1643  * \param analogFrequency ADC analog frequency in Hz.
1644  * \param sampleTime request sample time in sec for input class.
1645  * \return None
1646  */
1647 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1648 
1649 /** \brief Sets the Emux Interface for a particular group
1650  * \param vadc Pointer to VADC Module Space
1651  * \param emuxInterface specifies the EmuxInterface
1652  * \param group specifies the group ID
1653  * \return None
1654  */
1655 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1656 
1657 /******************************************************************************/
1658 /*-------------------------Global Function Prototypes-------------------------*/
1659 /******************************************************************************/
1660 
1661 /**
1662  * \param vadc pointer to Module space
1663  * \param vadcG Pointer to VADC group register space
1664  * \param mode External Multiplexer mode
1665  * \param channels Specifies channel Id
1666  * \param startChannel specifies the external channel value from which conversion to be carried out
1667  * \param code Output the channel number in binary code/gray code
1668  * \param sampleTimeControl specifies when to use a sample time for external channel
1669  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1670  * \return None
1671  */
1672 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1673 
1674 /** \} */
1675 
1676 /******************************************************************************/
1677 /*---------------------Inline Function Implementations------------------------*/
1678 /******************************************************************************/
1679 
1680 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1681 {
1682  group->QINR0.U = channel | options;
1683 }
1684 
1685 
1686 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1687 {
1688  uint32 ticks;
1689 
1690  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1691 
1692  if (ticks > 31)
1693  {
1694  ticks = (ticks / 16) + 15;
1695  }
1696 
1697  ticks = __minu(ticks, 0xFFu);
1698 
1699  return ticks;
1700 }
1701 
1702 
1703 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1704 {
1705  vadcG->REFCLR.U = 0x0000FFFFu;
1706 }
1707 
1708 
1709 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1710 {
1711  vadcG->CEFCLR.U = 1 << channelId;
1712 }
1713 
1714 
1715 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1716 {
1717  vadcG->QMR0.B.FLUSH = flushQueue;
1718 }
1719 
1720 
1721 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1722 {
1723  group->RCR[resultIdx].B.WFR = waitForRead;
1724 }
1725 
1726 
1727 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1728 {
1729  vadc->GLOBRCR.B.WFR = waitForRead;
1730 }
1731 
1732 
1733 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1734 {
1735  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1736  IfxScuWdt_clearCpuEndinit(passwd);
1737  vadc->CLC.B.DISR = 1;
1738  IfxScuWdt_setCpuEndinit(passwd);
1739 }
1740 
1741 
1742 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1743 {
1744  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1745 }
1746 
1747 
1748 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1749 {
1750  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1751 }
1752 
1753 
1754 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1755 {
1756  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1757 }
1758 
1759 
1760 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1761 {
1762  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1763 }
1764 
1765 
1766 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1767 {
1768  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1769 
1770  IfxScuWdt_clearCpuEndinit(passwd);
1771  vadc->CLC.U = 0x00000000;
1772  IfxScuWdt_setCpuEndinit(passwd);
1773 }
1774 
1775 
1776 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1777 {
1778  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1779 }
1780 
1781 
1782 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1783 {
1784  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1785 }
1786 
1787 
1788 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1789 {
1790  vadcG->RCR[resultRegister].B.SRGEN = 1;
1791 }
1792 
1793 
1794 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1795 {
1796  uint8 status;
1797  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1798  return status;
1799 }
1800 
1801 
1802 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1803 {
1804  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1805 }
1806 
1807 
1808 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1809 {
1810  Ifx_VADC_G_CHASS assignChannels;
1811  assignChannels.U = vadcG->CHASS.U;
1812  return assignChannels;
1813 }
1814 
1815 
1816 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1817 {
1818  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1819 }
1820 
1821 
1822 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1823 {
1824  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1825 }
1826 
1827 
1828 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1829 {
1830  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1831 }
1832 
1833 
1834 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1835 {
1836  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1837 }
1838 
1839 
1840 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1841 {
1842  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1843 }
1844 
1845 
1846 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1847 {
1848  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1849 }
1850 
1851 
1852 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1853 {
1854  Ifx_VADC_CHCTR tempChctr;
1855  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1856  return tempChctr;
1857 }
1858 
1859 
1860 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1861 {
1862  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1863 }
1864 
1865 
1866 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1867 {
1868  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1869  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1870  return resultServiceRequestNodePtr0;
1871 }
1872 
1873 
1874 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1875 {
1876  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1877  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1878  return resultServiceRequestNodePtr1;
1879 }
1880 
1881 
1882 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1883 {
1884  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1885  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1886  return serviceRequestNodePtr;
1887 }
1888 
1889 
1890 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1891 {
1892  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1893 }
1894 
1895 
1896 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1897 {
1898  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1899 }
1900 
1901 
1902 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1903 {
1904  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1905 }
1906 
1907 
1908 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1909 {
1910  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1911 }
1912 
1913 
1914 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1915 {
1916  Ifx_VADC_GLOBCFG globCfg;
1917  globCfg.U = vadc->GLOBCFG.U;
1918  return globCfg;
1919 }
1920 
1921 
1922 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1923 {
1924  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1925 }
1926 
1927 
1928 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1929 {
1930  Ifx_VADC_GLOBRES tmpGlobalResult;
1931 
1932  tmpGlobalResult.U = vadc->GLOBRES.U;
1933 
1934  return tmpGlobalResult;
1935 }
1936 
1937 
1938 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1939 {
1940  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1941 
1942  if (sampleTime > 16)
1943  {
1944  sampleTime = (sampleTime - 15) * 16;
1945  }
1946 
1947  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1948 }
1949 
1950 
1951 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1952 {
1953  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1954 }
1955 
1956 
1957 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1958 {
1959  uint32 idx;
1960 
1961  for (idx = 0; idx < numResults; idx++)
1962  {
1963  results[idx].U = group->RES[resultOffset + idx].U;
1964  }
1965 }
1966 
1967 
1968 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1969 {
1970  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
1971 
1972  if (sampleTime > 16)
1973  {
1974  sampleTime = (sampleTime - 15) * 16;
1975  }
1976 
1977  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1978 }
1979 
1980 
1981 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
1982 {
1983  uint8 masterIndex = 0;
1984  masterIndex = vadcG->SYNCTR.B.STSEL;
1985  return masterIndex;
1986 }
1987 
1988 
1989 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
1990 {
1991  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
1992 }
1993 
1994 
1995 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
1996 {
1997  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
1998 }
1999 
2000 
2001 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2002 {
2003  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2004 }
2005 
2006 
2007 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2008 {
2009  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2010 }
2011 
2012 
2013 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2014 {
2015  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2016 }
2017 
2018 
2019 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2020 {
2021  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2022 }
2023 
2024 
2025 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2026 {
2027  Ifx_VADC_RES tmpResult;
2028 
2029  tmpResult.U = group->RES[resultIdx].U;
2030 
2031  return tmpResult;
2032 }
2033 
2034 
2035 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2036 {
2037  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2038 }
2039 
2040 
2041 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2042 {
2043  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2044 }
2045 
2046 
2047 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2048 {
2049  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2050 }
2051 
2052 
2053 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2054 {
2055  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2056 }
2057 
2058 
2059 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2060 {
2061  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2062 }
2063 
2064 
2065 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2066 {
2067  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2068 }
2069 
2070 
2071 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2072 {
2073  return (boolean)vadc->GLOBCFG.B.SUCAL;
2074 }
2075 
2076 
2077 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2078 {
2079  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2080  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2081 }
2082 
2083 
2084 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2085 {
2086  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2087  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2088 }
2089 
2090 
2091 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2092 {
2093  vadc->GLOBCFG.B.SUCAL = 1;
2094 }
2095 
2096 
2097 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2098 {
2099  return (boolean)vadc->BRSMR.B.SCAN;
2100 }
2101 
2102 
2103 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2104 {
2105  return (boolean)vadcG->ASMR.B.SCAN;
2106 }
2107 
2108 
2109 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2110 {
2111  return (boolean)vadcG->ARBPR.B.ASEN2;
2112 }
2113 
2114 
2115 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2116 {
2117  return (boolean)vadcG->ARBPR.B.ASEN0;
2118 }
2119 
2120 
2121 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2122 {
2123  return (boolean)vadcG->ARBPR.B.ASEN1;
2124 }
2125 
2126 
2127 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2128 {
2129  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2130 }
2131 
2132 
2133 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2134 {
2135  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2136 }
2137 
2138 
2139 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2140 {
2141  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2142 }
2143 
2144 
2145 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2146 {
2147  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2148 }
2149 
2150 
2151 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2152 {
2153  vadcG->ASMR.B.SCAN = autoscanEnable;
2154 }
2155 
2156 
2157 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2158 {
2159  vadcG->CHASS.U &= ~(1 << channelIndex);
2160 }
2161 
2162 
2163 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2164 {
2165  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2166 }
2167 
2168 
2169 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2170 {
2171  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2172  vadc->BRSSEL[groupId].U = channels;
2173 }
2174 
2175 
2176 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2177 {
2178  Ifx_VADC_BRSCTRL brsctrl;
2179  brsctrl.U = vadc->BRSCTRL.U;
2180  brsctrl.B.GTWC = 1;
2181  brsctrl.B.GTSEL = gatingSource;
2182  vadc->BRSCTRL.U = brsctrl.U;
2183  vadc->BRSMR.B.ENGT = gatingMode;
2184 }
2185 
2186 
2187 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2188 {
2189  Ifx_VADC_BRSCTRL brsctrl;
2190  brsctrl.U = vadc->BRSCTRL.U;
2191  brsctrl.B.XTWC = 1;
2192  brsctrl.B.XTMODE = triggerMode;
2193  brsctrl.B.XTSEL = triggerSource;
2194  vadc->BRSCTRL.U = brsctrl.U;
2195 }
2196 
2197 
2198 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2199 {
2200  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2201 }
2202 
2203 
2204 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2205 {
2206  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2207  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2208 }
2209 
2210 
2211 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2212 {
2213  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2214 }
2215 
2216 
2217 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2218 {
2219  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2220 }
2221 
2222 
2223 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2224 {
2225  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2226 }
2227 
2228 
2229 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2230 {
2231  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2232 }
2233 
2234 
2235 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2236 {
2237  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2238 }
2239 
2240 
2241 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2242 {
2243  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2244 }
2245 
2246 
2247 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2248 {
2249  if (emuxInterface == IfxVadc_EmuxInterface_0)
2250  {
2251  vadc->EMUXSEL.B.EMUXGRP0 = group;
2252  }
2253  else
2254  {
2255  vadc->EMUXSEL.B.EMUXGRP1 = group;
2256  }
2257 }
2258 
2259 
2260 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2261 {
2262  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2263 }
2264 
2265 
2266 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2267 {
2268  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2269 }
2270 
2271 
2272 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2273 {
2274  vadcG->CHASS.U |= (1 << channelIndex);
2275 }
2276 
2277 
2278 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2279 {
2280  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2281 }
2282 
2283 
2284 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2285 {
2286  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2287 }
2288 
2289 
2290 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2291 {
2292  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2293 }
2294 
2295 
2296 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2297 {
2298  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2299  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2300 }
2301 
2302 
2303 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2304 {
2305  Ifx_VADC_G_QCTRL0 qctrl0;
2306  qctrl0.U = vadcG->QCTRL0.U;
2307  qctrl0.B.GTWC = 1;
2308  qctrl0.B.GTSEL = gatingSource;
2309  vadcG->QCTRL0.U = qctrl0.U;
2310  vadcG->QMR0.B.ENGT = gatingMode;
2311 }
2312 
2313 
2314 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2315 {
2316  Ifx_VADC_G_QCTRL0 qctrl0;
2317  qctrl0.U = vadcG->QCTRL0.U;
2318  qctrl0.B.XTWC = 1;
2319  qctrl0.B.XTMODE = triggerMode;
2320  qctrl0.B.XTSEL = triggerSource;
2321  vadcG->QCTRL0.U = qctrl0.U;
2322 }
2323 
2324 
2325 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2326 {
2327  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2328 }
2329 
2330 
2331 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2332 {
2333  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2334  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2335 }
2336 
2337 
2338 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2339 {
2340  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2341  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2342 }
2343 
2344 
2345 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2346 {
2347  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2348 }
2349 
2350 
2351 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2352 {
2353  Ifx_VADC_G_ASCTRL asctrl;
2354  asctrl.U = vadcG->ASCTRL.U;
2355  asctrl.B.GTWC = 1;
2356  asctrl.B.GTSEL = gatingSource;
2357  vadcG->ASCTRL.U = asctrl.U;
2358  vadcG->ASMR.B.ENGT = gatingMode;
2359 }
2360 
2361 
2362 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2363 {
2364  Ifx_VADC_G_ASCTRL asctrl;
2365  asctrl.U = vadcG->ASCTRL.U;
2366  asctrl.B.XTWC = 1;
2367  asctrl.B.XTMODE = triggerMode;
2368  asctrl.B.XTSEL = triggerSource;
2369  vadcG->ASCTRL.U = asctrl.U;
2370 }
2371 
2372 
2373 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2374 {
2375  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2376  IfxScuWdt_clearCpuEndinit(passwd);
2377  vadc->CLC.B.EDIS = mode;
2378  IfxScuWdt_setCpuEndinit(passwd);
2379 }
2380 
2381 
2382 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2383 {
2384  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2385 }
2386 
2387 
2388 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2389 {
2390  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2391 }
2392 
2393 
2394 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2395 {
2396  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2397 }
2398 
2399 
2400 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2401 {
2402  group->QMR0.B.TREV = 1;
2403 }
2404 
2405 
2406 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2407 {
2408  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2409 }
2410 
2411 
2412 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2413 {
2414  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2415 }
2416 
2417 
2418 #endif /* IFXVADC_H */