iLLD_TC27xD  1.0
IfxGtm_Atom.c
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1 /**
2  * \file IfxGtm_Atom.c
3  * \brief GTM basic functionality
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  */
24 
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28 
29 #include "IfxGtm_Atom.h"
30 #include "IfxGtm_bf.h"
31 
32 /******************************************************************************/
33 /*----------------------------------Macros------------------------------------*/
34 /******************************************************************************/
35 
36 /** \brief Number of channels per ATOM AGC
37  */
38 #define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
39 
40 /** \addtogroup IfxLld_Gtm_Std_Atom_AGC_Functions
41  * \{ */
42 
43 /******************************************************************************/
44 /*-----------------------Private Function Prototypes--------------------------*/
45 /******************************************************************************/
46 
47 /** \brief Builds the register value for the feature enable/disable
48  * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
49  * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
50  * \param bitfieldOffset Offset of the channel 0 bitfield in the register
51  * \return The register value
52  */
53 static uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
54 
55 /** \} */
56 
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60 
61 static uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
62 {
63  uint8 i;
64  uint32 reg = 0;
65  uint32 mask = enableMask | (disableMask << 16);
66 
67  for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
68  {
69  /* Bitfield length is 2 bits */
70  uint8 shift = (i * 2) + bitfieldOffset;
71 
72  if (mask & 0x1)
73  {
74  reg |= IfxGtm_FeatureControl_enable << shift;
75  }
76 
77  if (mask & 0x10000)
78  {
79  reg |= IfxGtm_FeatureControl_disable << shift;
80  }
81 
82  mask = mask >> 1;
83  }
84 
85  return reg;
86 }
87 
88 
89 uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
90 {
91  uint32 reg = 0;
92 
93  /* Bitfield length is 2 bits */
94  uint8 shift = (((uint8)channel % 8) * 2) + bitfieldOffset;
95 
96  if (enabled == 1)
97  {
98  reg |= IfxGtm_FeatureControl_enable << shift;
99  }
100  else
101  {
102  reg |= IfxGtm_FeatureControl_disable << shift;
103  }
104 
105  return reg;
106 }
107 
108 
109 void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
110 {
111  uint32 value;
112 
113  value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
114 
115  if (immediate)
116  {
117  agc->ENDIS_CTRL.U |= value;
118  agc->ENDIS_STAT.U |= value;
119  }
120  else
121  {
122  agc->ENDIS_CTRL.U |= value;
123  }
124 }
125 
126 
127 void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
128 {
129  uint32 value;
130 
131  value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
132 
133  if (immediate)
134  {
135  agc->OUTEN_CTRL.U |= value;
136  agc->OUTEN_STAT.U |= value;
137  }
138  else
139  {
140  agc->OUTEN_CTRL.U |= value;
141  }
142 }
143 
144 
145 void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
146 {
147  agc->GLB_CTRL.U |= IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
148 }
149 
150 
151 void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
152 {
153  uint32 value;
154 
155  /* FIXME: Alann... is it possible to optimize, not always re-calculating the value using buildFeature function ? */
156 
157  value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
158 
159  if (immediate)
160  {
161  agc->ENDIS_CTRL.U = value;
162  agc->ENDIS_STAT.U = value;
163  }
164  else
165  {
166  agc->ENDIS_CTRL.U = value;
167  }
168 }
169 
170 
171 void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
172 {
173  uint32 value;
174 
175  value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
176 
177  if (immediate)
178  {
179  agc->OUTEN_CTRL.U = value;
180  agc->OUTEN_STAT.U = value;
181  }
182  else
183  {
184  agc->OUTEN_CTRL.U = value;
185  }
186 }
187 
188 
189 void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
190 {
191  agc->INT_TRIG.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_INT_TRIG_INT_TRIG0_OFF);
192 }
193 
194 
195 void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
196 {
197  agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
198 }
199 
200 
201 void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
202 {
203  agc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
204 }
205 
206 
207 void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
208 {
209  uint8 i;
210  uint32 reg = 0;
211 
212  for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
213  {
214  if (resetMask & 0x1)
215  {
216  reg |= 1 << i;
217  }
218 
219  resetMask = resetMask >> 1;
220  }
221 
222  agc->GLB_CTRL.U = reg << IFX_GTM_ATOM_AGC_GLB_CTRL_RST_CH0_OFF;
223 }
224 
225 
226 void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
227 {
228  uint32 regEnable, regReset;
229 
230  regEnable = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
231  regReset = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
232 
233  agc->FUPD_CTRL.U |= regEnable | (regReset << 16);
234 }
235 
236 
237 void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
238 {
239  uint32 regEnable, regReset;
240 
241  regEnable = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
242  regReset = IfxGtm_Atom_Agc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
243  agc->FUPD_CTRL.U = regEnable | regReset;
244 }
245 
246 
247 void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
248 {
249  Ifx_GTM_ATOM_AGC_ACT_TB act_tb;
250 
251  act_tb.U = agc->ACT_TB.U;
252  act_tb.B.TBU_SEL = base;
253  act_tb.B.ACT_TB = value;
254  agc->ACT_TB.U = act_tb.U;
255 }
256 
257 
258 void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
259 {
260  agc->GLB_CTRL.U = 1 << IFX_GTM_ATOM_AGC_GLB_CTRL_HOST_TRIG_OFF;
261 }
262 
263 
264 void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
265 {
266  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
267  atomCh->IRQ_NOTIFY.B.CCU1TC = 1;
268 }
269 
270 
271 void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
272 {
273  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
274  atomCh->IRQ_NOTIFY.B.CCU0TC = 1;
275 }
276 
277 
279 {
280  Ifx_GTM_ATOM_CH_CTRL_Bits ctrl = {
282  .CLK_SRC = clock,
283  .RST_CCU0 = resetEvent,
284  .SL = (activeState == Ifx_ActiveState_high ? 1 : 0),
285  .TRIGOUT = trigger,
286  };
287  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
288 
289  atomCh->CTRL.B = ctrl;
290 }
291 
292 
293 float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
294 {
295  IfxGtm_Cmu_Clk clock;
296 
297  clock = IfxGtm_Atom_Ch_getClockSource(atom, channel);
298 
299  return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
300 }
301 
302 
304 {
305  IfxGtm_Cmu_Clk clock;
306  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
307 
308  clock = atomCh->CTRL.B.CLK_SRC;
309  return clock;
310 }
311 
312 
314 {
315  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
316 
317  return atomCh->CM1.U;
318 }
319 
320 
321 volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
322 {
323  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
324 
325  return (volatile uint32 *)&atomCh->CM1;
326 }
327 
328 
330 {
331  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
332 
333  return atomCh->CM0.U;
334 }
335 
336 
337 volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
338 {
339  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
340 
341  return (volatile uint32 *)&atomCh->CM0;
342 }
343 
344 
345 boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
346 {
347  boolean result;
348  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
349 
350  result = atomCh->STAT.B.OL == 1;
351 
352  return result;
353 }
354 
355 
356 volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
357 {
358  return &MODULE_SRC.GTM.GTM[0].ATOM[atom][channel / 2];
359 }
360 
361 
362 volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
363 {
364  return (volatile uint32 *)((uint32)&(atom->CH0.CN0.U) + channel * (offsetof(Ifx_GTM_ATOM, CH1) - offsetof(Ifx_GTM_ATOM, CH0)));
365 }
366 
367 
368 boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
369 {
370  boolean result;
371  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
372 
373  result = atomCh->IRQ_NOTIFY.B.CCU1TC != 0;
374 
375  return result;
376 }
377 
378 
379 boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
380 {
381  boolean result;
382  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
383 
384  result = atomCh->IRQ_NOTIFY.B.CCU0TC != 0;
385 
386  return result;
387 }
388 
389 
390 void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
391 {
392  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
393 
394  atomCh->IRQ_FORCINT.B.TRG_CCU1TC = 1;
395 }
396 
397 
398 void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
399 {
400  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
401 
402  atomCh->IRQ_FORCINT.B.TRG_CCU0TC = 1;
403 }
404 
405 
406 void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
407 {
408  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
409 
410  atomCh->CTRL.B.CLK_SRC = clock;
411 }
412 
413 
414 void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
415 {
416  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
417 
418  atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
419  atomCh->CM1.U = compareOne;
420 }
421 
422 
423 void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
424 {
425  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
426 
427  atomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
428 }
429 
430 
431 void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
432 {
433  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
434 
435  atomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
436 }
437 
438 
439 void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
440 {
441  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
442 
443  atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
444  atomCh->SR1.U = shadowOne;
445 }
446 
447 
448 void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
449 {
450  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
451 
452  atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
453 }
454 
455 
456 void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
457 {
458  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
459 
460  atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
461 }
462 
463 
464 void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
465 {
466  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
467 
468  atomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
469 }
470 
471 
472 void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
473 {
474  Ifx_GTM_ATOM_CH *atomCh = (Ifx_GTM_ATOM_CH *)((uint32)&atom->CH0.RDADDR.U + 0x80 * channel);
475 
476  atomCh->CTRL.B.MODE = mode;
477 }
478 
479 
480 void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
481 {
482  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
483 
484  Ifx_GTM_ATOM_CH_IRQ_EN en;
485 
486  en.U = atomCh->IRQ_EN.U;
487 
488  /* Disable all interrupts of the interrupt set to change mode */
489  atomCh->IRQ_EN.U = IFX_ZEROS;
490  atomCh->IRQ_MODE.B.IRQ_MODE = mode;
491  atomCh->IRQ_EN.U = en.U; /* Set the values back */
492 
493  en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
494  en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
495  atomCh->IRQ_EN.U = en.U;
496 }
497 
498 
499 void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
500 {
501  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
502 
503  atomCh->CTRL.B.OSM = enabled ? 1 : 0;
504 }
505 
506 
508 {
509  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
510 
511  atomCh->CTRL.B.RST_CCU0 = event;
512 }
513 
514 
515 void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
516 {
517  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
518 
519  atomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
520 }
521 
522 
524 {
525  Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
526 
527  atomCh->CTRL.B.TRIGOUT = trigger;
528 }