iLLD_TC27xD  1.0
IfxFce_Crc.c
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1 /**
2  * \file IfxFce_Crc.c
3  * \brief FCE CRC details
4  *
5  * \version iLLD_1_0_0_11_0
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  *
24  */
25 
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29 
30 #include "IfxFce_Crc.h"
31 
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35 
36 uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
37 {
38  Ifx_FCE *fceSFR = fce->fce;
39  uint32 inputDataCounter;
40  uint16 crcResultValue;
41  uint16 *dataPtr = (uint16 *)crcData;
42 
43  fceSFR->IN2.CHECK.U = 0xFACECAFE;
44  fceSFR->IN2.LENGTH.U = 0xFACECAFE;
45  fceSFR->IN2.CHECK.U = (uint16)fce->expectedCrc;
46  fceSFR->IN2.LENGTH.U = crcDataLength;
47 
48  /*Configure CRC register*/
49  fceSFR->IN2.CRC.U = crcStartValue;
50  {
51  /*Code for CRC-16 calculaion with 0x1021 polynomial*/
52  for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
53  {
54  fceSFR->IN2.IR.U = *(dataPtr++);
55  }
56  }
57 
58  crcResultValue = (uint16)fceSFR->IN2.RES.U;
59 
60  return crcResultValue;
61 }
62 
63 
64 uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
65 {
66  Ifx_FCE *fceSFR = fce->fce;
67  uint32 inputDataCounter;
68  uint32 crcResultValue;
69  uint32 *dataPtr = (uint32 *)crcData;
70  volatile uint32 *inPtr;
71 
72  /*Crc-32 calculaion with 0x04C11DB7 polynomial*/
74  {
75  fceSFR->IN0.CHECK.U = 0xFACECAFE;
76  fceSFR->IN0.LENGTH.U = 0xFACECAFE;
77  fceSFR->IN0.CHECK.U = fce->expectedCrc;
78  fceSFR->IN0.LENGTH.U = crcDataLength;
79  fceSFR->IN0.CRC.U = crcStartValue;
80 
81  inPtr = (volatile uint32 *)&fceSFR->IN0.IR.U;
82  }
83  else
84  {
85  fceSFR->IN1.CHECK.U = 0xFACECAFE;
86  fceSFR->IN1.LENGTH.U = 0xFACECAFE;
87  fceSFR->IN1.CHECK.U = fce->expectedCrc;
88  fceSFR->IN1.LENGTH.U = crcDataLength;
89  fceSFR->IN1.CRC.U = crcStartValue;
90 
91  inPtr = (volatile uint32 *)&fceSFR->IN1.IR.U;
92  }
93 
94  {
95  for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
96  {
97  *inPtr = *(dataPtr++);
98  }
99  }
100 
101  if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
102  {
103  crcResultValue = fceSFR->IN0.RES.U;
104  }
105  else
106  {
107  crcResultValue = fceSFR->IN1.RES.U;
108  }
109 
110  return crcResultValue;
111 }
112 
113 
114 uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
115 {
116  Ifx_FCE *fceSFR = fce->fce;
117  uint32 inputDataCounter;
118  uint8 crcResultValue;
119  uint8 *dataPtr = (uint8 *)crcData;
120 
121  fceSFR->IN3.CHECK.U = 0xFACECAFE;
122  fceSFR->IN3.LENGTH.U = 0xFACECAFE;
123  fceSFR->IN3.CHECK.U = (uint8)fce->expectedCrc;
124  fceSFR->IN3.LENGTH.U = crcDataLength;
125 
126  /*Configure CRC register*/
127  fceSFR->IN3.CRC.U = crcStartValue;
128 
129  /*Code for CRC-8 calculaion for 0x1D polynomials*/
130  {
131  /* input in INIT register */
132  for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
133  {
134  fceSFR->IN3.IR.U = *(dataPtr++);
135  }
136  }
137  crcResultValue = (uint8)fceSFR->IN3.RES.U;
138 
139  return crcResultValue;
140 }
141 
142 
144 {
145  if (fce->crcMode == IfxFce_CrcMode_8)
146  {
148  }
149  else if (fce->crcMode == IfxFce_CrcMode_16)
150  {
152  }
153  else
154  {
156  }
157 }
158 
159 
161 {
162  IfxFce_resetModule(fce->fce);
163 }
164 
165 
167 {
168  if (fce->crcMode == IfxFce_CrcMode_8)
169  {
170  return IfxFce_getCrc8InterruptStatus(fce->fce);
171  }
172  else if (fce->crcMode == IfxFce_CrcMode_16)
173  {
174  return IfxFce_getCrc16InterruptStatus(fce->fce);
175  }
176  else
177  {
179  }
180 }
181 
182 
184 {
185  fceCrc->fce = crcConfig->fce;
186  Ifx_FCE *fceSFR = crcConfig->fce;
187  fceCrc->crcMode = crcConfig->crcMode;
188  fceCrc->expectedCrc = crcConfig->expectedCrc;
189 
191  IfxScuWdt_clearCpuEndinit(password);
192 
193  Ifx_FCE_CFG tempCFG;
194  tempCFG.U = 0;
195  tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
196  tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
197  tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
198  tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
199  tempCFG.B.CCE = crcConfig->crcCheckCompared;
200  tempCFG.B.ALR = crcConfig->automaticLengthReload;
201  tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
202  tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
203  tempCFG.B.XSEL = crcConfig->crcResultInverted;
204 
205  if (crcConfig->crcMode == IfxFce_CrcMode_8)
206  {
207  fceSFR->IN3.CFG.U = tempCFG.U;
208  }
209  else if (crcConfig->crcMode == IfxFce_CrcMode_16)
210  {
211  fceSFR->IN2.CFG.U = tempCFG.U;
212  }
213  else
214  {
215  fceCrc->crc32Kernel = crcConfig->crc32Kernel;
216 
217  if (crcConfig->crc32Kernel == IfxFce_Crc32Kernel_0)
218  {
219  fceSFR->IN0.CFG.U = tempCFG.U;
220  }
221  else
222  {
223  fceSFR->IN1.CFG.U = tempCFG.U;
224  }
225  }
226 
227  IfxScuWdt_setCpuEndinit(password);
228 }
229 
230 
232 {
233  crcConfig->fce = fce->fce;
234  crcConfig->crcMode = IfxFce_CrcMode_32;
235  crcConfig->crcCheckCompared = TRUE;
236  crcConfig->automaticLengthReload = FALSE;
237  crcConfig->dataByteReflectionEnabled = TRUE;
238  crcConfig->crc32BitReflectionEnabled = TRUE;
239  crcConfig->crcResultInverted = TRUE;
240  crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
241  crcConfig->enabledInterrupts.configError = TRUE;
242  crcConfig->enabledInterrupts.lengthError = TRUE;
243  crcConfig->enabledInterrupts.busError = TRUE;
244 }
245 
246 
248 {
249  fce->fce = config->fce;
250  Ifx_FCE *fceSFR = config->fce;
251 
253  IfxScuWdt_clearCpuEndinit(password);
254  IfxFce_enableModule(fceSFR);
255  IfxScuWdt_setCpuEndinit(password);
256 
257  volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
258  IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
259  IfxSrc_enable(src);
260 }
261 
262 
264 {
265  config->fce = fce;
266  config->isrPriority = 0;
268 }