100 for (i = 2; i <= 32; i += 2)
105 if (
__leqf(error, bestError))
117 *targetFreq = sourceFreq / bestDiv;
119 return (bestDiv / 2) - 1;
131 Ifx_DSADC_CH_FCFGA fcfga;
144 (channel->
channel)->FCFGA = fcfga;
150 Ifx_DSADC_CGCFG cgcfg;
156 cgcfg.B.DIVCG = IfxDsadc_Dsadc_calcDIVx(sourceFreq / (32 * 32), &targetFreq);
161 dsadc->
dsadc->CGCFG = cgcfg;
181 Ifx_DSADC *dsadc = config->
module;
187 IfxDsadc_Dsadc_initModulator(channel, &config->
modulator);
188 IfxDsadc_Dsadc_initDemodulator(channel, &config->
demodulator);
189 IfxDsadc_Dsadc_initCombFilter(channel, &config->
combFilter);
190 IfxDsadc_Dsadc_initFirFilter(channel, &config->
firFilter);
191 IfxDsadc_Dsadc_initIntegrator(channel, &config->
integrator);
192 IfxDsadc_Dsadc_initAuxFilter(channel, &config->
auxFilter);
193 IfxDsadc_Dsadc_initRectifier(channel, &config->
rectifier);
245 .modulatorClockFreq = 10.0e6,
261 .decimationFactor = 50,
265 .fir0Enabled =
FALSE,
266 .fir1Enabled =
FALSE,
267 .offsetCompensation =
FALSE,
274 .integrationCount = 20,
275 .integrationCycles = 1,
284 .decimationFactor = 4,
289 *config = IfxDsadc_Dsadc_defaultChannelConfig;
304 Ifx_DSADC_CH_FCFGC fcfgc;
317 (channel->
channel)->FCFGC = fcfgc;
323 Ifx_DSADC_CH_DICFG dicfg;
339 (channel->
channel)->DICFG = dicfg;
345 Ifx_DSADC_CH_FCFGM fcfgm;
355 (channel->
channel)->FCFGM = fcfgm;
361 Ifx_DSADC_CH_IWCTR iwctr;
370 (channel->
channel)->IWCTR = iwctr;
376 Ifx_DSADC_CH_MODCFG modcfg;
388 modcfg.B.DIVM = IfxDsadc_Dsadc_calcDIVx(sourceFreq, &targetFreq);
395 (channel->
channel)->MODCFG = modcfg;
401 Ifx_DSADC *dsadcSFR = config->
dsadc;
403 dsadc->
dsadc = dsadcSFR;
408 dsadcSFR->CLC.U = 0x00000000;
416 Ifx_DSADC_GLOBCFG globcfg;
417 globcfg.U = dsadcSFR->GLOBCFG.U;
423 dsadcSFR->GLOBCFG.U = globcfg.U;
436 *config = IfxDsadc_Dsadc_defaultConfig;
437 config->
dsadc = dsadc;
443 Ifx_DSADC_CH_RECTCFG rect;
448 (channel->
channel)->RECTCFG = rect;