iLLD_TC27xD  1.0
IfxCpu_Trap.c
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1 /**
2  * \file IfxCpu_Trap.c
3  * \brief This file contains the APIs for Trap related functions.
4  *
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  *
25  */
26 
27 /*******************************************************************************
28 ** Includes **
29 *******************************************************************************/
30 #include "IfxCpu_Trap.h"
31 #include "Cpu/Std/IfxCpu.h"
33 #include "IfxCpu_reg.h"
34 #include "Ifx_Cfg.h"
35 #ifdef IFX_CFG_EXTEND_TRAP_HOOKS
36 #include "Ifx_Cfg_Trap.h"
37 #endif
38 
39 /******************************************************************************/
40 /* Macros */
41 /******************************************************************************/
42 /** \brief Configuration for CpuX enable.
43  *
44  */
45 #ifndef IFX_CFG_CPU_TRAP_TSR_HOOK
46 # define IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch) /**< By default macro is empty*/
47 #endif
48 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
49 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) /**< By default macro is empty*/
50 #endif
51 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
52 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) /**< By default macro is empty*/
53 #endif
54 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
55 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) /**< By default macro is empty*/
56 #endif
57 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
58 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) /**< By default macro is empty*/
59 #endif
60 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
61 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) /**< By default macro is empty*/
62 #endif
63 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
64 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) /**< By default macro is empty*/
65 #endif
66 
67 /*******************************************************************************
68 ** variables **
69 *******************************************************************************/
71 
72 /*******************************************************************************
73 ** Function definitions **
74 *******************************************************************************/
76 {
77  IfxCpu_Trap trapInfo;
78  trapInfo.tAddr = (unsigned int)__getA11();
79  trapInfo.tClass = trapClass;
80  trapInfo.tId = tin;
81  trapInfo.tCpu = IfxCpu_getCoreId();
82  return trapInfo;
83 }
84 
85 
87 {
89  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
90  __debug();
91  __asm("rfe");
92 }
93 
94 
96 {
98  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
99  __debug();
100  __asm("rfe");
101 }
102 
103 
105 {
107  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
108  __debug();
109  __asm("rfe");
110 }
111 
112 
114 {
116  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
117  __debug();
118  __asm("rfe");
119 }
120 
121 
123 {
125  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
126  __debug();
127  __asm("rfe");
128 }
129 
130 
132 {
134  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
135  __debug();
136  __asm("rfe");
137 }
138 
139 
141 {
144  __asm("rfe");
145 }
146 
147 
149 {
152  __asm("rfe");
153 }
154 
155 
157 {
160  __asm("rfe");
161 }
162 
163 
165 {
168  __asm("rfe");
169 }
170 
171 
173 {
176  __asm("rfe");
177 }
178 
179 
181 {
184  __asm("rfe");
185 }
186 
187 
189 {
191  IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch);
192  __debug();
193  __asm("rfe");
194 }
195 
196 
197 #if defined(__GNUC__)
198 #pragma section
199 #pragma section ".traptab_cpu0" awx
200 #endif
201 #if defined(__DCC__)
202 #pragma section
203 #pragma section CODE ".traptab_cpu0" X
204 #endif
205 #if defined(__TASKING__)
206 #pragma protect on
207 #pragma section code "traptab_cpu0"
208 #endif
209 
211 {
212  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
213  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
214  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
215  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
216  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
217  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
218  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu0);
219  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
220 }
221 
222 
223 #if IFXCPU_NUM_MODULES >= 2
224 #if defined(__GNUC__)
225 #pragma section
226 #pragma section ".traptab_cpu1" awx
227 #endif
228 #if defined(__DCC__)
229 #pragma section
230 #pragma section CODE ".traptab_cpu1" X
231 #endif
232 #if defined(__TASKING__)
233 #pragma section code "traptab_cpu1"
234 #endif
235 
236 void IfxCpu_Trap_vectorTable1(void)
237 {
238  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
239  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
240  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
241  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
242  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
243  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
244  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu1);
245  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
246 }
247 
248 
249 #endif
250 
251 #if IFXCPU_NUM_MODULES >= 3
252 #if defined(__GNUC__)
253 #pragma section
254 #pragma section ".traptab_cpu2" awx
255 #endif
256 #if defined(__DCC__)
257 #pragma section
258 #pragma section CODE ".traptab_cpu2" X
259 #endif
260 #if defined(__TASKING__)
261 #pragma section code "traptab_cpu2"
262 #endif
263 
264 void IfxCpu_Trap_vectorTable2(void)
265 {
266  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
267  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
268  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
269  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
270  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
271  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
272  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu2);
273  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
274 }
275 
276 
277 #endif
278 
279 #if IFXCPU_NUM_MODULES >= 4
280 #if defined(__GNUC__)
281 #pragma section
282 #pragma section ".traptab_cpu3" awx
283 #endif
284 #if defined(__DCC__)
285 #pragma section
286 #pragma section CODE ".traptab_cpu3" X
287 #endif
288 #if defined(__TASKING__)
289 #pragma section code "traptab_cpu3"
290 #endif
291 
292 void IfxCpu_Trap_vectorTable3(void)
293 {
294  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
295  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
296  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
297  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
298  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
299  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
300  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu3);
301  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
302 }
303 
304 
305 #endif
306 
307 #if IFXCPU_NUM_MODULES >= 5
308 #if defined(__GNUC__)
309 #pragma section
310 #pragma section ".traptab_cpu4" awx
311 #endif
312 #if defined(__DCC__)
313 #pragma section
314 #pragma section CODE ".traptab_cpu4" X
315 #endif
316 #if defined(__TASKING__)
317 #pragma section code "traptab_cpu4"
318 #endif
319 
320 void IfxCpu_Trap_vectorTable4(void)
321 {
322  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
323  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
324  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
325  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
326  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
327  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
328  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu4);
329  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
330 }
331 
332 
333 #endif
334 
335 #if IFXCPU_NUM_MODULES >= 6
336 #if defined(__GNUC__)
337 #pragma section
338 #pragma section ".traptab_cpu5" awx
339 #endif
340 #if defined(__DCC__)
341 #pragma section
342 #pragma section CODE ".traptab_cpu5" X
343 #endif
344 #if defined(__TASKING__)
345 #pragma section code "traptab_cpu5"
346 #endif
347 
348 void IfxCpu_Trap_vectorTable5(void)
349 {
350  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
351  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
352  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
353  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
354  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
355  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
356  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu5);
357  IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
358 }
359 
360 
361 #endif
362 
363 #if defined(__GNUC__)
364 #pragma section
365 #endif
366 #if defined(__DCC__)
367 #pragma section
368 #endif
369 #if defined(__DCC__)
370 #pragma interrupt IfxInterruptEx
371 #endif
372 #if defined(__TASKING__)
373 #pragma endprotect
374 #endif