iLLD_TC27xC  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 
60 /******************************************************************************/
61 /*--------------------------------Enumerations--------------------------------*/
62 /******************************************************************************/
63 
64 /** \addtogroup IfxLld_Vadc_Std_Enum
65  * \{ */
66 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
67  */
68 typedef enum
69 {
70  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
71  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
72  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
73  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
74 } IfxVadc_AnalogConverterMode;
75 
76 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
77  */
78 typedef enum
79 {
80  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
81  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
82  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
83  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
84 } IfxVadc_ArbitrationRounds;
85 
86 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
87  */
88 typedef enum
89 {
90  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
91  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
92  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
93  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
94  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
95  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
96  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
97  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
98  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
99  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
100  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
101  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
102  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
103  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
104  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
105  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
106 } IfxVadc_BoundaryExtension;
107 
108 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
109  */
110 typedef enum
111 {
112  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
113  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
114  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
115  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
116 } IfxVadc_BoundarySelection;
117 
118 /** \brief VADC Channels
119  */
120 typedef enum
121 {
122  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
123  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
124  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
125  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
126  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
127  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
128  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
129  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
130  IfxVadc_ChannelId_7 = 7 /**< \brief Channel 7 */
131 } IfxVadc_ChannelId;
132 
133 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
134  */
135 typedef enum
136 {
137  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
138  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
139 } IfxVadc_ChannelReference;
140 
141 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
142  */
143 typedef enum
144 {
145  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
146  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
147  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
148  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
149 } IfxVadc_ChannelResolution;
150 
151 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
152  */
153 typedef enum
154 {
155  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
156  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
157  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
158  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
159  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
160  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
161  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
162  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
163  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
164  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
165  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
166  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
167  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
168  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
169  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
170  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
171 } IfxVadc_ChannelResult;
172 
173 /** \brief External Multiplexer Channel Selection Style as defined in
174  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
175  */
176 typedef enum
177 {
178  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
179  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
180  * associated channel for EMUX control */
181 } IfxVadc_ChannelSelectionStyle;
182 
183 /** \brief type of conversion
184  */
185 typedef enum
186 {
187  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
188 } IfxVadc_ConversionType;
189 
190 /** \brief Specifies the External Coding scheme(binary/gray)
191  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
192  */
193 typedef enum
194 {
195  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
196  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
197 } IfxVadc_EmuxCodingScheme;
198 
199 /** \brief Specifies the Emux interface
200  */
201 typedef enum
202 {
203  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
204  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
205 } IfxVadc_EmuxInterface;
206 
207 /** \brief External Multiplexer sample time control
208  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
209  */
210 typedef enum
211 {
212  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
213  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
214 } IfxVadc_EmuxSampleTimeControl;
215 
216 /** \brief specifies the External Channel Start select value
217  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
218  */
219 typedef enum
220 {
221  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
222  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
223  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
224  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
225  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
226  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
227  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
228  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
229 } IfxVadc_EmuxSelectValue;
230 
231 /** \brief Specifies External Multiplexer Mode
232  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
233  */
234 typedef enum
235 {
236  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
237  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
238  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
239  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
240 } IfxVadc_ExternalMultiplexerMode;
241 
242 /** \brief FIFO mode enable
243  */
244 typedef enum
245 {
246  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
247  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
248  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
249  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
250 } IfxVadc_FifoMode;
251 
252 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
253  */
254 typedef enum
255 {
256  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
257  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
258  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
259  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
260 } IfxVadc_GatingMode;
261 
262 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
263  */
264 typedef enum
265 {
266  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
267  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
268  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
269  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
270  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
271  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
272  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
273  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
274  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
275  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
276  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
277  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
278  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
279  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
280  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
281  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
282 } IfxVadc_GatingSource;
283 
284 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
285  */
286 typedef enum
287 {
288  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
289  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
290  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
291  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
292 } IfxVadc_InputClasses;
293 
294 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
295  */
296 typedef enum
297 {
298  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
299  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
300  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
301  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
302 } IfxVadc_LimitCheck;
303 
304 /** \brief Low Power Supply Voltage Select
305  */
306 typedef enum
307 {
308  IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
309  IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
310 } IfxVadc_LowSupplyVoltageSelect;
311 
312 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
313  */
314 typedef enum
315 {
316  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
317  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
318  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
319  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
320  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
321  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
322  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
323  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
324  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
325  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
326  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
327  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
328  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
329  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
330  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
331  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
332  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
333  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
334  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
335  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
336  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
337  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
338  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
340  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
341  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
342  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
348  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
349  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
350  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
351  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
352  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
353  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
354  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
356  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
357  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
358  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
364  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
365  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
366  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
367  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
368  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
369  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
370  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
372  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
373  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
374  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379 } IfxVadc_Protection;
380 
381 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
382  */
383 typedef enum
384 {
385  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
386  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
387  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
388  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
389 } IfxVadc_RequestSlotPriority;
390 
391 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
392  */
393 typedef enum
394 {
395  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
396  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
397 } IfxVadc_RequestSlotStartMode;
398 
399 /** \brief Request sources
400  */
401 typedef enum
402 {
403  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
404  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
405  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
406 } IfxVadc_RequestSource;
407 
408 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
409  * Definition in Ifx_VADC.CLC.B.EDIS
410  */
411 typedef enum
412 {
413  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
414  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
415 } IfxVadc_SleepMode;
416 
417 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
418  */
419 typedef enum
420 {
421  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
422  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
423  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
424  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
425  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
426  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
427  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
428  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
429 } IfxVadc_SrcNr;
430 
431 /** \brief API return values defined in
432  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
433  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
434  */
435 typedef enum
436 {
437  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
438  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
439  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
440  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
441  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
442  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
443  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
444 } IfxVadc_Status;
445 
446 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
447  */
448 typedef enum
449 {
450  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
451  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
452  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
453  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
454 } IfxVadc_TriggerMode;
455 
456 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
457  */
458 typedef enum
459 {
460  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
461  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
462  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
463  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
464  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
465  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
466  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
467  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
468  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
469  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
470  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
471  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
472  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
473  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
474  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
475  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
476 } IfxVadc_TriggerSource;
477 
478 /** \} */
479 
480 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
481  * \{ */
482 
483 /******************************************************************************/
484 /*-------------------------Inline Function Prototypes-------------------------*/
485 /******************************************************************************/
486 
487 /** \brief access function to enable/disable wait for read mode for result registers
488  * \param group pointer to the VADC group
489  * \param resultIdx result register index
490  * \param waitForRead wait for read mode enabled/disabled
491  * \return None
492  */
493 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
494 
495 /** \brief access function to enable/disable wait for read mode for global result register
496  * \param vadc pointer to the VADC
497  * \param waitForRead wait for read mode enabled/disabled
498  * \return None
499  */
500 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
501 
502 /** \brief Enables the background sacn external trigger.
503  * \param vadc pointer to the base of VADC registers.
504  * \return None
505  */
506 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
507 
508 /** \brief Gets the background scan gating mode.
509  * \param vadc pointer to the base of VADC registers.
510  * \return background scan gating mode.
511  */
512 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
513 
514 /** \brief Gets the gating input selection.
515  * \param vadc pointer to the base of VADC registers.
516  * \return background scan gating input selection.
517  */
518 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
519 
520 /** \brief Gets the requested background scan slot priority.
521  * \param vadcG pointer to VADC group registers.
522  * \return requested background scan slot priority.
523  */
524 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
525 
526 /** \brief Gets the requested background scan slot start mode.
527  * \param vadcG pointer to VADC group registers.
528  * \return requested background scan slot start mode.
529  */
530 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
531 
532 /** \brief Gets the background scan trigger input.
533  * \param vadc pointer to the base of VADC registers.
534  * \return Gets the background scan external trigger source.
535  */
536 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
537 
538 /** \brief Gets the background scan external trigger mode.
539  * \param vadc pointer to the base of VADC registers.
540  * \return background scan external trigger mode.
541  */
542 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
543 
544 /** \brief get global input class resolution
545  * \param vadc Pointer to the VADC Group
546  * \param inputClassNum global input class number
547  * \return ADC input class channel resolution.
548  */
549 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
550 
551 /** \brief return conversion result stored in the Global result Register
552  * \param vadc pointer to the VADC module
553  * \return global result register
554  *
555  * \code
556  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
557  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
558  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
559  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
560  *
561  * //confiure wait for read mode for global result register
562  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
563  *
564  * // configure background scan
565  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
566  *
567  * // enable auto scan
568  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
569  *
570  * // start the background scan
571  * IfxVadc_startBackgroundScan(vadc);
572  *
573  * Ifx_VADC_GLOBRES result;
574  * result = IfxVadc_getGlobalResult (vadc);
575  *
576  * \endcode
577  *
578  */
579 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
580 
581 /** \brief get global input class sample time in sec
582  * \param vadc Pointer to the VADC Group Register space
583  * \param inputClassNum ADC input class number
584  * \param analogFrequency ADC module analog frequency in Hz.
585  * \return ADC input class channel sample time in sec.
586  */
587 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
588 
589 /** \brief Get conversion result for the group
590  * \param group pointer to the VADC group
591  * \param results pointer to scaled conversion results
592  * \param resultOffset offset for the first result
593  * \param numResults number of results
594  * \return None
595  *
596  * \code
597  * Ifx_VADC* vadc = &MODULE_VADC
598  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
599  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
600  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
601  *
602  * //confiure wait for read mode for global result register
603  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
604  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
605  *
606  * // configure scan
607  * IfxVadc_setScan(group, channels, mask);
608  *
609  * // enable auto scan
610  * IfxVadc_setAutoScan(group, TRUE);
611  *
612  * // start the scan
613  * IfxVadc_startScan(group);
614  *
615  * // wait for conversion to finish
616  *
617  * // fetch the 2 results of conversion for group 0
618  * Ifx_VADC_RES results[10];
619  * result = IfxVadc_getGroupResult(group, results, 0, 2);
620  * \endcode
621  *
622  */
623 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
624 
625 /** \brief Get conversion result (Function does not care about the alignment)
626  * value = raw * gain + offset.
627  * \param group pointer to the VADC group
628  * \param resultIdx result register index
629  * \return scaled Conversion result
630  *
631  * \code
632  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
633  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
634  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
635  *
636  * //confiure wait for read mode for global result register
637  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
638  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
639  *
640  * // configure scan
641  * IfxVadc_setScan(group, channels, mask);
642  *
643  * // enable auto scan
644  * IfxVadc_setAutoScan(group, TRUE);
645  *
646  * // start the scan
647  * IfxVadc_startScan(group);
648  *
649  * // wait for conversion to finish
650  *
651  * // fetch the result of conversion from result register 0 for group 0
652  * Ifx_VADC_RES result;
653  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
654  * \endcode
655  *
656  */
657 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
658 
659 /** \brief Returns the auto background scan status.
660  * \param vadc pointer to the base of VADC registers.
661  * \return TRUE if enabled otherwise FALSE.
662  */
663 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
664 
665 /** \brief Returns the background scan slot requested status.
666  * \param vadcG pointer to VADC group registers.
667  * \return background scan slot requested status.
668  */
669 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
670 
671 /** \brief Enables/Disables continuous background auto scan
672  * \param vadc pointer to the base of VADC registers.
673  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
674  * \return None
675  */
676 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
677 
678 /** \brief configures a background scan; can also stop autoscan if all channels are 0
679  * \param vadc pointer to the VADC module registers
680  * \param groupId group index
681  * \param channels specifies the channels which should be enabled/disabled
682  * \param mask specifies the channels which should be modified
683  * \return None
684  *
685  * Background scan can be enabled/disabled for the given channels which are selected with the mask
686  *
687  * \code
688  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
689  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
690  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
691  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
692  *
693  * //confiure wait for read mode for global result register
694  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
695  *
696  * // configure background scan
697  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
698  *
699  * // enable auto scan
700  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
701  *
702  * // start the background scan
703  * IfxVadc_startBackgroundScan(vadc);
704  * \endcode
705  *
706  */
707 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
708 
709 /** \brief Sets the background scan slot gating configurations.
710  * \param vadc pointer to the base of VADC registers.
711  * \param gatingSource gate input for group.
712  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
713  * \return None
714  */
715 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
716 
717 /** \brief Sets the background scan exteranal trigger operating configurations.
718  * \param vadc pointer to the base of VADC registers.
719  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
720  * \param triggerSource trigger input for group.
721  * \return None
722  */
723 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
724 
725 /** \brief Starts a background scan
726  * \param vadc pointer to the VADC module
727  * \return None
728  *
729  * \see IfxVadc_setBackgroundScan
730  *
731  */
732 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
733 
734 /******************************************************************************/
735 /*-------------------------Global Function Prototypes-------------------------*/
736 /******************************************************************************/
737 
738 /** \brief Gives the background scan status for a group
739  * \param vadc pointer to the VADC module
740  * \return IfxVadc_Status
741  */
742 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
743 
744 /** \brief Get conversion result (Function does not care about the alignment)
745  * value = raw * gain + offset.
746  * \param vadc VADC module pointer
747  * \param group pointer to the VADC group
748  * \param channel channel Id
749  * \param sourceType type of request source
750  * \return scaled Conversion result
751  *
752  * \code
753  * Ifx_VADC vadc;
754  * vadc.vadc = &MODULE_VADC;
755  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
756  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
757  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
758  *
759  * //confiure wait for read mode for global result register
760  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
761  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
762  *
763  * // configure scan
764  * IfxVadc_setScan(group, channels, mask);
765  *
766  * // start the scan
767  * IfxVadc_startScan(group);
768  *
769  * // wait for conversion to finish
770  *
771  * // fetch the result of conversion for channel 2 of group 0
772  * Ifx_VADC_RESresult2;
773  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
774  * Ifx_VADC_RESresult5;
775  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
776  * \endcode
777  *
778  */
779 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
780 
781 /** \} */
782 
783 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
784  * \{ */
785 
786 /******************************************************************************/
787 /*-------------------------Inline Function Prototypes-------------------------*/
788 /******************************************************************************/
789 
790 /** \brief Disables the scan slot external trigger.
791  * \param vadcG pointer to VADC group registers.
792  * \return None
793  */
794 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
795 
796 /** \brief Enables the scan slot external trigger.
797  * \param vadcG pointer to VADC group registers.
798  * \return None
799  */
800 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
801 
802 /** \brief Gets the request scan slot gating mode.
803  * \param vadcG pointer to VADC group registers.
804  * \return requested scan slot gating mode.
805  */
806 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
807 
808 /** \brief Gets the request scan slot gating input.
809  * \param vadcG pointer to VADC group registers.
810  * \return request scan slot gating input.
811  */
812 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
813 
814 /** \brief Gets the request scan slot priority.
815  * \param vadcG pointer to VADC group registers.
816  * \return request scan slot priority.
817  */
818 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
819 
820 /** \brief Gets the request scan slot start mode.
821  * \param vadcG pointer to VADC group registers.
822  * \return request scan slot start mode.
823  */
824 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
825 
826 /** \brief Gets the requested scan slot trigger input.
827  * \param vadcG pointer to VADC group registers.
828  * \return requested scan slot trigger input.
829  */
830 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
831 
832 /** \brief Gets the requested scan slot trigger mode.
833  * \param vadcG pointer to VADC group registers.
834  * \return requested scan slot trigger mode.
835  */
836 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
837 
838 /** \brief Gets the auto scan enable status.
839  * \param vadcG pointer to VADC group registers.
840  * \return TRUE if auto scan enabled otherwise FALSE.
841  */
842 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
843 
844 /** \brief Returns the scan slot requested status.
845  * \param vadcG pointer to VADC group registers.
846  * \return TRUE if scan slot request enabled otherwise FALSE.
847  */
848 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
849 
850 /** \brief Enables/Disables continuous auto scan
851  * \param vadcG pointer to VADC group registers.
852  * \param autoscanEnable whether autoscan is enabled or not.
853  * \return None
854  */
855 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
856 
857 /** \brief Sets the scan slot gating configuration.
858  * \param vadcG pointer to VADC group registers.
859  * \param gatingSource gate input for group.
860  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
861  * \return None
862  */
863 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
864 
865 /** \brief Sets the scan slot trigger operating configurations.
866  * \param vadcG pointer to VADC group registers.
867  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
868  * \param triggerSource trigger input for group.
869  * \return None
870  */
871 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
872 
873 /** \brief Starts an autoscan on the specified group
874  * \param group pointer to the VADC group
875  * \return None
876  *
877  * See \ref IfxVadc_setScan
878  *
879  */
880 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
881 
882 /******************************************************************************/
883 /*-------------------------Global Function Prototypes-------------------------*/
884 /******************************************************************************/
885 
886 /** \brief Gives the scan status for a group
887  * \param group pointer to the VADC group
888  * \return IfxVadc_Status
889  */
890 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
891 
892 /** \brief Configures an (auto-)scan
893  * \param group pointer to the VADC group
894  * \param channels specifies the channels which should be enabled/disabled
895  * \param mask specifies the channels which should be modified
896  * \return None
897  *
898  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
899  *
900  * \code
901  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
902  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
903  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
904  *
905  * // configure scan
906  * IfxVadc_setScan(group, channels, mask);
907  *
908  * // enable Auto-Scan
909  * IfxVadc_setAutoScan(group, TRUE);
910  *
911  * // start the scan
912  * IfxVadc_startScan(group);
913  * \endcode
914  *
915  */
916 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
917 
918 /** \} */
919 
920 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
921  * \{ */
922 
923 /******************************************************************************/
924 /*-------------------------Inline Function Prototypes-------------------------*/
925 /******************************************************************************/
926 
927 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
928  * refill incase of aborted conversion
929  * source interrupt enable/disable
930  * external trigger control of the aborted conversion
931  * \param group pointer to the VADC group
932  * \param channel specifies channel Id
933  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
934  * \return None
935  *
936  * \code
937  *
938  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
939  * IfxVadc_ChannelId channel = 1; // for channel 1
940  * // Add channel 1 to queue of group 0 with the refill turned on
941  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
942  * \endcode
943  *
944  */
945 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
946 
947 /** \brief Clears all the queue entries including backup stage.
948  * \param vadcG pointer to VADC group registers.
949  * \param flushQueue Whether queue is cleared or not.
950  * \return None
951  */
952 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
953 
954 /** \brief Disables the external trigger.
955  * \param vadcG pointer to VADC group registers.
956  * \return None
957  */
958 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
959 
960 /** \brief Enables the external trigger.
961  * \param vadcG pointer to VADC group registers.
962  * \return None
963  */
964 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
965 
966 /** \brief Gets the requested queue slot gating mode.
967  * \param vadcG pointer to VADC group registers.
968  * \return requested queue slot gating mode.
969  */
970 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
971 
972 /** \brief Gets the requested queue slot gating input.
973  * \param vadcG pointer to VADC group registers.
974  * \return requested queue slot gating input.
975  */
976 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
977 
978 /** \brief Gets the request queue slot priority.
979  * \param vadcG pointer to VADC group registers.
980  * \return requested queue slot priority.
981  */
982 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
983 
984 /** \brief Gets the requested queue slot start mode.
985  * \param vadcG pointer to VADC group registers.
986  * \return requested queue slot start mode.
987  */
988 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
989 
990 /** \brief Gets the requested queue slot trigger input.
991  * \param vadcG pointer to VADC group registers.
992  * \return requested queue slot trigger input.
993  */
994 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
995 
996 /** \brief Gets the requested queue slot trigger mode.
997  * \param vadcG pointer to VADC group registers.
998  * \return requested queue slot trigger mode.
999  */
1000 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1001 
1002 /** \brief Returns the queue slot requested status.
1003  * \param vadcG pointer to VADC group registers.
1004  * \return TRUE if queue slot request enabled otherwise FALSE.
1005  */
1006 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1007 
1008 /** \brief Sets the gating configurations.
1009  * \param vadcG pointer to VADC group registers.
1010  * \param gatingSource gate input for group.
1011  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1012  * \return None
1013  */
1014 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1015 
1016 /** \brief Sets the trigger operating configurations.
1017  * \param vadcG pointer to VADC group registers.
1018  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1019  * \param triggerSource trigger input for group.
1020  * \return None
1021  */
1022 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1023 
1024 /** \brief Starts a queue of a group by generating a trigger event through software
1025  * \param group pointer to the VADC group
1026  * \return None
1027  */
1028 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1029 
1030 /******************************************************************************/
1031 /*-------------------------Global Function Prototypes-------------------------*/
1032 /******************************************************************************/
1033 
1034 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1035  * \param group pointer to the VADC group
1036  * \return status of the Queue
1037  *
1038  * \code
1039  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1040  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1041  * \endcode
1042  *
1043  */
1044 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1045 
1046 /** \} */
1047 
1048 /** \addtogroup IfxLld_Vadc_Std_IO
1049  * \{ */
1050 
1051 /******************************************************************************/
1052 /*-------------------------Inline Function Prototypes-------------------------*/
1053 /******************************************************************************/
1054 
1055 /** \brief Initializes a EMUX output
1056  * \param emux the Emux Pin which should be configured
1057  * \param outputMode the pin output mode which should be configured
1058  * \param padDriver the pad driver mode which should be configured
1059  * \return None
1060  */
1061 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1062 
1063 /** \brief Initializes a GxBFL output
1064  * \param gxBfl the GxBFL Pin which should be configured
1065  * \param outputMode the pin output mode which should be configured
1066  * \param padDriver the pad driver mode which should be configured
1067  * \return None
1068  */
1069 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1070 
1071 /** \} */
1072 
1073 /** \addtogroup IfxLld_Vadc_Std_Frequency
1074  * \{ */
1075 
1076 /******************************************************************************/
1077 /*-------------------------Inline Function Prototypes-------------------------*/
1078 /******************************************************************************/
1079 
1080 /** \brief Calculate the time using analog frequency.
1081  * \param analogFrequency analog frequency in Hz.
1082  * \param sampleTime sample time in sec.
1083  * \return sample time in sec.
1084  */
1085 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1086 
1087 /******************************************************************************/
1088 /*-------------------------Global Function Prototypes-------------------------*/
1089 /******************************************************************************/
1090 
1091 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1092  * \param vadc pointer to the base of VADC registers
1093  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1094  */
1095 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1096 
1097 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1098  * \param vadc pointer to the base of VADC registers
1099  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1100  */
1101 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1102 
1103 /** \} */
1104 
1105 /** \addtogroup IfxLld_Vadc_Std_Group
1106  * \{ */
1107 
1108 /******************************************************************************/
1109 /*-------------------------Inline Function Prototypes-------------------------*/
1110 /******************************************************************************/
1111 
1112 /** \brief Clears the all group requests.
1113  * \param vadcG pointer to VADC group registers.
1114  * \return None
1115  */
1116 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1117 
1118 /** \brief Gets the ADC group arbitration round length.
1119  * \param vadcG pointer to VADC group registers.
1120  * \return ADC group arbitration round length.
1121  */
1122 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1123 
1124 /** \brief Gets the channel esult service request node pointer 0.
1125  * \param vadcG pointer to VADC group registers.
1126  * \return channel result service request node pointer 0.
1127  */
1128 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1129 
1130 /** \brief Gets the channel esult service request node pointer 1.
1131  * \param vadcG pointer to VADC group registers.
1132  * \return channel result service request node pointer 1.
1133  */
1134 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1135 
1136 /** \brief Gets the channel service request node pointer.
1137  * \param vadcG pointer to VADC group registers.
1138  * \return channel service request node pointer.
1139  */
1140 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1141 
1142 /** \brief Gets the configured master index.
1143  * \param vadcG pointer to VADC group registers.
1144  * \return configured master kernel index.
1145  */
1146 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1147 
1148 /** \brief Resets the ADC group.
1149  * \param vadcG pointer to VADC group registers.
1150  * \return None
1151  */
1152 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1153 
1154 /** \brief Sets analog converter group number.
1155  * \param vadcG pointer to VADC group registers.
1156  * \param analogConverterMode group analog converter mode.
1157  * \return None
1158  */
1159 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1160 
1161 /** \brief Sets the arbiter round length.
1162  * \param vadcG pointer to VADC group registers.
1163  * \param arbiterRoundLength arbiter round length.
1164  * \return None
1165  */
1166 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1167 
1168 /** \brief Sets the ADC input class channel resolution.
1169  * \param vadcG pointer to VADC group registers.
1170  * \param inputClassNum input class number.
1171  * \param resolution ADC input class channel resolution.
1172  * \return None
1173  */
1174 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1175 
1176 /** \brief Sets the ADC input class sample time.
1177  * \param vadcG pointer to VADC group registers.
1178  * \param inputClassNum input class number.
1179  * \param analogFrequency ADC analog frequency in Hz.
1180  * \param sampleTime request sample time in sec for input class.
1181  * \return None
1182  */
1183 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1184 
1185 /** \brief Sets the master index.
1186  * \param vadcG pointer to VADC group registers.
1187  * \param masterIndex master index.
1188  * \return None
1189  */
1190 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1191 
1192 /******************************************************************************/
1193 /*-------------------------Global Function Prototypes-------------------------*/
1194 /******************************************************************************/
1195 
1196 /** \brief Sets the Arbiter slot configurations.
1197  * \param vadcG pointer to VADC group registers.
1198  * \param slotEnable enable/disable of slot.
1199  * \param prio channel request priority.
1200  * \param mode Channel Slot start mode.
1201  * \param slot channel slot Request source.
1202  * \return None
1203  */
1204 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1205 
1206 /** \} */
1207 
1208 /** \addtogroup IfxLld_Vadc_Std_Module
1209  * \{ */
1210 
1211 /******************************************************************************/
1212 /*-------------------------Inline Function Prototypes-------------------------*/
1213 /******************************************************************************/
1214 
1215 /** \brief Disable VADC Module
1216  * \param vadc Pointer to VADC Module
1217  * \return None
1218  */
1219 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1220 
1221 /** \brief Enable VADC kernel.
1222  * \param vadc pointer to the base of VADC registers.
1223  * \return None
1224  */
1225 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1226 
1227 /** \brief gets ADC Calibration Flag CAL status.
1228  * \param vadc pointer to VADC group registers.
1229  * \param adcCalGroupNum ADC CAL group number.
1230  * \return CAL group status.
1231  */
1232 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1233 
1234 /** \brief Gets the global control configuration value.
1235  * \param vadc pointer to the base of VADC registers.
1236  * \return global control configuration value.
1237  */
1238 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1239 
1240 /** \brief get SUCAL bit field status
1241  * \param vadc Pointer to VADC Module
1242  * \return Indicate the start-up calibration phase
1243  */
1244 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1245 
1246 /** \brief initiates the calibration pulse phase.
1247  * \param vadc pointer to the base of VADC registers
1248  * \return None
1249  */
1250 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1251 
1252 /** \brief Sets the channel conversion mode.
1253  * \param vadc pointer to VADC module registers.
1254  * \param inputClassNum global input class number.
1255  * \param resolution ADC channel resolution.
1256  * \return None
1257  */
1258 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1259 
1260 /** \brief Sets the sample time of ADC global class.
1261  * \param vadc pointer to VADC module registers.
1262  * \param inputClassNum global input class number.
1263  * \param analogFrequency ADC analog frequency in Hz.
1264  * \param sampleTime the requested sample time for input class in sec.
1265  * \return None
1266  */
1267 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1268 
1269 /** \brief Sets the sensitivity of the module to sleep signal
1270  * \param vadc pointer to VADC registers
1271  * \param mode mode selection (enable/disable)
1272  * \return None
1273  */
1274 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1275 
1276 /******************************************************************************/
1277 /*-------------------------Global Function Prototypes-------------------------*/
1278 /******************************************************************************/
1279 
1280 /** \brief Disable write access to the VADC config/control registers.
1281  * \param vadc pointer to the base of VADC registers.
1282  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1283  * \return None
1284  */
1285 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1286 
1287 /** \brief Disables the post calibration.
1288  * \param vadc pointer to the base of VADC registers.
1289  * \param group Index of the group.
1290  * \param disable disable or not.
1291  * \return None
1292  */
1293 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1294 
1295 /** \brief Enable write access to the VADC config/control registers.
1296  * \param vadc pointer to the base of VADC registers.
1297  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1298  * \return None
1299  */
1300 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1301 
1302 /** \brief Module Frequency in Hz
1303  * \return Module Frequency in Hz.
1304  */
1305 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1306 
1307 /** \brief Gives the SRC source address.
1308  * \param group Index of the group
1309  * \param index SRC number
1310  * \return SRC source address
1311  */
1312 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1313 
1314 /** \brief Initialises ADC arbiter clock.
1315  * \param vadc pointer to the base of VADC registers
1316  * \param arbiterClockDivider ADC arbiter clock divider.
1317  * \return None
1318  */
1319 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1320 
1321 /** \brief Initialises the ADC Converter clock.
1322  * \param vadc pointer to the base of VADC registers
1323  * \param converterClockDivider ADC converter clock divider.
1324  * \return None
1325  */
1326 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1327 
1328 /** \brief Configure the FadcD vadc digital clock.
1329  * \param vadc pointer to the base of VADC registers.
1330  * \param fAdcD ADC digital clock frequency in Hz.
1331  * \return calculated ADC digital clock frequency in Hz.
1332  */
1333 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1334 
1335 /** \brief Configure the ADC analog clock.
1336  * \param vadc pointer to the base of VADC registers.
1337  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1338  * \return ADC analog clock frequency in Hz.
1339  */
1340 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1341 
1342 /** \brief Return the post calibration status
1343  * \param vadc Pointer to VADC module
1344  * \param group specifies Group ID
1345  * \return TRUE if the post calibration is enabled for the group else false
1346  */
1347 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1348 
1349 /** \brief Resets the kernel.
1350  * \param vadc pointer to the base of VADC registers.
1351  * \return None
1352  */
1353 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1354 
1355 /** \brief Select Low Power Supply Voltage
1356  * \param vadc Pointer to Module space
1357  * \param supplyVoltage Select Supply Voltage
1358  * \return None
1359  */
1360 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1361 
1362 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1363  * \param vadc pointer to the base of VADC registers.
1364  * \return None
1365  */
1366 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1367 
1368 /** \} */
1369 
1370 /** \addtogroup IfxLld_Vadc_Std_Channel
1371  * \{ */
1372 
1373 /******************************************************************************/
1374 /*-------------------------Inline Function Prototypes-------------------------*/
1375 /******************************************************************************/
1376 
1377 /** \brief Clears the channel request.
1378  * \param vadcG pointer to VADC group registers.
1379  * \param channelId channel id whose request to be cleared.
1380  * \return None
1381  */
1382 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1383 
1384 /** \brief Enables the FIFO mode.
1385  * \param vadcG pointer to VADC group registers.
1386  * \param resultRegister channel result register.
1387  * \param fifoMode FIFO mode .
1388  * \return None
1389  */
1390 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1391 
1392 /**
1393  * \param vadcG pointer to VADC group registers.
1394  * \param resultRegister channel result register.
1395  * \return None
1396  */
1397 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1398 
1399 /** \brief Gets the group's assigned channels.
1400  * \param vadcG pointer to VADC group registers.
1401  * \return group's assigned channels.
1402  */
1403 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1404 
1405 /** \brief Gets the current ADC channel control configurations.
1406  * \param vadcG pointer to VADC group registers.
1407  * \param channelIndex ADC channel number.
1408  * \return current ADC channel control configuration.
1409  */
1410 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1411 
1412 /** \brief Gets the channel input class
1413  * \param vadcG pointer to VADC Group register space
1414  * \param channelIndex specifies channel ID
1415  * \return Input class
1416  */
1417 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1418 
1419 /** \brief Gets the ADC input class channel resolution.
1420  * \param vadcG pointer to VADC group registers.
1421  * \param inputClassNum ADC input class number.
1422  * \return ADC input class channel resolution.
1423  */
1424 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1425 
1426 /** \brief Gets the ADC input class channel sample time.
1427  * \param vadcG pointer to VADC group registers.
1428  * \param inputClassNum ADC input class number.
1429  * \param analogFrequency ADC module analog frequency in Hz.
1430  * \return ADC input class channel sample time in sec.
1431  */
1432 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1433 
1434 /** \brief Sets the channels with low priority as background channel.
1435  * \param vadcG pointer to VADC group registers.
1436  * \param channelIndex group channel id.
1437  * \return None
1438  */
1439 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1440 
1441 /** \brief Sets the target for result background source.
1442  * \param vadcG pointer to VADC group registers.
1443  * \param channelIndex group channel id.
1444  * \param globalResultUsage whether storage in global result register.
1445  * \return None
1446  */
1447 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1448 
1449 /** \brief Selects boundary extension.
1450  * \param vadcG pointer to VADC group registers.
1451  * \param channelIndex group channel id.
1452  * \param boundaryMode boundary extension mode.
1453  * \return None
1454  */
1455 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1456 
1457 /** \brief Sets the channel event service request line.
1458  * \param vadcG pointer to VADC group registers.
1459  * \param channelSrcNr channel event Service Node.
1460  * \param channel channel number.
1461  * \return None
1462  */
1463 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1464 
1465 /** \brief Sets the channel input class.
1466  * \param vadcG pointer to VADC group registers.
1467  * \param channelIndex group channel id.
1468  * \param inputClass group input class.
1469  * \return None
1470  */
1471 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1472 
1473 /** \brief Sets the channel event mode.
1474  * \param vadcG pointer to VADC group registers.
1475  * \param channelIndex group channel id.
1476  * \param limitCheck channel event mode.
1477  * \return None
1478  */
1479 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1480 
1481 /** \brief Sets channel as priority channel with in the group.
1482  * \param vadcG pointer to VADC group registers.
1483  * \param channelIndex group channel id.
1484  * \return None
1485  */
1486 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1487 
1488 /** \brief Sets group's lower boundary.
1489  * \param vadcG pointer to VADC group registers.
1490  * \param channelIndex group channel id.
1491  * \param lowerBoundary group lower boundary.
1492  * \return None
1493  */
1494 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1495 
1496 /** \brief Selects the refernce input.
1497  * \param vadcG pointer to VADC group registers.
1498  * \param channelIndex group channel id.
1499  * \param reference reference input.
1500  * \return None
1501  */
1502 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1503 
1504 /** \brief Sets result event node pointer 0.
1505  * \param vadcG pointer to VADC group registers.
1506  * \param resultSrcNr channel result event service node.
1507  * \param resultRegister channel result register.
1508  * \return None
1509  */
1510 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1511 
1512 /** \brief Sets result event node pointer 1.
1513  * \param vadcG pointer to VADC group registers.
1514  * \param resultSrcNr channel result event service node.
1515  * \param resultRegister channel result register.
1516  * \return None
1517  */
1518 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1519 
1520 /** \brief Sets result store position.
1521  * \param vadcG pointer to VADC group registers.
1522  * \param channelIndex group channel id.
1523  * \param rightAlignedStorage result store position.
1524  * \return None
1525  */
1526 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1527 
1528 /** \brief Sets channel synchronization request.
1529  * \param vadcG pointer to VADC group registers.
1530  * \param channelIndex group channel id.
1531  * \param synchonize whether channel synchronize or stand alone operation.
1532  * \return None
1533  */
1534 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1535 
1536 /** \brief Sets group's upper boundary.
1537  * \param vadcG pointer to VADC group registers.
1538  * \param channelIndex group channel id.
1539  * \param upperBoundary group upper boundary.
1540  * \return None
1541  */
1542 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1543 
1544 /** \brief Sets the group result register.
1545  * \param vadcG pointer to VADC group registers.
1546  * \param channelIndex group channel id.
1547  * \param resultRegister result register for group result storage.
1548  * \return None
1549  */
1550 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1551 
1552 /******************************************************************************/
1553 /*-------------------------Global Function Prototypes-------------------------*/
1554 /******************************************************************************/
1555 
1556 /** \brief get channel conversion timing
1557  * \param vadc Pointer to VADC module
1558  * \param group specifies the Group
1559  * \param inputClass Input class used
1560  * \param analogFrequency ADC module analog frequency fadci in Hz.
1561  * \param moduleFrequency ADC module frequency fvadc in Hz.
1562  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1563  * \return Channel conversion Time in sec
1564  */
1565 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1566 
1567 /** \} */
1568 
1569 /** \addtogroup IfxLld_Vadc_Std_Emux
1570  * \{ */
1571 
1572 /******************************************************************************/
1573 /*-------------------------Inline Function Prototypes-------------------------*/
1574 /******************************************************************************/
1575 
1576 /** \brief get global input class resolution
1577  * \param vadc Pointer to VADC Module space
1578  * \param inputClassNum global input class number
1579  * \return External channel resolution for global input class
1580  */
1581 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1582 
1583 /** \brief Get the sample time of ADC global class for external channel.
1584  * \param vadc pointer to VADC Module space
1585  * \param inputClassNum Adc input class number
1586  * \param analogFrequency ADC module analog frequency in Hz.
1587  * \return ADC input class external channel sample time in sec.
1588  */
1589 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1590 
1591 /** \brief get the external channel resolution
1592  * \param vadcG Pointer to VADC group register space
1593  * \param inputClassNum Adc input class number
1594  * \return Adc input class External channel resolution
1595  */
1596 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1597 
1598 /** \brief Gets the ADC input class sample time of external channel.
1599  * \param vadcG Pointer to Register Group space
1600  * \param inputClassNum ADC input class number
1601  * \param analogFrequency ADC module analog frequency in Hz.
1602  * \return ADC input class external channel sample time in sec.
1603  */
1604 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1605 
1606 /** \brief set the external channel resolution of Global class
1607  * \param vadc pointer to VADC Module space
1608  * \param inputClassNum Global Input Class Number
1609  * \param resolution External Channel resolution
1610  * \return None
1611  */
1612 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1613 
1614 /** \brief Sets the sample time of ADC global class for external channel.
1615  * \param vadc Pointer to VADC Module space
1616  * \param inputClassNum Adc input class number
1617  * \param analogFrequency ADC analog Frequency in HZ
1618  * \param sampleTime the requested sample time for input class in sec
1619  * \return None
1620  */
1621 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1622 
1623 /** \brief set the external channel resolution of ADC input class
1624  * \param vadcG pointer to VADC Group Register space
1625  * \param inputClassNum input class number
1626  * \param resolution input class external channel resolution
1627  * \return None
1628  */
1629 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1630 
1631 /** \brief Sets the ADC input class sample time for external channel.
1632  * \param vadcG Pointer to VADC Group Register Space
1633  * \param inputClassNum input class number
1634  * \param analogFrequency ADC analog frequency in Hz.
1635  * \param sampleTime request sample time in sec for input class.
1636  * \return None
1637  */
1638 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1639 
1640 /** \brief Sets the Emux Interface for a particular group
1641  * \param vadc Pointer to VADC Module Space
1642  * \param emuxInterface specifies the EmuxInterface
1643  * \param group specifies the group ID
1644  * \return None
1645  */
1646 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1647 
1648 /******************************************************************************/
1649 /*-------------------------Global Function Prototypes-------------------------*/
1650 /******************************************************************************/
1651 
1652 /**
1653  * \param vadc pointer to Module space
1654  * \param vadcG Pointer to VADC group register space
1655  * \param mode External Multiplexer mode
1656  * \param channels Specifies channel Id
1657  * \param startChannel specifies the external channel value from which conversion to be carried out
1658  * \param code Output the channel number in binary code/gray code
1659  * \param sampleTimeControl specifies when to use a sample time for external channel
1660  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1661  * \return None
1662  */
1663 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1664 
1665 /** \} */
1666 
1667 /******************************************************************************/
1668 /*---------------------Inline Function Implementations------------------------*/
1669 /******************************************************************************/
1670 
1671 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1672 {
1673  group->QINR0.U = channel | options;
1674 }
1675 
1676 
1677 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1678 {
1679  uint32 ticks;
1680 
1681  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1682 
1683  if (ticks > 31)
1684  {
1685  ticks = (ticks / 16) + 15;
1686  }
1687 
1688  ticks = __minu(ticks, 0xFFu);
1689 
1690  return ticks;
1691 }
1692 
1693 
1694 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1695 {
1696  vadcG->REFCLR.U = 0x0000FFFFu;
1697 }
1698 
1699 
1700 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1701 {
1702  vadcG->CEFCLR.U = 1 << channelId;
1703 }
1704 
1705 
1706 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1707 {
1708  vadcG->QMR0.B.FLUSH = flushQueue;
1709 }
1710 
1711 
1712 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1713 {
1714  group->RCR[resultIdx].B.WFR = waitForRead;
1715 }
1716 
1717 
1718 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1719 {
1720  vadc->GLOBRCR.B.WFR = waitForRead;
1721 }
1722 
1723 
1724 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1725 {
1726  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1727  IfxScuWdt_clearCpuEndinit(passwd);
1728  vadc->CLC.B.DISR = 1;
1729  IfxScuWdt_setCpuEndinit(passwd);
1730 }
1731 
1732 
1733 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1734 {
1735  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1736 }
1737 
1738 
1739 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1740 {
1741  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1742 }
1743 
1744 
1745 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1746 {
1747  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1748 }
1749 
1750 
1751 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1752 {
1753  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1754 }
1755 
1756 
1757 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1758 {
1759  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1760 
1761  IfxScuWdt_clearCpuEndinit(passwd);
1762  vadc->CLC.U = 0x00000000;
1763  IfxScuWdt_setCpuEndinit(passwd);
1764 }
1765 
1766 
1767 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1768 {
1769  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1770 }
1771 
1772 
1773 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1774 {
1775  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1776 }
1777 
1778 
1779 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1780 {
1781  vadcG->RCR[resultRegister].B.SRGEN = 1;
1782 }
1783 
1784 
1785 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1786 {
1787  uint8 status;
1788  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1789  return status;
1790 }
1791 
1792 
1793 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1794 {
1795  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1796 }
1797 
1798 
1799 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1800 {
1801  Ifx_VADC_G_CHASS assignChannels;
1802  assignChannels.U = vadcG->CHASS.U;
1803  return assignChannels;
1804 }
1805 
1806 
1807 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1808 {
1809  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1810 }
1811 
1812 
1813 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1814 {
1815  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1816 }
1817 
1818 
1819 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1820 {
1821  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1822 }
1823 
1824 
1825 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1826 {
1827  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1828 }
1829 
1830 
1831 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1832 {
1833  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1834 }
1835 
1836 
1837 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1838 {
1839  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1840 }
1841 
1842 
1843 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1844 {
1845  Ifx_VADC_CHCTR tempChctr;
1846  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1847  return tempChctr;
1848 }
1849 
1850 
1851 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1852 {
1853  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1854 }
1855 
1856 
1857 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1858 {
1859  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1860  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1861  return resultServiceRequestNodePtr0;
1862 }
1863 
1864 
1865 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1866 {
1867  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1868  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1869  return resultServiceRequestNodePtr1;
1870 }
1871 
1872 
1873 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1874 {
1875  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1876  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1877  return serviceRequestNodePtr;
1878 }
1879 
1880 
1881 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1882 {
1883  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1884 }
1885 
1886 
1887 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1888 {
1889  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1890 }
1891 
1892 
1893 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1894 {
1895  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1896 }
1897 
1898 
1899 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1900 {
1901  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1902 }
1903 
1904 
1905 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1906 {
1907  Ifx_VADC_GLOBCFG globCfg;
1908  globCfg.U = vadc->GLOBCFG.U;
1909  return globCfg;
1910 }
1911 
1912 
1913 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1914 {
1915  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1916 }
1917 
1918 
1919 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1920 {
1921  Ifx_VADC_GLOBRES tmpGlobalResult;
1922 
1923  tmpGlobalResult.U = vadc->GLOBRES.U;
1924 
1925  return tmpGlobalResult;
1926 }
1927 
1928 
1929 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1930 {
1931  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1932 
1933  if (sampleTime > 16)
1934  {
1935  sampleTime = (sampleTime - 15) * 16;
1936  }
1937 
1938  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1939 }
1940 
1941 
1942 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1943 {
1944  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1945 }
1946 
1947 
1948 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1949 {
1950  uint32 idx;
1951 
1952  for (idx = 0; idx < numResults; idx++)
1953  {
1954  results[idx].U = group->RES[resultOffset + idx].U;
1955  }
1956 }
1957 
1958 
1959 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1960 {
1961  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
1962 
1963  if (sampleTime > 16)
1964  {
1965  sampleTime = (sampleTime - 15) * 16;
1966  }
1967 
1968  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1969 }
1970 
1971 
1972 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
1973 {
1974  uint8 masterIndex = 0;
1975  masterIndex = vadcG->SYNCTR.B.STSEL;
1976  return masterIndex;
1977 }
1978 
1979 
1980 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
1981 {
1982  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
1983 }
1984 
1985 
1986 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
1987 {
1988  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
1989 }
1990 
1991 
1992 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
1993 {
1994  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
1995 }
1996 
1997 
1998 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
1999 {
2000  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2001 }
2002 
2003 
2004 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2005 {
2006  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2007 }
2008 
2009 
2010 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2011 {
2012  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2013 }
2014 
2015 
2016 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2017 {
2018  Ifx_VADC_RES tmpResult;
2019 
2020  tmpResult.U = group->RES[resultIdx].U;
2021 
2022  return tmpResult;
2023 }
2024 
2025 
2026 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2027 {
2028  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2029 }
2030 
2031 
2032 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2033 {
2034  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2035 }
2036 
2037 
2038 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2039 {
2040  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2041 }
2042 
2043 
2044 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2045 {
2046  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2047 }
2048 
2049 
2050 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2051 {
2052  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2053 }
2054 
2055 
2056 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2057 {
2058  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2059 }
2060 
2061 
2062 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2063 {
2064  return (boolean)vadc->GLOBCFG.B.SUCAL;
2065 }
2066 
2067 
2068 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2069 {
2070  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2071  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2072 }
2073 
2074 
2075 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2076 {
2077  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2078  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2079 }
2080 
2081 
2082 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2083 {
2084  vadc->GLOBCFG.B.SUCAL = 1;
2085 }
2086 
2087 
2088 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2089 {
2090  return (boolean)vadc->BRSMR.B.SCAN;
2091 }
2092 
2093 
2094 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2095 {
2096  return (boolean)vadcG->ASMR.B.SCAN;
2097 }
2098 
2099 
2100 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2101 {
2102  return (boolean)vadcG->ARBPR.B.ASEN2;
2103 }
2104 
2105 
2106 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2107 {
2108  return (boolean)vadcG->ARBPR.B.ASEN0;
2109 }
2110 
2111 
2112 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2113 {
2114  return (boolean)vadcG->ARBPR.B.ASEN1;
2115 }
2116 
2117 
2118 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2119 {
2120  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2121 }
2122 
2123 
2124 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2125 {
2126  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2127 }
2128 
2129 
2130 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2131 {
2132  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2133 }
2134 
2135 
2136 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2137 {
2138  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2139 }
2140 
2141 
2142 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2143 {
2144  vadcG->ASMR.B.SCAN = autoscanEnable;
2145 }
2146 
2147 
2148 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2149 {
2150  vadcG->CHASS.U &= ~(1 << channelIndex);
2151 }
2152 
2153 
2154 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2155 {
2156  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2157 }
2158 
2159 
2160 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2161 {
2162  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2163  vadc->BRSSEL[groupId].U = channels;
2164 }
2165 
2166 
2167 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2168 {
2169  Ifx_VADC_BRSCTRL brsctrl;
2170  brsctrl.U = vadc->BRSCTRL.U;
2171  brsctrl.B.GTWC = 1;
2172  brsctrl.B.GTSEL = gatingSource;
2173  vadc->BRSCTRL.U = brsctrl.U;
2174  vadc->BRSMR.B.ENGT = gatingMode;
2175 }
2176 
2177 
2178 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2179 {
2180  Ifx_VADC_BRSCTRL brsctrl;
2181  brsctrl.U = vadc->BRSCTRL.U;
2182  brsctrl.B.XTWC = 1;
2183  brsctrl.B.XTMODE = triggerMode;
2184  brsctrl.B.XTSEL = triggerSource;
2185  vadc->BRSCTRL.U = brsctrl.U;
2186 }
2187 
2188 
2189 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2190 {
2191  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2192 }
2193 
2194 
2195 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2196 {
2197  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2198  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2199 }
2200 
2201 
2202 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2203 {
2204  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2205 }
2206 
2207 
2208 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2209 {
2210  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2211 }
2212 
2213 
2214 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2215 {
2216  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2217 }
2218 
2219 
2220 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2221 {
2222  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2223 }
2224 
2225 
2226 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2227 {
2228  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2229 }
2230 
2231 
2232 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2233 {
2234  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2235 }
2236 
2237 
2238 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2239 {
2240  if (emuxInterface == IfxVadc_EmuxInterface_0)
2241  {
2242  vadc->EMUXSEL.B.EMUXGRP0 = group;
2243  }
2244  else
2245  {
2246  vadc->EMUXSEL.B.EMUXGRP1 = group;
2247  }
2248 }
2249 
2250 
2251 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2252 {
2253  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2254 }
2255 
2256 
2257 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2258 {
2259  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2260 }
2261 
2262 
2263 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2264 {
2265  vadcG->CHASS.U |= (1 << channelIndex);
2266 }
2267 
2268 
2269 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2270 {
2271  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2272 }
2273 
2274 
2275 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2276 {
2277  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2278 }
2279 
2280 
2281 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2282 {
2283  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2284 }
2285 
2286 
2287 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2288 {
2289  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2290  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2291 }
2292 
2293 
2294 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2295 {
2296  Ifx_VADC_G_QCTRL0 qctrl0;
2297  qctrl0.U = vadcG->QCTRL0.U;
2298  qctrl0.B.GTWC = 1;
2299  qctrl0.B.GTSEL = gatingSource;
2300  vadcG->QCTRL0.U = qctrl0.U;
2301  vadcG->QMR0.B.ENGT = gatingMode;
2302 }
2303 
2304 
2305 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2306 {
2307  Ifx_VADC_G_QCTRL0 qctrl0;
2308  qctrl0.U = vadcG->QCTRL0.U;
2309  qctrl0.B.XTWC = 1;
2310  qctrl0.B.XTMODE = triggerMode;
2311  qctrl0.B.XTSEL = triggerSource;
2312  vadcG->QCTRL0.U = qctrl0.U;
2313 }
2314 
2315 
2316 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2317 {
2318  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2319 }
2320 
2321 
2322 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2323 {
2324  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2325  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2326 }
2327 
2328 
2329 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2330 {
2331  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2332  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2333 }
2334 
2335 
2336 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2337 {
2338  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2339 }
2340 
2341 
2342 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2343 {
2344  Ifx_VADC_G_ASCTRL asctrl;
2345  asctrl.U = vadcG->ASCTRL.U;
2346  asctrl.B.GTWC = 1;
2347  asctrl.B.GTSEL = gatingSource;
2348  vadcG->ASCTRL.U = asctrl.U;
2349  vadcG->ASMR.B.ENGT = gatingMode;
2350 }
2351 
2352 
2353 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2354 {
2355  Ifx_VADC_G_ASCTRL asctrl;
2356  asctrl.U = vadcG->ASCTRL.U;
2357  asctrl.B.XTWC = 1;
2358  asctrl.B.XTMODE = triggerMode;
2359  asctrl.B.XTSEL = triggerSource;
2360  vadcG->ASCTRL.U = asctrl.U;
2361 }
2362 
2363 
2364 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2365 {
2366  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2367  IfxScuWdt_clearCpuEndinit(passwd);
2368  vadc->CLC.B.EDIS = mode;
2369  IfxScuWdt_setCpuEndinit(passwd);
2370 }
2371 
2372 
2373 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2374 {
2375  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2376 }
2377 
2378 
2379 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2380 {
2381  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2382 }
2383 
2384 
2385 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2386 {
2387  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2388 }
2389 
2390 
2391 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2392 {
2393  group->QMR0.B.TREV = 1;
2394 }
2395 
2396 
2397 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2398 {
2399  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2400 }
2401 
2402 
2403 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2404 {
2405  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2406 }
2407 
2408 
2409 #endif /* IFXVADC_H */