39         stm->ISCR.B.CMP0IRR = 1U;
 
   43         stm->ISCR.B.CMP1IRR = 1U;
 
   50     Ifx_STM_OCS ocs = stm->OCS;
 
   83     Ifx_STM_CMCON comcon = stm->CMCON;
 
   84     Ifx_STM_ICR   icr    = stm->ICR;
 
  107     stm->CMCON.U = comcon.U;
 
  114         volatile Ifx_SRC_SRCR *srcr;
 
  118             srcr = &(MODULE_SRC.STM.STM[index].SR0);
 
  122             srcr = &(MODULE_SRC.STM.STM[index].SR1);
 
  151     config->
ticks               = 0xFFFFFFFF;
 
  162     stm->KRST0.B.RST = 1;           
 
  163     stm->KRST1.B.RST = 1;
 
  166     while (0 == stm->KRST0.B.RSTSTAT)   
 
  171     stm->KRSTCLR.B.CLR = 1;         
 
  181         stm->ICR.B.CMP0EN = 1U;
 
  185         stm->ICR.B.CMP1EN = 1U;