1254     Ifx_CCU6_TCTR4 tctr4;
 
 1256     tctr4.B.T12RES = t12;
 
 1257     tctr4.B.T13RES = t13;
 
 1258     ccu6->TCTR4.U  = tctr4.U;
 
 1264     ccu6->TCTR4.B.DTRES = 
TRUE;
 
 1270     uint32 mask = (1U << source);
 
 1277     ccu6->ISR.B.RT12OM = 1;
 
 1283     ccu6->ISR.B.RT12PM = 1;
 
 1289     ccu6->ISR.B.RT13CM = 1;
 
 1295     uint32 shift = ((timer * 8) + 3);
 
 1296     uint32 mask  = (1U << shift);
 
 1297     ccu6->TCTR0.U = ccu6->TCTR0.U & ~(mask);
 
 1303     uint32 shift = (8 + channel);
 
 1304     uint32 mask  = (1 << shift);
 
 1305     ccu6->T12DTC.U = ccu6->T12DTC.U & ~(mask);
 
 1311     ccu6->T12MSEL.B.DBYP = 
FALSE;
 
 1317     uint32 mask = (1U << source);
 
 1318     ccu6->IEN.U = ccu6->IEN.U & ~(mask);
 
 1324     ccu6->MODCTR.B.MCMEN = 
FALSE;
 
 1330     Ifx_CCU6_TCTR4 tctr4;
 
 1332     tctr4.B.T12STD = t12;
 
 1333     tctr4.B.T13STD = t13;
 
 1334     ccu6->TCTR4.U  = tctr4.U;
 
 1340     uint32 mask = (1U << timer);
 
 1341     ccu6->TCTR2.U = ccu6->TCTR2.U & ~(mask);
 
 1347     ccu6->CMPSTAT.B.T13IM = 
FALSE;
 
 1353     uint32 mask = (1U << timer);
 
 1354     ccu6->MCFG.U = ccu6->MCFG.U & ~(mask);
 
 1360     uint32 shift = (8 + channelOut);    
 
 1361     uint32 mask  = (1U << shift);
 
 1362     ccu6->TRPCTR.U = ccu6->TRPCTR.U & ~(mask);
 
 1368     ccu6->TRPCTR.B.TRPPEN = 
FALSE;
 
 1374     uint32 shift = ((timer * 8) + 2);
 
 1375     uint32 mask  = (1U << shift);
 
 1376     ccu6->TCTR0.U = ccu6->TCTR0.U | (mask);
 
 1382     Ifx_CCU6_TCTR4 tctr4;
 
 1384     tctr4.B.T12CNT = t12;
 
 1385     tctr4.B.T13CNT = t13;
 
 1386     ccu6->TCTR4.U  = tctr4.U;
 
 1392     uint32 shift = (8 + channel);
 
 1393     uint32 mask  = (1 << shift);
 
 1394     ccu6->T12DTC.U = ccu6->T12DTC.U | (mask);
 
 1400     ccu6->T12MSEL.B.DBYP = 
TRUE;
 
 1406     ccu6->MCMOUTS.B.STRHP = 
TRUE;
 
 1412     uint32 mask = (1U << source);
 
 1413     ccu6->IEN.U = ccu6->IEN.U | (mask);
 
 1419     ccu6->MODCTR.B.MCMEN = 
TRUE;
 
 1425     ccu6->MCMOUTS.B.STRMCM = 
TRUE;
 
 1431     ccu6->MCMCTR.B.STE12D = 
TRUE;
 
 1437     ccu6->MCMCTR.B.STE12U = 
TRUE;
 
 1443     ccu6->MCMCTR.B.STE13U = 
TRUE;
 
 1449     Ifx_CCU6_TCTR4 tctr4;
 
 1451     tctr4.B.T12STR = t12;
 
 1452     tctr4.B.T13STR = t13;
 
 1453     ccu6->TCTR4.U  = tctr4.U;
 
 1459     uint32 mask = (1U << timer);
 
 1460     ccu6->TCTR2.U = ccu6->TCTR2.U | (mask);
 
 1466     ccu6->CMPSTAT.B.T13IM = 
TRUE;
 
 1472     uint32 mask = (1U << timer);
 
 1473     ccu6->MCFG.U = ccu6->MCFG.U | (mask);
 
 1479     uint32 shift = (8 + channelOut);    
 
 1480     uint32 mask  = (1U << shift);
 
 1481     ccu6->TRPCTR.U = ccu6->TRPCTR.U | (mask);
 
 1487     ccu6->TRPCTR.B.TRPPEN = 
TRUE;
 
 1493     uint32 shift = (12 + channel);
 
 1494     uint32 mask  = 1 << shift;
 
 1495     return (ccu6->T12DTC.U & mask) ? 
TRUE : 
FALSE;
 
 1501     uint32 shift = (channel + 3);
 
 1502     uint32 mask  = (1U << shift);
 
 1503     return (ccu6->CMPSTAT.U & mask) ? 
TRUE : 
FALSE;
 
 1509     uint32 shift = (1U << source);
 
 1510     return (ccu6->IS.U & shift) ? 
TRUE : 
FALSE;
 
 1516     return ccu6->MCFG.B.MCM != 0;
 
 1522     return ccu6->MCMOUT.B.R != 0;
 
 1528     uint32 shift = ((timer * 8) + 5);
 
 1529     uint32 mask  = (1U << shift);
 
 1530     return (ccu6->TCTR0.U & mask) ? 
TRUE : 
FALSE;
 
 1536     uint32 mask = (1U << channel);
 
 1537     return (ccu6->CMPSTAT.U & mask) ? 
TRUE : 
FALSE;
 
 1549     return (
volatile uint32 *)&ccu6->T12PR;
 
 1555     return ccu6->CMPSTAT.B.CC63ST != 0;
 
 1561     uint32 mask = (1U << timer);
 
 1562     return (ccu6->MCFG.U & mask) ? 
TRUE : 
FALSE;
 
 1568     uint32 shift = ((timer * 8) + 4);
 
 1569     uint32 mask  = (1U << shift);
 
 1688     return ccu6->CLC.B.DISS == 0;
 
 1694     return ccu6->IS.B.T12OM != 0;
 
 1700     return ccu6->IS.B.T12PM != 0;
 
 1706     return ccu6->IS.B.T13CM != 0;
 
 1713     uint32 mask  = (0x3U << shift);
 
 1714     ccu6->PISEL0.U = (ccu6->PISEL0.U & ~mask) | ((
uint32)signal << shift);
 
 1720     uint32 shift = ((timer * 2) + 2);
 
 1721     uint32 mask  = (0x3U << shift);
 
 1722     ccu6->PISEL2.U = (ccu6->PISEL2.U & ~mask) | ((
uint32)mode << shift);
 
 1728     ccu6->MCMOUTS.B.CURHS = pattern;
 
 1734     ccu6->T12DTC.B.DTM = value;
 
 1740     ccu6->MCMOUTS.B.EXPHS = pattern;
 
 1746     uint32 shift = ((timer * 2) + 8);
 
 1747     uint32 mask  = (0x3U << shift);
 
 1748     ccu6->TCTR2.U = (ccu6->TCTR2.U & ~mask) | ((
uint32)mode << shift);
 
 1755     uint32 mask  = (0x7U << shift);
 
 1756     ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((
uint32)mode << shift);
 
 1762     uint32 shift = (timer * 8);
 
 1763     uint32 mask  = (0x7U << shift);
 
 1764     ccu6->TCTR0.U = (ccu6->TCTR0.U & ~mask) | ((
uint32)frequency << shift);
 
 1770     uint32 mask = (1U << source);
 
 1771     ccu6->ISS.U = ccu6->ISS.U | (mask);
 
 1777     ccu6->MCMOUTS.B.MCMPS = pattern;
 
 1783     ccu6->MCMCTR.B.SWSEL = mode;
 
 1789     ccu6->MCMCTR.B.SWSYN = sync;
 
 1795     uint32 shift = (channelOut + 8); 
 
 1796     uint32 mask  = (1U << shift);
 
 1797     ccu6->CMPSTAT.U = (ccu6->CMPSTAT.U & ~mask) | ((
uint32)state << shift);
 
 1803     Ifx_CCU6_TCTR2 tctr2;
 
 1804     tctr2.U        = ccu6->TCTR2.U;
 
 1805     tctr2.B.T12SSC = t12;
 
 1806     tctr2.B.T13SSC = t13;
 
 1807     ccu6->TCTR2.U  = tctr2.U;
 
 1815     ccu6->CLC.B.EDIS = mode;
 
 1822     uint32 shift = (4 * channel);
 
 1823     uint32 mask  = (0xFU << shift);
 
 1824     ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((
uint32)mode << shift);
 
 1830     ccu6->TCTR0.B.CTM = mode;
 
 1836     ccu6->T12.B.T12CV = value;
 
 1842     ccu6->T12PR.B.T12PV = value;
 
 1848     ccu6->CC63SR.B.CCS = value;
 
 1854     ccu6->T13.B.T13CV = value;
 
 1860     ccu6->T13PR.B.T13PV = value;
 
 1866     ccu6->TCTR2.B.T13TED = direction;
 
 1872     ccu6->TCTR2.B.T13TEC = mode;
 
 1878     ccu6->TRPCTR.B.TRPM2 = mode;
 
 1885     ccu6->TRPCTR.U = (ccu6->TRPCTR.U & ~mask) | ((
uint32)state);
 
 1891     Ifx_CCU6_TCTR4 tctr4;
 
 1893     tctr4.B.T12RS = t12;
 
 1894     tctr4.B.T13RS = t13;
 
 1895     ccu6->TCTR4.U = tctr4.U;
 
 1901     Ifx_CCU6_TCTR4 tctr4;
 
 1903     tctr4.B.T12RR = t12;
 
 1904     tctr4.B.T13RR = t13;
 
 1905     ccu6->TCTR4.U = tctr4.U;
 
 1911     Ifx_CCU6_MCMOUTS mcmouts;
 
 1912     mcmouts.U       = ccu6->MCMOUTS.U;
 
 1914     mcmouts.B.CURHS = currentHall;
 
 1915     mcmouts.B.EXPHS = expectedHall;
 
 1916     mcmouts.B.MCMPS = output;
 
 1918     ccu6->MCMOUTS.U = mcmouts.U;