iLLD_TC26xB  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61 
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65 
66 /** \addtogroup IfxLld_Vadc_Std_Enum
67  * \{ */
68 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
69  */
70 typedef enum
71 {
72  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
73  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
74  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
75  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
76 } IfxVadc_AnalogConverterMode;
77 
78 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
79  */
80 typedef enum
81 {
82  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
83  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
84  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
85  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
86 } IfxVadc_ArbitrationRounds;
87 
88 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
89  */
90 typedef enum
91 {
92  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
93  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
94  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
95  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
96  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
97  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
98  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
99  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
100  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
101  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
102  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
103  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
104  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
105  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
106  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
107  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
108 } IfxVadc_BoundaryExtension;
109 
110 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
111  */
112 typedef enum
113 {
114  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
115  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
116  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
117  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
118 } IfxVadc_BoundarySelection;
119 
120 /** \brief VADC Channels
121  */
122 typedef enum
123 {
124  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
125  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
126  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
127  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
128  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
129  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
130  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
131  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
132  IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
133  IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
134  IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
135  IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
136  IfxVadc_ChannelId_11 = 11, /**< \brief Channel 11 */
137  IfxVadc_ChannelId_12 = 12, /**< \brief Channel 12 */
138  IfxVadc_ChannelId_13 = 13, /**< \brief Channel 13 */
139  IfxVadc_ChannelId_14 = 14, /**< \brief Channel 14 */
140  IfxVadc_ChannelId_15 = 15 /**< \brief Channel 15 */
141 } IfxVadc_ChannelId;
142 
143 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
144  */
145 typedef enum
146 {
147  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
148  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
149 } IfxVadc_ChannelReference;
150 
151 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
152  */
153 typedef enum
154 {
155  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
156  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
157  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
158  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
159 } IfxVadc_ChannelResolution;
160 
161 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
162  */
163 typedef enum
164 {
165  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
166  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
167  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
168  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
169  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
170  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
171  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
172  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
173  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
174  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
175  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
176  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
177  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
178  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
179  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
180  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
181 } IfxVadc_ChannelResult;
182 
183 /** \brief External Multiplexer Channel Selection Style as defined in
184  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
185  */
186 typedef enum
187 {
188  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
189  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
190  * associated channel for EMUX control */
191 } IfxVadc_ChannelSelectionStyle;
192 
193 /** \brief type of conversion
194  */
195 typedef enum
196 {
197  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
198 } IfxVadc_ConversionType;
199 
200 /** \brief Specifies the External Coding scheme(binary/gray)
201  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
202  */
203 typedef enum
204 {
205  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
206  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
207 } IfxVadc_EmuxCodingScheme;
208 
209 /** \brief Specifies the Emux interface
210  */
211 typedef enum
212 {
213  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
214  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
215 } IfxVadc_EmuxInterface;
216 
217 /** \brief External Multiplexer sample time control
218  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
219  */
220 typedef enum
221 {
222  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
223  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
224 } IfxVadc_EmuxSampleTimeControl;
225 
226 /** \brief specifies the External Channel Start select value
227  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
228  */
229 typedef enum
230 {
231  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
232  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
233  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
234  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
235  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
236  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
237  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
238  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
239 } IfxVadc_EmuxSelectValue;
240 
241 /** \brief Specifies External Multiplexer Mode
242  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
243  */
244 typedef enum
245 {
246  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
247  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
248  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
249  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
250 } IfxVadc_ExternalMultiplexerMode;
251 
252 /** \brief FIFO mode enable
253  */
254 typedef enum
255 {
256  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
257  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
258  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
259  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
260 } IfxVadc_FifoMode;
261 
262 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
263  */
264 typedef enum
265 {
266  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
267  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
268  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
269  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
270 } IfxVadc_GatingMode;
271 
272 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
273  */
274 typedef enum
275 {
276  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
277  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
278  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
279  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
280  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
281  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
282  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
283  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
284  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
285  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
286  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
287  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
288  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
289  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
290  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
291  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
292 } IfxVadc_GatingSource;
293 
294 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
295  */
296 typedef enum
297 {
298  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
299  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
300  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
301  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
302 } IfxVadc_InputClasses;
303 
304 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
305  */
306 typedef enum
307 {
308  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
309  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
310  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
311  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
312 } IfxVadc_LimitCheck;
313 
314 /** \brief Low Power Supply Voltage Select
315  */
316 typedef enum
317 {
318  IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
319  IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
320 } IfxVadc_LowSupplyVoltageSelect;
321 
322 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
323  */
324 typedef enum
325 {
326  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
327  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
328  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
329  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
330  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
331  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
332  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
333  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
334  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
335  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
336  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
337  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
338  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
339  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
340  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
341  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
342  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
348  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
349  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
350  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
351  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
352  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
353  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
354  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
355  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
356  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
357  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
358  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
364  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
365  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
366  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
367  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
368  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
369  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
370  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
371  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
372  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
373  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
374  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
380  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
381  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
382  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
383  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
384  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
385  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
386  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
387  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
388  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
389 } IfxVadc_Protection;
390 
391 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
392  */
393 typedef enum
394 {
395  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
396  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
397  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
398  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
399 } IfxVadc_RequestSlotPriority;
400 
401 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
402  */
403 typedef enum
404 {
405  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
406  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
407 } IfxVadc_RequestSlotStartMode;
408 
409 /** \brief Request sources
410  */
411 typedef enum
412 {
413  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
414  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
415  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
416 } IfxVadc_RequestSource;
417 
418 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
419  * Definition in Ifx_VADC.CLC.B.EDIS
420  */
421 typedef enum
422 {
423  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
424  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
425 } IfxVadc_SleepMode;
426 
427 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
428  */
429 typedef enum
430 {
431  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
432  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
433  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
434  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
435  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
436  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
437  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
438  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
439 } IfxVadc_SrcNr;
440 
441 /** \brief API return values defined in
442  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
443  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
444  */
445 typedef enum
446 {
447  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
448  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
449  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
450  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
451  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
452  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
453  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
454 } IfxVadc_Status;
455 
456 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
457  */
458 typedef enum
459 {
460  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
461  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
462  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
463  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
464 } IfxVadc_TriggerMode;
465 
466 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
467  */
468 typedef enum
469 {
470  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
471  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
472  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
473  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
474  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
475  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
476  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
477  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
478  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
479  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
480  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
481  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
482  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
483  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
484  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
485  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
486 } IfxVadc_TriggerSource;
487 
488 /** \} */
489 
490 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
491  * \{ */
492 
493 /******************************************************************************/
494 /*-------------------------Inline Function Prototypes-------------------------*/
495 /******************************************************************************/
496 
497 /** \brief access function to enable/disable wait for read mode for result registers
498  * \param group pointer to the VADC group
499  * \param resultIdx result register index
500  * \param waitForRead wait for read mode enabled/disabled
501  * \return None
502  */
503 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
504 
505 /** \brief access function to enable/disable wait for read mode for global result register
506  * \param vadc pointer to the VADC
507  * \param waitForRead wait for read mode enabled/disabled
508  * \return None
509  */
510 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
511 
512 /** \brief Enables the background sacn external trigger.
513  * \param vadc pointer to the base of VADC registers.
514  * \return None
515  */
516 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
517 
518 /** \brief Gets the background scan gating mode.
519  * \param vadc pointer to the base of VADC registers.
520  * \return background scan gating mode.
521  */
522 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
523 
524 /** \brief Gets the gating input selection.
525  * \param vadc pointer to the base of VADC registers.
526  * \return background scan gating input selection.
527  */
528 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
529 
530 /** \brief Gets the requested background scan slot priority.
531  * \param vadcG pointer to VADC group registers.
532  * \return requested background scan slot priority.
533  */
534 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
535 
536 /** \brief Gets the requested background scan slot start mode.
537  * \param vadcG pointer to VADC group registers.
538  * \return requested background scan slot start mode.
539  */
540 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
541 
542 /** \brief Gets the background scan trigger input.
543  * \param vadc pointer to the base of VADC registers.
544  * \return Gets the background scan external trigger source.
545  */
546 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
547 
548 /** \brief Gets the background scan external trigger mode.
549  * \param vadc pointer to the base of VADC registers.
550  * \return background scan external trigger mode.
551  */
552 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
553 
554 /** \brief get global input class resolution
555  * \param vadc Pointer to the VADC Group
556  * \param inputClassNum global input class number
557  * \return ADC input class channel resolution.
558  */
559 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
560 
561 /** \brief return conversion result stored in the Global result Register
562  * \param vadc pointer to the VADC module
563  * \return global result register
564  *
565  * \code
566  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
567  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
568  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
569  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
570  *
571  * //confiure wait for read mode for global result register
572  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
573  *
574  * // configure background scan
575  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
576  *
577  * // enable auto scan
578  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
579  *
580  * // start the background scan
581  * IfxVadc_startBackgroundScan(vadc);
582  *
583  * Ifx_VADC_GLOBRES result;
584  * result = IfxVadc_getGlobalResult (vadc);
585  *
586  * \endcode
587  *
588  */
589 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
590 
591 /** \brief get global input class sample time in sec
592  * \param vadc Pointer to the VADC Group Register space
593  * \param inputClassNum ADC input class number
594  * \param analogFrequency ADC module analog frequency in Hz.
595  * \return ADC input class channel sample time in sec.
596  */
597 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
598 
599 /** \brief Get conversion result for the group
600  * \param group pointer to the VADC group
601  * \param results pointer to scaled conversion results
602  * \param resultOffset offset for the first result
603  * \param numResults number of results
604  * \return None
605  *
606  * \code
607  * Ifx_VADC* vadc = &MODULE_VADC
608  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
609  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
610  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
611  *
612  * //confiure wait for read mode for global result register
613  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
614  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
615  *
616  * // configure scan
617  * IfxVadc_setScan(group, channels, mask);
618  *
619  * // enable auto scan
620  * IfxVadc_setAutoScan(group, TRUE);
621  *
622  * // start the scan
623  * IfxVadc_startScan(group);
624  *
625  * // wait for conversion to finish
626  *
627  * // fetch the 2 results of conversion for group 0
628  * Ifx_VADC_RES results[10];
629  * result = IfxVadc_getGroupResult(group, results, 0, 2);
630  * \endcode
631  *
632  */
633 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
634 
635 /** \brief Get conversion result (Function does not care about the alignment)
636  * value = raw * gain + offset.
637  * \param group pointer to the VADC group
638  * \param resultIdx result register index
639  * \return scaled Conversion result
640  *
641  * \code
642  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
643  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
644  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
645  *
646  * //confiure wait for read mode for global result register
647  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
648  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
649  *
650  * // configure scan
651  * IfxVadc_setScan(group, channels, mask);
652  *
653  * // enable auto scan
654  * IfxVadc_setAutoScan(group, TRUE);
655  *
656  * // start the scan
657  * IfxVadc_startScan(group);
658  *
659  * // wait for conversion to finish
660  *
661  * // fetch the result of conversion from result register 0 for group 0
662  * Ifx_VADC_RES result;
663  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
664  * \endcode
665  *
666  */
667 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
668 
669 /** \brief Returns the auto background scan status.
670  * \param vadc pointer to the base of VADC registers.
671  * \return TRUE if enabled otherwise FALSE.
672  */
673 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
674 
675 /** \brief Returns the background scan slot requested status.
676  * \param vadcG pointer to VADC group registers.
677  * \return background scan slot requested status.
678  */
679 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
680 
681 /** \brief Enables/Disables continuous background auto scan
682  * \param vadc pointer to the base of VADC registers.
683  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
684  * \return None
685  */
686 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
687 
688 /** \brief configures a background scan; can also stop autoscan if all channels are 0
689  * \param vadc pointer to the VADC module registers
690  * \param groupId group index
691  * \param channels specifies the channels which should be enabled/disabled
692  * \param mask specifies the channels which should be modified
693  * \return None
694  *
695  * Background scan can be enabled/disabled for the given channels which are selected with the mask
696  *
697  * \code
698  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
699  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
700  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
701  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
702  *
703  * //confiure wait for read mode for global result register
704  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
705  *
706  * // configure background scan
707  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
708  *
709  * // enable auto scan
710  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
711  *
712  * // start the background scan
713  * IfxVadc_startBackgroundScan(vadc);
714  * \endcode
715  *
716  */
717 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
718 
719 /** \brief Sets the background scan slot gating configurations.
720  * \param vadc pointer to the base of VADC registers.
721  * \param gatingSource gate input for group.
722  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
723  * \return None
724  */
725 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
726 
727 /** \brief Sets the background scan exteranal trigger operating configurations.
728  * \param vadc pointer to the base of VADC registers.
729  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
730  * \param triggerSource trigger input for group.
731  * \return None
732  */
733 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
734 
735 /** \brief Starts a background scan
736  * \param vadc pointer to the VADC module
737  * \return None
738  *
739  * \see IfxVadc_setBackgroundScan
740  *
741  */
742 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
743 
744 /******************************************************************************/
745 /*-------------------------Global Function Prototypes-------------------------*/
746 /******************************************************************************/
747 
748 /** \brief Gives the background scan status for a group
749  * \param vadc pointer to the VADC module
750  * \return IfxVadc_Status
751  */
752 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
753 
754 /** \brief Get conversion result (Function does not care about the alignment)
755  * value = raw * gain + offset.
756  * \param vadc VADC module pointer
757  * \param group pointer to the VADC group
758  * \param channel channel Id
759  * \param sourceType type of request source
760  * \return scaled Conversion result
761  *
762  * \code
763  * Ifx_VADC vadc;
764  * vadc.vadc = &MODULE_VADC;
765  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
766  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
767  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
768  *
769  * //confiure wait for read mode for global result register
770  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
771  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
772  *
773  * // configure scan
774  * IfxVadc_setScan(group, channels, mask);
775  *
776  * // start the scan
777  * IfxVadc_startScan(group);
778  *
779  * // wait for conversion to finish
780  *
781  * // fetch the result of conversion for channel 2 of group 0
782  * Ifx_VADC_RESresult2;
783  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
784  * Ifx_VADC_RESresult5;
785  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
786  * \endcode
787  *
788  */
789 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
790 
791 /** \} */
792 
793 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
794  * \{ */
795 
796 /******************************************************************************/
797 /*-------------------------Inline Function Prototypes-------------------------*/
798 /******************************************************************************/
799 
800 /** \brief Disables the scan slot external trigger.
801  * \param vadcG pointer to VADC group registers.
802  * \return None
803  */
804 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
805 
806 /** \brief Enables the scan slot external trigger.
807  * \param vadcG pointer to VADC group registers.
808  * \return None
809  */
810 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
811 
812 /** \brief Gets the request scan slot gating mode.
813  * \param vadcG pointer to VADC group registers.
814  * \return requested scan slot gating mode.
815  */
816 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
817 
818 /** \brief Gets the request scan slot gating input.
819  * \param vadcG pointer to VADC group registers.
820  * \return request scan slot gating input.
821  */
822 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
823 
824 /** \brief Gets the request scan slot priority.
825  * \param vadcG pointer to VADC group registers.
826  * \return request scan slot priority.
827  */
828 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
829 
830 /** \brief Gets the request scan slot start mode.
831  * \param vadcG pointer to VADC group registers.
832  * \return request scan slot start mode.
833  */
834 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
835 
836 /** \brief Gets the requested scan slot trigger input.
837  * \param vadcG pointer to VADC group registers.
838  * \return requested scan slot trigger input.
839  */
840 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
841 
842 /** \brief Gets the requested scan slot trigger mode.
843  * \param vadcG pointer to VADC group registers.
844  * \return requested scan slot trigger mode.
845  */
846 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
847 
848 /** \brief Gets the auto scan enable status.
849  * \param vadcG pointer to VADC group registers.
850  * \return TRUE if auto scan enabled otherwise FALSE.
851  */
852 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
853 
854 /** \brief Returns the scan slot requested status.
855  * \param vadcG pointer to VADC group registers.
856  * \return TRUE if scan slot request enabled otherwise FALSE.
857  */
858 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
859 
860 /** \brief Enables/Disables continuous auto scan
861  * \param vadcG pointer to VADC group registers.
862  * \param autoscanEnable whether autoscan is enabled or not.
863  * \return None
864  */
865 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
866 
867 /** \brief Sets the scan slot gating configuration.
868  * \param vadcG pointer to VADC group registers.
869  * \param gatingSource gate input for group.
870  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
871  * \return None
872  */
873 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
874 
875 /** \brief Sets the scan slot trigger operating configurations.
876  * \param vadcG pointer to VADC group registers.
877  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
878  * \param triggerSource trigger input for group.
879  * \return None
880  */
881 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
882 
883 /** \brief Starts an autoscan on the specified group
884  * \param group pointer to the VADC group
885  * \return None
886  *
887  * See \ref IfxVadc_setScan
888  *
889  */
890 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
891 
892 /******************************************************************************/
893 /*-------------------------Global Function Prototypes-------------------------*/
894 /******************************************************************************/
895 
896 /** \brief Gives the scan status for a group
897  * \param group pointer to the VADC group
898  * \return IfxVadc_Status
899  */
900 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
901 
902 /** \brief Configures an (auto-)scan
903  * \param group pointer to the VADC group
904  * \param channels specifies the channels which should be enabled/disabled
905  * \param mask specifies the channels which should be modified
906  * \return None
907  *
908  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
909  *
910  * \code
911  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
912  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
913  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
914  *
915  * // configure scan
916  * IfxVadc_setScan(group, channels, mask);
917  *
918  * // enable Auto-Scan
919  * IfxVadc_setAutoScan(group, TRUE);
920  *
921  * // start the scan
922  * IfxVadc_startScan(group);
923  * \endcode
924  *
925  */
926 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
927 
928 /** \} */
929 
930 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
931  * \{ */
932 
933 /******************************************************************************/
934 /*-------------------------Inline Function Prototypes-------------------------*/
935 /******************************************************************************/
936 
937 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
938  * refill incase of aborted conversion
939  * source interrupt enable/disable
940  * external trigger control of the aborted conversion
941  * \param group pointer to the VADC group
942  * \param channel specifies channel Id
943  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
944  * \return None
945  *
946  * \code
947  *
948  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
949  * IfxVadc_ChannelId channel = 1; // for channel 1
950  * // Add channel 1 to queue of group 0 with the refill turned on
951  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
952  * \endcode
953  *
954  */
955 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
956 
957 /** \brief Clears all the queue entries including backup stage.
958  * \param vadcG pointer to VADC group registers.
959  * \param flushQueue Whether queue is cleared or not.
960  * \return None
961  */
962 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
963 
964 /** \brief Disables the external trigger.
965  * \param vadcG pointer to VADC group registers.
966  * \return None
967  */
968 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
969 
970 /** \brief Enables the external trigger.
971  * \param vadcG pointer to VADC group registers.
972  * \return None
973  */
974 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
975 
976 /** \brief Gets the requested queue slot gating mode.
977  * \param vadcG pointer to VADC group registers.
978  * \return requested queue slot gating mode.
979  */
980 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
981 
982 /** \brief Gets the requested queue slot gating input.
983  * \param vadcG pointer to VADC group registers.
984  * \return requested queue slot gating input.
985  */
986 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
987 
988 /** \brief Gets the request queue slot priority.
989  * \param vadcG pointer to VADC group registers.
990  * \return requested queue slot priority.
991  */
992 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
993 
994 /** \brief Gets the requested queue slot start mode.
995  * \param vadcG pointer to VADC group registers.
996  * \return requested queue slot start mode.
997  */
998 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
999 
1000 /** \brief Gets the requested queue slot trigger input.
1001  * \param vadcG pointer to VADC group registers.
1002  * \return requested queue slot trigger input.
1003  */
1004 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
1005 
1006 /** \brief Gets the requested queue slot trigger mode.
1007  * \param vadcG pointer to VADC group registers.
1008  * \return requested queue slot trigger mode.
1009  */
1010 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1011 
1012 /** \brief Returns the queue slot requested status.
1013  * \param vadcG pointer to VADC group registers.
1014  * \return TRUE if queue slot request enabled otherwise FALSE.
1015  */
1016 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1017 
1018 /** \brief Sets the gating configurations.
1019  * \param vadcG pointer to VADC group registers.
1020  * \param gatingSource gate input for group.
1021  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1022  * \return None
1023  */
1024 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1025 
1026 /** \brief Sets the trigger operating configurations.
1027  * \param vadcG pointer to VADC group registers.
1028  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1029  * \param triggerSource trigger input for group.
1030  * \return None
1031  */
1032 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1033 
1034 /** \brief Starts a queue of a group by generating a trigger event through software
1035  * \param group pointer to the VADC group
1036  * \return None
1037  */
1038 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1039 
1040 /******************************************************************************/
1041 /*-------------------------Global Function Prototypes-------------------------*/
1042 /******************************************************************************/
1043 
1044 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1045  * \param group pointer to the VADC group
1046  * \return status of the Queue
1047  *
1048  * \code
1049  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1050  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1051  * \endcode
1052  *
1053  */
1054 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1055 
1056 /** \} */
1057 
1058 /** \addtogroup IfxLld_Vadc_Std_IO
1059  * \{ */
1060 
1061 /******************************************************************************/
1062 /*-------------------------Inline Function Prototypes-------------------------*/
1063 /******************************************************************************/
1064 
1065 /** \brief Initializes a EMUX output
1066  * \param emux the Emux Pin which should be configured
1067  * \param outputMode the pin output mode which should be configured
1068  * \param padDriver the pad driver mode which should be configured
1069  * \return None
1070  */
1071 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1072 
1073 /** \brief Initializes a GxBFL output
1074  * \param gxBfl the GxBFL Pin which should be configured
1075  * \param outputMode the pin output mode which should be configured
1076  * \param padDriver the pad driver mode which should be configured
1077  * \return None
1078  */
1079 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1080 
1081 /** \} */
1082 
1083 /** \addtogroup IfxLld_Vadc_Std_Frequency
1084  * \{ */
1085 
1086 /******************************************************************************/
1087 /*-------------------------Inline Function Prototypes-------------------------*/
1088 /******************************************************************************/
1089 
1090 /** \brief Calculate the time using analog frequency.
1091  * \param analogFrequency analog frequency in Hz.
1092  * \param sampleTime sample time in sec.
1093  * \return sample time in sec.
1094  */
1095 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1096 
1097 /******************************************************************************/
1098 /*-------------------------Global Function Prototypes-------------------------*/
1099 /******************************************************************************/
1100 
1101 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1102  * \param vadc pointer to the base of VADC registers
1103  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1104  */
1105 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1106 
1107 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1108  * \param vadc pointer to the base of VADC registers
1109  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1110  */
1111 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1112 
1113 /** \} */
1114 
1115 /** \addtogroup IfxLld_Vadc_Std_Group
1116  * \{ */
1117 
1118 /******************************************************************************/
1119 /*-------------------------Inline Function Prototypes-------------------------*/
1120 /******************************************************************************/
1121 
1122 /** \brief Clears the all group requests.
1123  * \param vadcG pointer to VADC group registers.
1124  * \return None
1125  */
1126 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1127 
1128 /** \brief Gets the ADC group arbitration round length.
1129  * \param vadcG pointer to VADC group registers.
1130  * \return ADC group arbitration round length.
1131  */
1132 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1133 
1134 /** \brief Gets the channel esult service request node pointer 0.
1135  * \param vadcG pointer to VADC group registers.
1136  * \return channel result service request node pointer 0.
1137  */
1138 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1139 
1140 /** \brief Gets the channel esult service request node pointer 1.
1141  * \param vadcG pointer to VADC group registers.
1142  * \return channel result service request node pointer 1.
1143  */
1144 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1145 
1146 /** \brief Gets the channel service request node pointer.
1147  * \param vadcG pointer to VADC group registers.
1148  * \return channel service request node pointer.
1149  */
1150 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1151 
1152 /** \brief Gets the configured master index.
1153  * \param vadcG pointer to VADC group registers.
1154  * \return configured master kernel index.
1155  */
1156 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1157 
1158 /** \brief Resets the ADC group.
1159  * \param vadcG pointer to VADC group registers.
1160  * \return None
1161  */
1162 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1163 
1164 /** \brief Sets analog converter group number.
1165  * \param vadcG pointer to VADC group registers.
1166  * \param analogConverterMode group analog converter mode.
1167  * \return None
1168  */
1169 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1170 
1171 /** \brief Sets the arbiter round length.
1172  * \param vadcG pointer to VADC group registers.
1173  * \param arbiterRoundLength arbiter round length.
1174  * \return None
1175  */
1176 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1177 
1178 /** \brief Sets the ADC input class channel resolution.
1179  * \param vadcG pointer to VADC group registers.
1180  * \param inputClassNum input class number.
1181  * \param resolution ADC input class channel resolution.
1182  * \return None
1183  */
1184 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1185 
1186 /** \brief Sets the ADC input class sample time.
1187  * \param vadcG pointer to VADC group registers.
1188  * \param inputClassNum input class number.
1189  * \param analogFrequency ADC analog frequency in Hz.
1190  * \param sampleTime request sample time in sec for input class.
1191  * \return None
1192  */
1193 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1194 
1195 /** \brief Sets the master index.
1196  * \param vadcG pointer to VADC group registers.
1197  * \param masterIndex master index.
1198  * \return None
1199  */
1200 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1201 
1202 /******************************************************************************/
1203 /*-------------------------Global Function Prototypes-------------------------*/
1204 /******************************************************************************/
1205 
1206 /** \brief Sets the Arbiter slot configurations.
1207  * \param vadcG pointer to VADC group registers.
1208  * \param slotEnable enable/disable of slot.
1209  * \param prio channel request priority.
1210  * \param mode Channel Slot start mode.
1211  * \param slot channel slot Request source.
1212  * \return None
1213  */
1214 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1215 
1216 /** \} */
1217 
1218 /** \addtogroup IfxLld_Vadc_Std_Module
1219  * \{ */
1220 
1221 /******************************************************************************/
1222 /*-------------------------Inline Function Prototypes-------------------------*/
1223 /******************************************************************************/
1224 
1225 /** \brief Disable VADC Module
1226  * \param vadc Pointer to VADC Module
1227  * \return None
1228  */
1229 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1230 
1231 /** \brief Enable VADC kernel.
1232  * \param vadc pointer to the base of VADC registers.
1233  * \return None
1234  */
1235 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1236 
1237 /** \brief gets ADC Calibration Flag CAL status.
1238  * \param vadc pointer to VADC group registers.
1239  * \param adcCalGroupNum ADC CAL group number.
1240  * \return CAL group status.
1241  */
1242 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1243 
1244 /** \brief Gets the global control configuration value.
1245  * \param vadc pointer to the base of VADC registers.
1246  * \return global control configuration value.
1247  */
1248 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1249 
1250 /** \brief get SUCAL bit field status
1251  * \param vadc Pointer to VADC Module
1252  * \return Indicate the start-up calibration phase
1253  */
1254 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1255 
1256 /** \brief initiates the calibration pulse phase.
1257  * \param vadc pointer to the base of VADC registers
1258  * \return None
1259  */
1260 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1261 
1262 /** \brief Sets the channel conversion mode.
1263  * \param vadc pointer to VADC module registers.
1264  * \param inputClassNum global input class number.
1265  * \param resolution ADC channel resolution.
1266  * \return None
1267  */
1268 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1269 
1270 /** \brief Sets the sample time of ADC global class.
1271  * \param vadc pointer to VADC module registers.
1272  * \param inputClassNum global input class number.
1273  * \param analogFrequency ADC analog frequency in Hz.
1274  * \param sampleTime the requested sample time for input class in sec.
1275  * \return None
1276  */
1277 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1278 
1279 /** \brief Sets the sensitivity of the module to sleep signal
1280  * \param vadc pointer to VADC registers
1281  * \param mode mode selection (enable/disable)
1282  * \return None
1283  */
1284 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1285 
1286 /******************************************************************************/
1287 /*-------------------------Global Function Prototypes-------------------------*/
1288 /******************************************************************************/
1289 
1290 /** \brief Disable write access to the VADC config/control registers.
1291  * \param vadc pointer to the base of VADC registers.
1292  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1293  * \return None
1294  */
1295 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1296 
1297 /** \brief Disables the post calibration.
1298  * \param vadc pointer to the base of VADC registers.
1299  * \param group Index of the group.
1300  * \param disable disable or not.
1301  * \return None
1302  */
1303 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1304 
1305 /** \brief Enable write access to the VADC config/control registers.
1306  * \param vadc pointer to the base of VADC registers.
1307  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1308  * \return None
1309  */
1310 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1311 
1312 /** \brief Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068
1313  * \param vadc pointer to the base of VADC registers.
1314  * \param ccu6Num selects CCU60 or CCU61
1315  * \return None
1316  */
1317 IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num);
1318 
1319 /** \brief Module Frequency in Hz
1320  * \return Module Frequency in Hz.
1321  */
1322 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1323 
1324 /** \brief Gives the SRC source address.
1325  * \param group Index of the group
1326  * \param index SRC number
1327  * \return SRC source address
1328  */
1329 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1330 
1331 /** \brief Initialises ADC arbiter clock.
1332  * \param vadc pointer to the base of VADC registers
1333  * \param arbiterClockDivider ADC arbiter clock divider.
1334  * \return None
1335  */
1336 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1337 
1338 /** \brief Initialises the ADC Converter clock.
1339  * \param vadc pointer to the base of VADC registers
1340  * \param converterClockDivider ADC converter clock divider.
1341  * \return None
1342  */
1343 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1344 
1345 /** \brief Configure the FadcD vadc digital clock.
1346  * \param vadc pointer to the base of VADC registers.
1347  * \param fAdcD ADC digital clock frequency in Hz.
1348  * \return calculated ADC digital clock frequency in Hz.
1349  */
1350 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1351 
1352 /** \brief Configure the ADC analog clock.
1353  * \param vadc pointer to the base of VADC registers.
1354  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1355  * \return ADC analog clock frequency in Hz.
1356  */
1357 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1358 
1359 /** \brief Return the post calibration status
1360  * \param vadc Pointer to VADC module
1361  * \param group specifies Group ID
1362  * \return TRUE if the post calibration is enabled for the group else false
1363  */
1364 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1365 
1366 /** \brief Resets the kernel.
1367  * \param vadc pointer to the base of VADC registers.
1368  * \return None
1369  */
1370 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1371 
1372 /** \brief Select Low Power Supply Voltage
1373  * \param vadc Pointer to Module space
1374  * \param supplyVoltage Select Supply Voltage
1375  * \return None
1376  */
1377 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1378 
1379 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1380  * \param vadc pointer to the base of VADC registers.
1381  * \return None
1382  */
1383 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1384 
1385 /** \} */
1386 
1387 /** \addtogroup IfxLld_Vadc_Std_Channel
1388  * \{ */
1389 
1390 /******************************************************************************/
1391 /*-------------------------Inline Function Prototypes-------------------------*/
1392 /******************************************************************************/
1393 
1394 /** \brief Clears the channel request.
1395  * \param vadcG pointer to VADC group registers.
1396  * \param channelId channel id whose request to be cleared.
1397  * \return None
1398  */
1399 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1400 
1401 /** \brief Enables the FIFO mode.
1402  * \param vadcG pointer to VADC group registers.
1403  * \param resultRegister channel result register.
1404  * \param fifoMode FIFO mode .
1405  * \return None
1406  */
1407 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1408 
1409 /**
1410  * \param vadcG pointer to VADC group registers.
1411  * \param resultRegister channel result register.
1412  * \return None
1413  */
1414 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1415 
1416 /** \brief Gets the group's assigned channels.
1417  * \param vadcG pointer to VADC group registers.
1418  * \return group's assigned channels.
1419  */
1420 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1421 
1422 /** \brief Gets the current ADC channel control configurations.
1423  * \param vadcG pointer to VADC group registers.
1424  * \param channelIndex ADC channel number.
1425  * \return current ADC channel control configuration.
1426  */
1427 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1428 
1429 /** \brief Gets the channel input class
1430  * \param vadcG pointer to VADC Group register space
1431  * \param channelIndex specifies channel ID
1432  * \return Input class
1433  */
1434 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1435 
1436 /** \brief Gets the ADC input class channel resolution.
1437  * \param vadcG pointer to VADC group registers.
1438  * \param inputClassNum ADC input class number.
1439  * \return ADC input class channel resolution.
1440  */
1441 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1442 
1443 /** \brief Gets the ADC input class channel sample time.
1444  * \param vadcG pointer to VADC group registers.
1445  * \param inputClassNum ADC input class number.
1446  * \param analogFrequency ADC module analog frequency in Hz.
1447  * \return ADC input class channel sample time in sec.
1448  */
1449 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1450 
1451 /** \brief Sets the channels with low priority as background channel.
1452  * \param vadcG pointer to VADC group registers.
1453  * \param channelIndex group channel id.
1454  * \return None
1455  */
1456 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1457 
1458 /** \brief Sets the target for result background source.
1459  * \param vadcG pointer to VADC group registers.
1460  * \param channelIndex group channel id.
1461  * \param globalResultUsage whether storage in global result register.
1462  * \return None
1463  */
1464 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1465 
1466 /** \brief Selects boundary extension.
1467  * \param vadcG pointer to VADC group registers.
1468  * \param channelIndex group channel id.
1469  * \param boundaryMode boundary extension mode.
1470  * \return None
1471  */
1472 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1473 
1474 /** \brief Sets the channel event service request line.
1475  * \param vadcG pointer to VADC group registers.
1476  * \param channelSrcNr channel event Service Node.
1477  * \param channel channel number.
1478  * \return None
1479  */
1480 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1481 
1482 /** \brief Sets the channel input class.
1483  * \param vadcG pointer to VADC group registers.
1484  * \param channelIndex group channel id.
1485  * \param inputClass group input class.
1486  * \return None
1487  */
1488 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1489 
1490 /** \brief Sets the channel event mode.
1491  * \param vadcG pointer to VADC group registers.
1492  * \param channelIndex group channel id.
1493  * \param limitCheck channel event mode.
1494  * \return None
1495  */
1496 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1497 
1498 /** \brief Sets channel as priority channel with in the group.
1499  * \param vadcG pointer to VADC group registers.
1500  * \param channelIndex group channel id.
1501  * \return None
1502  */
1503 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1504 
1505 /** \brief Sets group's lower boundary.
1506  * \param vadcG pointer to VADC group registers.
1507  * \param channelIndex group channel id.
1508  * \param lowerBoundary group lower boundary.
1509  * \return None
1510  */
1511 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1512 
1513 /** \brief Selects the refernce input.
1514  * \param vadcG pointer to VADC group registers.
1515  * \param channelIndex group channel id.
1516  * \param reference reference input.
1517  * \return None
1518  */
1519 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1520 
1521 /** \brief Sets result event node pointer 0.
1522  * \param vadcG pointer to VADC group registers.
1523  * \param resultSrcNr channel result event service node.
1524  * \param resultRegister channel result register.
1525  * \return None
1526  */
1527 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1528 
1529 /** \brief Sets result event node pointer 1.
1530  * \param vadcG pointer to VADC group registers.
1531  * \param resultSrcNr channel result event service node.
1532  * \param resultRegister channel result register.
1533  * \return None
1534  */
1535 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1536 
1537 /** \brief Sets result store position.
1538  * \param vadcG pointer to VADC group registers.
1539  * \param channelIndex group channel id.
1540  * \param rightAlignedStorage result store position.
1541  * \return None
1542  */
1543 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1544 
1545 /** \brief Sets channel synchronization request.
1546  * \param vadcG pointer to VADC group registers.
1547  * \param channelIndex group channel id.
1548  * \param synchonize whether channel synchronize or stand alone operation.
1549  * \return None
1550  */
1551 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1552 
1553 /** \brief Sets group's upper boundary.
1554  * \param vadcG pointer to VADC group registers.
1555  * \param channelIndex group channel id.
1556  * \param upperBoundary group upper boundary.
1557  * \return None
1558  */
1559 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1560 
1561 /** \brief Sets the group result register.
1562  * \param vadcG pointer to VADC group registers.
1563  * \param channelIndex group channel id.
1564  * \param resultRegister result register for group result storage.
1565  * \return None
1566  */
1567 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1568 
1569 /******************************************************************************/
1570 /*-------------------------Global Function Prototypes-------------------------*/
1571 /******************************************************************************/
1572 
1573 /** \brief get channel conversion timing
1574  * \param vadc Pointer to VADC module
1575  * \param group specifies the Group
1576  * \param inputClass Input class used
1577  * \param analogFrequency ADC module analog frequency fadci in Hz.
1578  * \param moduleFrequency ADC module frequency fvadc in Hz.
1579  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1580  * \return Channel conversion Time in sec
1581  */
1582 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1583 
1584 /** \} */
1585 
1586 /** \addtogroup IfxLld_Vadc_Std_Emux
1587  * \{ */
1588 
1589 /******************************************************************************/
1590 /*-------------------------Inline Function Prototypes-------------------------*/
1591 /******************************************************************************/
1592 
1593 /** \brief get global input class resolution
1594  * \param vadc Pointer to VADC Module space
1595  * \param inputClassNum global input class number
1596  * \return External channel resolution for global input class
1597  */
1598 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1599 
1600 /** \brief Get the sample time of ADC global class for external channel.
1601  * \param vadc pointer to VADC Module space
1602  * \param inputClassNum Adc input class number
1603  * \param analogFrequency ADC module analog frequency in Hz.
1604  * \return ADC input class external channel sample time in sec.
1605  */
1606 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1607 
1608 /** \brief get the external channel resolution
1609  * \param vadcG Pointer to VADC group register space
1610  * \param inputClassNum Adc input class number
1611  * \return Adc input class External channel resolution
1612  */
1613 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1614 
1615 /** \brief Gets the ADC input class sample time of external channel.
1616  * \param vadcG Pointer to Register Group space
1617  * \param inputClassNum ADC input class number
1618  * \param analogFrequency ADC module analog frequency in Hz.
1619  * \return ADC input class external channel sample time in sec.
1620  */
1621 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1622 
1623 /** \brief set the external channel resolution of Global class
1624  * \param vadc pointer to VADC Module space
1625  * \param inputClassNum Global Input Class Number
1626  * \param resolution External Channel resolution
1627  * \return None
1628  */
1629 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1630 
1631 /** \brief Sets the sample time of ADC global class for external channel.
1632  * \param vadc Pointer to VADC Module space
1633  * \param inputClassNum Adc input class number
1634  * \param analogFrequency ADC analog Frequency in HZ
1635  * \param sampleTime the requested sample time for input class in sec
1636  * \return None
1637  */
1638 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1639 
1640 /** \brief set the external channel resolution of ADC input class
1641  * \param vadcG pointer to VADC Group Register space
1642  * \param inputClassNum input class number
1643  * \param resolution input class external channel resolution
1644  * \return None
1645  */
1646 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1647 
1648 /** \brief Sets the ADC input class sample time for external channel.
1649  * \param vadcG Pointer to VADC Group Register Space
1650  * \param inputClassNum input class number
1651  * \param analogFrequency ADC analog frequency in Hz.
1652  * \param sampleTime request sample time in sec for input class.
1653  * \return None
1654  */
1655 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1656 
1657 /** \brief Sets the Emux Interface for a particular group
1658  * \param vadc Pointer to VADC Module Space
1659  * \param emuxInterface specifies the EmuxInterface
1660  * \param group specifies the group ID
1661  * \return None
1662  */
1663 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1664 
1665 /******************************************************************************/
1666 /*-------------------------Global Function Prototypes-------------------------*/
1667 /******************************************************************************/
1668 
1669 /**
1670  * \param vadc pointer to Module space
1671  * \param vadcG Pointer to VADC group register space
1672  * \param mode External Multiplexer mode
1673  * \param channels Specifies channel Id
1674  * \param startChannel specifies the external channel value from which conversion to be carried out
1675  * \param code Output the channel number in binary code/gray code
1676  * \param sampleTimeControl specifies when to use a sample time for external channel
1677  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1678  * \return None
1679  */
1680 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1681 
1682 /** \} */
1683 
1684 /******************************************************************************/
1685 /*-------------------------Inline Function Prototypes-------------------------*/
1686 /******************************************************************************/
1687 
1688 /** \brief get channel service request node pointer
1689  * \param vadcG Pointer to VADC Group register space
1690  * \return channel service request node pointer
1691  */
1692 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1693 
1694 /** \brief set channel event node pointer
1695  * \param vadcG Pointer to the Vadc group register space
1696  * \param channelSrcNr Service request
1697  * \param channel specifies channel
1698  * \return None
1699  */
1700 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1701 
1702 /******************************************************************************/
1703 /*---------------------Inline Function Implementations------------------------*/
1704 /******************************************************************************/
1705 
1706 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1707 {
1708  group->QINR0.U = channel | options;
1709 }
1710 
1711 
1712 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1713 {
1714  uint32 ticks;
1715 
1716  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1717 
1718  if (ticks > 31)
1719  {
1720  ticks = (ticks / 16) + 15;
1721  }
1722 
1723  ticks = __minu(ticks, 0xFFu);
1724 
1725  return ticks;
1726 }
1727 
1728 
1729 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1730 {
1731  vadcG->REFCLR.U = 0x0000FFFFu;
1732 }
1733 
1734 
1735 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1736 {
1737  vadcG->CEFCLR.U = 1 << channelId;
1738 }
1739 
1740 
1741 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1742 {
1743  vadcG->QMR0.B.FLUSH = flushQueue;
1744 }
1745 
1746 
1747 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1748 {
1749  group->RCR[resultIdx].B.WFR = waitForRead;
1750 }
1751 
1752 
1753 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1754 {
1755  vadc->GLOBRCR.B.WFR = waitForRead;
1756 }
1757 
1758 
1759 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1760 {
1761  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1762  IfxScuWdt_clearCpuEndinit(passwd);
1763  vadc->CLC.B.DISR = 1;
1764  IfxScuWdt_setCpuEndinit(passwd);
1765 }
1766 
1767 
1768 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1769 {
1770  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1771 }
1772 
1773 
1774 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1775 {
1776  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1777 }
1778 
1779 
1780 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1781 {
1782  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1783 }
1784 
1785 
1786 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1787 {
1788  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1789 }
1790 
1791 
1792 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1793 {
1794  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1795 
1796  IfxScuWdt_clearCpuEndinit(passwd);
1797  vadc->CLC.U = 0x00000000;
1798  IfxScuWdt_setCpuEndinit(passwd);
1799 }
1800 
1801 
1802 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1803 {
1804  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1805 }
1806 
1807 
1808 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1809 {
1810  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1811 }
1812 
1813 
1814 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1815 {
1816  vadcG->RCR[resultRegister].B.SRGEN = 1;
1817 }
1818 
1819 
1820 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1821 {
1822  uint8 status;
1823  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1824  return status;
1825 }
1826 
1827 
1828 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1829 {
1830  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1831 }
1832 
1833 
1834 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1835 {
1836  Ifx_VADC_G_CHASS assignChannels;
1837  assignChannels.U = vadcG->CHASS.U;
1838  return assignChannels;
1839 }
1840 
1841 
1842 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1843 {
1844  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1845 }
1846 
1847 
1848 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1849 {
1850  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1851 }
1852 
1853 
1854 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1855 {
1856  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1857 }
1858 
1859 
1860 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1861 {
1862  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1863 }
1864 
1865 
1866 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1867 {
1868  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1869 }
1870 
1871 
1872 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1873 {
1874  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1875 }
1876 
1877 
1878 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1879 {
1880  Ifx_VADC_CHCTR tempChctr;
1881  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1882  return tempChctr;
1883 }
1884 
1885 
1886 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1887 {
1888  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1889 }
1890 
1891 
1892 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1893 {
1894  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1895  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1896  return resultServiceRequestNodePtr0;
1897 }
1898 
1899 
1900 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1901 {
1902  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1903  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1904  return resultServiceRequestNodePtr1;
1905 }
1906 
1907 
1908 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1909 {
1910  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1911  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1912  return serviceRequestNodePtr;
1913 }
1914 
1915 
1916 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1917 {
1918  Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
1919  serviceRequestNodePtr.U = vadcG->CEVNP1.U;
1920  return serviceRequestNodePtr;
1921 }
1922 
1923 
1924 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1925 {
1926  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1927 }
1928 
1929 
1930 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1931 {
1932  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1933 }
1934 
1935 
1936 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1937 {
1938  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1939 }
1940 
1941 
1942 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1943 {
1944  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1945 }
1946 
1947 
1948 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1949 {
1950  Ifx_VADC_GLOBCFG globCfg;
1951  globCfg.U = vadc->GLOBCFG.U;
1952  return globCfg;
1953 }
1954 
1955 
1956 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1957 {
1958  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1959 }
1960 
1961 
1962 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1963 {
1964  Ifx_VADC_GLOBRES tmpGlobalResult;
1965 
1966  tmpGlobalResult.U = vadc->GLOBRES.U;
1967 
1968  return tmpGlobalResult;
1969 }
1970 
1971 
1972 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1973 {
1974  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1975 
1976  if (sampleTime > 16)
1977  {
1978  sampleTime = (sampleTime - 15) * 16;
1979  }
1980 
1981  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1982 }
1983 
1984 
1985 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1986 {
1987  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1988 }
1989 
1990 
1991 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1992 {
1993  uint32 idx;
1994 
1995  for (idx = 0; idx < numResults; idx++)
1996  {
1997  results[idx].U = group->RES[resultOffset + idx].U;
1998  }
1999 }
2000 
2001 
2002 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
2003 {
2004  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
2005 
2006  if (sampleTime > 16)
2007  {
2008  sampleTime = (sampleTime - 15) * 16;
2009  }
2010 
2011  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2012 }
2013 
2014 
2015 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
2016 {
2017  uint8 masterIndex = 0;
2018  masterIndex = vadcG->SYNCTR.B.STSEL;
2019  return masterIndex;
2020 }
2021 
2022 
2023 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
2024 {
2025  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
2026 }
2027 
2028 
2029 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
2030 {
2031  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
2032 }
2033 
2034 
2035 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2036 {
2037  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2038 }
2039 
2040 
2041 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2042 {
2043  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2044 }
2045 
2046 
2047 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2048 {
2049  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2050 }
2051 
2052 
2053 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2054 {
2055  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2056 }
2057 
2058 
2059 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2060 {
2061  Ifx_VADC_RES tmpResult;
2062 
2063  tmpResult.U = group->RES[resultIdx].U;
2064 
2065  return tmpResult;
2066 }
2067 
2068 
2069 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2070 {
2071  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2072 }
2073 
2074 
2075 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2076 {
2077  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2078 }
2079 
2080 
2081 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2082 {
2083  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2084 }
2085 
2086 
2087 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2088 {
2089  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2090 }
2091 
2092 
2093 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2094 {
2095  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2096 }
2097 
2098 
2099 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2100 {
2101  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2102 }
2103 
2104 
2105 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2106 {
2107  return (boolean)vadc->GLOBCFG.B.SUCAL;
2108 }
2109 
2110 
2111 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2112 {
2113  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2114  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2115 }
2116 
2117 
2118 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2119 {
2120  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2121  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2122 }
2123 
2124 
2125 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2126 {
2127  vadc->GLOBCFG.B.SUCAL = 1;
2128 }
2129 
2130 
2131 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2132 {
2133  return (boolean)vadc->BRSMR.B.SCAN;
2134 }
2135 
2136 
2137 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2138 {
2139  return (boolean)vadcG->ASMR.B.SCAN;
2140 }
2141 
2142 
2143 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2144 {
2145  return (boolean)vadcG->ARBPR.B.ASEN2;
2146 }
2147 
2148 
2149 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2150 {
2151  return (boolean)vadcG->ARBPR.B.ASEN0;
2152 }
2153 
2154 
2155 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2156 {
2157  return (boolean)vadcG->ARBPR.B.ASEN1;
2158 }
2159 
2160 
2161 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2162 {
2163  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2164 }
2165 
2166 
2167 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2168 {
2169  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2170 }
2171 
2172 
2173 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2174 {
2175  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2176 }
2177 
2178 
2179 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2180 {
2181  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2182 }
2183 
2184 
2185 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2186 {
2187  vadcG->ASMR.B.SCAN = autoscanEnable;
2188 }
2189 
2190 
2191 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2192 {
2193  vadcG->CHASS.U &= ~(1 << channelIndex);
2194 }
2195 
2196 
2197 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2198 {
2199  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2200 }
2201 
2202 
2203 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2204 {
2205  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2206  vadc->BRSSEL[groupId].U = channels;
2207 }
2208 
2209 
2210 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2211 {
2212  Ifx_VADC_BRSCTRL brsctrl;
2213  brsctrl.U = vadc->BRSCTRL.U;
2214  brsctrl.B.GTWC = 1;
2215  brsctrl.B.GTSEL = gatingSource;
2216  vadc->BRSCTRL.U = brsctrl.U;
2217  vadc->BRSMR.B.ENGT = gatingMode;
2218 }
2219 
2220 
2221 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2222 {
2223  Ifx_VADC_BRSCTRL brsctrl;
2224  brsctrl.U = vadc->BRSCTRL.U;
2225  brsctrl.B.XTWC = 1;
2226  brsctrl.B.XTMODE = triggerMode;
2227  brsctrl.B.XTSEL = triggerSource;
2228  vadc->BRSCTRL.U = brsctrl.U;
2229 }
2230 
2231 
2232 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2233 {
2234  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2235 }
2236 
2237 
2238 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2239 {
2240  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2241  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2242 }
2243 
2244 
2245 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2246 {
2247  vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
2248  vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2249 }
2250 
2251 
2252 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2253 {
2254  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2255 }
2256 
2257 
2258 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2259 {
2260  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2261 }
2262 
2263 
2264 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2265 {
2266  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2267 }
2268 
2269 
2270 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2271 {
2272  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2273 }
2274 
2275 
2276 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2277 {
2278  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2279 }
2280 
2281 
2282 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2283 {
2284  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2285 }
2286 
2287 
2288 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2289 {
2290  if (emuxInterface == IfxVadc_EmuxInterface_0)
2291  {
2292  vadc->EMUXSEL.B.EMUXGRP0 = group;
2293  }
2294  else
2295  {
2296  vadc->EMUXSEL.B.EMUXGRP1 = group;
2297  }
2298 }
2299 
2300 
2301 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2302 {
2303  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2304 }
2305 
2306 
2307 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2308 {
2309  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2310 }
2311 
2312 
2313 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2314 {
2315  vadcG->CHASS.U |= (1 << channelIndex);
2316 }
2317 
2318 
2319 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2320 {
2321  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2322 }
2323 
2324 
2325 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2326 {
2327  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2328 }
2329 
2330 
2331 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2332 {
2333  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2334 }
2335 
2336 
2337 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2338 {
2339  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2340  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2341 }
2342 
2343 
2344 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2345 {
2346  Ifx_VADC_G_QCTRL0 qctrl0;
2347  qctrl0.U = vadcG->QCTRL0.U;
2348  qctrl0.B.GTWC = 1;
2349  qctrl0.B.GTSEL = gatingSource;
2350  vadcG->QCTRL0.U = qctrl0.U;
2351  vadcG->QMR0.B.ENGT = gatingMode;
2352 }
2353 
2354 
2355 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2356 {
2357  Ifx_VADC_G_QCTRL0 qctrl0;
2358  qctrl0.U = vadcG->QCTRL0.U;
2359  qctrl0.B.XTWC = 1;
2360  qctrl0.B.XTMODE = triggerMode;
2361  qctrl0.B.XTSEL = triggerSource;
2362  vadcG->QCTRL0.U = qctrl0.U;
2363 }
2364 
2365 
2366 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2367 {
2368  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2369 }
2370 
2371 
2372 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2373 {
2374  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2375  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2376 }
2377 
2378 
2379 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2380 {
2381  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2382  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2383 }
2384 
2385 
2386 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2387 {
2388  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2389 }
2390 
2391 
2392 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2393 {
2394  Ifx_VADC_G_ASCTRL asctrl;
2395  asctrl.U = vadcG->ASCTRL.U;
2396  asctrl.B.GTWC = 1;
2397  asctrl.B.GTSEL = gatingSource;
2398  vadcG->ASCTRL.U = asctrl.U;
2399  vadcG->ASMR.B.ENGT = gatingMode;
2400 }
2401 
2402 
2403 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2404 {
2405  Ifx_VADC_G_ASCTRL asctrl;
2406  asctrl.U = vadcG->ASCTRL.U;
2407  asctrl.B.XTWC = 1;
2408  asctrl.B.XTMODE = triggerMode;
2409  asctrl.B.XTSEL = triggerSource;
2410  vadcG->ASCTRL.U = asctrl.U;
2411 }
2412 
2413 
2414 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2415 {
2416  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2417  IfxScuWdt_clearCpuEndinit(passwd);
2418  vadc->CLC.B.EDIS = mode;
2419  IfxScuWdt_setCpuEndinit(passwd);
2420 }
2421 
2422 
2423 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2424 {
2425  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2426 }
2427 
2428 
2429 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2430 {
2431  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2432 }
2433 
2434 
2435 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2436 {
2437  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2438 }
2439 
2440 
2441 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2442 {
2443  group->QMR0.B.TREV = 1;
2444 }
2445 
2446 
2447 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2448 {
2449  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2450 }
2451 
2452 
2453 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2454 {
2455  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2456 }
2457 
2458 
2459 #endif /* IFXVADC_H */