iLLD_TC23x  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61 
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65 
66 /** \addtogroup IfxLld_Vadc_Std_Enum
67  * \{ */
68 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
69  */
70 typedef enum
71 {
72  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
73  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
74  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
75  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
76 } IfxVadc_AnalogConverterMode;
77 
78 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
79  */
80 typedef enum
81 {
82  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
83  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
84  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
85  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
86 } IfxVadc_ArbitrationRounds;
87 
88 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
89  */
90 typedef enum
91 {
92  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
93  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
94  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
95  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
96  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
97  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
98  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
99  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
100  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
101  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
102  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
103  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
104  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
105  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
106  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
107  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
108 } IfxVadc_BoundaryExtension;
109 
110 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
111  */
112 typedef enum
113 {
114  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
115  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
116  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
117  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
118 } IfxVadc_BoundarySelection;
119 
120 /** \brief VADC Channels
121  */
122 typedef enum
123 {
124  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
125  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
126  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
127  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
128  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
129  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
130  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
131  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
132  IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
133  IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
134  IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
135  IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
136  IfxVadc_ChannelId_11 = 11 /**< \brief Channel 11 */
137 } IfxVadc_ChannelId;
138 
139 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
140  */
141 typedef enum
142 {
143  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
144  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
145 } IfxVadc_ChannelReference;
146 
147 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
148  */
149 typedef enum
150 {
151  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
152  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
153  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
154  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
155 } IfxVadc_ChannelResolution;
156 
157 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
158  */
159 typedef enum
160 {
161  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
162  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
163  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
164  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
165  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
166  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
167  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
168  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
169  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
170  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
171  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
172  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
173  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
174  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
175  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
176  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
177 } IfxVadc_ChannelResult;
178 
179 /** \brief External Multiplexer Channel Selection Style as defined in
180  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
181  */
182 typedef enum
183 {
184  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
185  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
186  * associated channel for EMUX control */
187 } IfxVadc_ChannelSelectionStyle;
188 
189 /** \brief type of conversion
190  */
191 typedef enum
192 {
193  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
194 } IfxVadc_ConversionType;
195 
196 /** \brief Specifies the External Coding scheme(binary/gray)
197  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
198  */
199 typedef enum
200 {
201  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
202  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
203 } IfxVadc_EmuxCodingScheme;
204 
205 /** \brief Specifies the Emux interface
206  */
207 typedef enum
208 {
209  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
210  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
211 } IfxVadc_EmuxInterface;
212 
213 /** \brief External Multiplexer sample time control
214  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
215  */
216 typedef enum
217 {
218  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
219  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
220 } IfxVadc_EmuxSampleTimeControl;
221 
222 /** \brief specifies the External Channel Start select value
223  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
224  */
225 typedef enum
226 {
227  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
228  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
229  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
230  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
231  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
232  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
233  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
234  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
235 } IfxVadc_EmuxSelectValue;
236 
237 /** \brief Specifies External Multiplexer Mode
238  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
239  */
240 typedef enum
241 {
242  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
243  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
244  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
245  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
246 } IfxVadc_ExternalMultiplexerMode;
247 
248 /** \brief FIFO mode enable
249  */
250 typedef enum
251 {
252  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
253  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
254  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
255  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
256 } IfxVadc_FifoMode;
257 
258 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
259  */
260 typedef enum
261 {
262  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
263  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
264  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
265  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
266 } IfxVadc_GatingMode;
267 
268 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
269  */
270 typedef enum
271 {
272  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
273  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
274  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
275  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
276  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
277  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
278  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
279  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
280  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
281  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
282  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
283  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
284  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
285  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
286  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
287  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
288 } IfxVadc_GatingSource;
289 
290 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
291  */
292 typedef enum
293 {
294  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
295  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
296  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
297  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
298 } IfxVadc_InputClasses;
299 
300 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
301  */
302 typedef enum
303 {
304  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
305  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
306  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
307  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
308 } IfxVadc_LimitCheck;
309 
310 /** \brief Low Power Supply Voltage Select
311  */
312 typedef enum
313 {
314  IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
315  IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
316 } IfxVadc_LowSupplyVoltageSelect;
317 
318 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
319  */
320 typedef enum
321 {
322  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
323  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
324  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
325  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
326  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
327  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
328  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
329  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
330  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
331  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
332  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
333  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
334  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
335  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
336  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
337  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
338  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
340  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
341  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
342  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
348  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
349  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
350  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
351  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
352  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
353  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
354  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
356  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
357  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
358  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
364  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
365  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
366  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
367  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
368  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
369  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
370  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
372  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
373  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
374  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
380  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
381  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
382  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
383  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
384  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
385 } IfxVadc_Protection;
386 
387 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
388  */
389 typedef enum
390 {
391  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
392  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
393  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
394  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
395 } IfxVadc_RequestSlotPriority;
396 
397 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
398  */
399 typedef enum
400 {
401  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
402  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
403 } IfxVadc_RequestSlotStartMode;
404 
405 /** \brief Request sources
406  */
407 typedef enum
408 {
409  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
410  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
411  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
412 } IfxVadc_RequestSource;
413 
414 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
415  * Definition in Ifx_VADC.CLC.B.EDIS
416  */
417 typedef enum
418 {
419  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
420  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
421 } IfxVadc_SleepMode;
422 
423 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
424  */
425 typedef enum
426 {
427  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
428  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
429  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
430  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
431  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
432  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
433  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
434  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
435 } IfxVadc_SrcNr;
436 
437 /** \brief API return values defined in
438  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
439  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
440  */
441 typedef enum
442 {
443  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
444  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
445  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
446  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
447  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
448  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
449  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
450 } IfxVadc_Status;
451 
452 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
453  */
454 typedef enum
455 {
456  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
457  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
458  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
459  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
460 } IfxVadc_TriggerMode;
461 
462 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
463  */
464 typedef enum
465 {
466  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
467  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
468  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
469  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
470  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
471  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
472  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
473  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
474  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
475  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
476  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
477  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
478  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
479  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
480  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
481  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
482 } IfxVadc_TriggerSource;
483 
484 /** \} */
485 
486 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
487  * \{ */
488 
489 /******************************************************************************/
490 /*-------------------------Inline Function Prototypes-------------------------*/
491 /******************************************************************************/
492 
493 /** \brief access function to enable/disable wait for read mode for result registers
494  * \param group pointer to the VADC group
495  * \param resultIdx result register index
496  * \param waitForRead wait for read mode enabled/disabled
497  * \return None
498  */
499 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
500 
501 /** \brief access function to enable/disable wait for read mode for global result register
502  * \param vadc pointer to the VADC
503  * \param waitForRead wait for read mode enabled/disabled
504  * \return None
505  */
506 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
507 
508 /** \brief Enables the background sacn external trigger.
509  * \param vadc pointer to the base of VADC registers.
510  * \return None
511  */
512 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
513 
514 /** \brief Gets the background scan gating mode.
515  * \param vadc pointer to the base of VADC registers.
516  * \return background scan gating mode.
517  */
518 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
519 
520 /** \brief Gets the gating input selection.
521  * \param vadc pointer to the base of VADC registers.
522  * \return background scan gating input selection.
523  */
524 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
525 
526 /** \brief Gets the requested background scan slot priority.
527  * \param vadcG pointer to VADC group registers.
528  * \return requested background scan slot priority.
529  */
530 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
531 
532 /** \brief Gets the requested background scan slot start mode.
533  * \param vadcG pointer to VADC group registers.
534  * \return requested background scan slot start mode.
535  */
536 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
537 
538 /** \brief Gets the background scan trigger input.
539  * \param vadc pointer to the base of VADC registers.
540  * \return Gets the background scan external trigger source.
541  */
542 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
543 
544 /** \brief Gets the background scan external trigger mode.
545  * \param vadc pointer to the base of VADC registers.
546  * \return background scan external trigger mode.
547  */
548 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
549 
550 /** \brief get global input class resolution
551  * \param vadc Pointer to the VADC Group
552  * \param inputClassNum global input class number
553  * \return ADC input class channel resolution.
554  */
555 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
556 
557 /** \brief return conversion result stored in the Global result Register
558  * \param vadc pointer to the VADC module
559  * \return global result register
560  *
561  * \code
562  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
563  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
564  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
565  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
566  *
567  * //confiure wait for read mode for global result register
568  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
569  *
570  * // configure background scan
571  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
572  *
573  * // enable auto scan
574  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
575  *
576  * // start the background scan
577  * IfxVadc_startBackgroundScan(vadc);
578  *
579  * Ifx_VADC_GLOBRES result;
580  * result = IfxVadc_getGlobalResult (vadc);
581  *
582  * \endcode
583  *
584  */
585 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
586 
587 /** \brief get global input class sample time in sec
588  * \param vadc Pointer to the VADC Group Register space
589  * \param inputClassNum ADC input class number
590  * \param analogFrequency ADC module analog frequency in Hz.
591  * \return ADC input class channel sample time in sec.
592  */
593 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
594 
595 /** \brief Get conversion result for the group
596  * \param group pointer to the VADC group
597  * \param results pointer to scaled conversion results
598  * \param resultOffset offset for the first result
599  * \param numResults number of results
600  * \return None
601  *
602  * \code
603  * Ifx_VADC* vadc = &MODULE_VADC
604  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
605  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
606  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
607  *
608  * //confiure wait for read mode for global result register
609  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
610  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
611  *
612  * // configure scan
613  * IfxVadc_setScan(group, channels, mask);
614  *
615  * // enable auto scan
616  * IfxVadc_setAutoScan(group, TRUE);
617  *
618  * // start the scan
619  * IfxVadc_startScan(group);
620  *
621  * // wait for conversion to finish
622  *
623  * // fetch the 2 results of conversion for group 0
624  * Ifx_VADC_RES results[10];
625  * result = IfxVadc_getGroupResult(group, results, 0, 2);
626  * \endcode
627  *
628  */
629 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
630 
631 /** \brief Get conversion result (Function does not care about the alignment)
632  * value = raw * gain + offset.
633  * \param group pointer to the VADC group
634  * \param resultIdx result register index
635  * \return scaled Conversion result
636  *
637  * \code
638  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
639  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
640  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
641  *
642  * //confiure wait for read mode for global result register
643  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
644  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
645  *
646  * // configure scan
647  * IfxVadc_setScan(group, channels, mask);
648  *
649  * // enable auto scan
650  * IfxVadc_setAutoScan(group, TRUE);
651  *
652  * // start the scan
653  * IfxVadc_startScan(group);
654  *
655  * // wait for conversion to finish
656  *
657  * // fetch the result of conversion from result register 0 for group 0
658  * Ifx_VADC_RES result;
659  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
660  * \endcode
661  *
662  */
663 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
664 
665 /** \brief Returns the auto background scan status.
666  * \param vadc pointer to the base of VADC registers.
667  * \return TRUE if enabled otherwise FALSE.
668  */
669 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
670 
671 /** \brief Returns the background scan slot requested status.
672  * \param vadcG pointer to VADC group registers.
673  * \return background scan slot requested status.
674  */
675 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
676 
677 /** \brief Enables/Disables continuous background auto scan
678  * \param vadc pointer to the base of VADC registers.
679  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
680  * \return None
681  */
682 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
683 
684 /** \brief configures a background scan; can also stop autoscan if all channels are 0
685  * \param vadc pointer to the VADC module registers
686  * \param groupId group index
687  * \param channels specifies the channels which should be enabled/disabled
688  * \param mask specifies the channels which should be modified
689  * \return None
690  *
691  * Background scan can be enabled/disabled for the given channels which are selected with the mask
692  *
693  * \code
694  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
695  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
696  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
697  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
698  *
699  * //confiure wait for read mode for global result register
700  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
701  *
702  * // configure background scan
703  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
704  *
705  * // enable auto scan
706  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
707  *
708  * // start the background scan
709  * IfxVadc_startBackgroundScan(vadc);
710  * \endcode
711  *
712  */
713 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
714 
715 /** \brief Sets the background scan slot gating configurations.
716  * \param vadc pointer to the base of VADC registers.
717  * \param gatingSource gate input for group.
718  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
719  * \return None
720  */
721 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
722 
723 /** \brief Sets the background scan exteranal trigger operating configurations.
724  * \param vadc pointer to the base of VADC registers.
725  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
726  * \param triggerSource trigger input for group.
727  * \return None
728  */
729 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
730 
731 /** \brief Starts a background scan
732  * \param vadc pointer to the VADC module
733  * \return None
734  *
735  * \see IfxVadc_setBackgroundScan
736  *
737  */
738 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
739 
740 /******************************************************************************/
741 /*-------------------------Global Function Prototypes-------------------------*/
742 /******************************************************************************/
743 
744 /** \brief Gives the background scan status for a group
745  * \param vadc pointer to the VADC module
746  * \return IfxVadc_Status
747  */
748 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
749 
750 /** \brief Get conversion result (Function does not care about the alignment)
751  * value = raw * gain + offset.
752  * \param vadc VADC module pointer
753  * \param group pointer to the VADC group
754  * \param channel channel Id
755  * \param sourceType type of request source
756  * \return scaled Conversion result
757  *
758  * \code
759  * Ifx_VADC vadc;
760  * vadc.vadc = &MODULE_VADC;
761  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
762  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
763  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
764  *
765  * //confiure wait for read mode for global result register
766  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
767  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
768  *
769  * // configure scan
770  * IfxVadc_setScan(group, channels, mask);
771  *
772  * // start the scan
773  * IfxVadc_startScan(group);
774  *
775  * // wait for conversion to finish
776  *
777  * // fetch the result of conversion for channel 2 of group 0
778  * Ifx_VADC_RESresult2;
779  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
780  * Ifx_VADC_RESresult5;
781  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
782  * \endcode
783  *
784  */
785 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
786 
787 /** \} */
788 
789 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
790  * \{ */
791 
792 /******************************************************************************/
793 /*-------------------------Inline Function Prototypes-------------------------*/
794 /******************************************************************************/
795 
796 /** \brief Disables the scan slot external trigger.
797  * \param vadcG pointer to VADC group registers.
798  * \return None
799  */
800 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
801 
802 /** \brief Enables the scan slot external trigger.
803  * \param vadcG pointer to VADC group registers.
804  * \return None
805  */
806 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
807 
808 /** \brief Gets the request scan slot gating mode.
809  * \param vadcG pointer to VADC group registers.
810  * \return requested scan slot gating mode.
811  */
812 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
813 
814 /** \brief Gets the request scan slot gating input.
815  * \param vadcG pointer to VADC group registers.
816  * \return request scan slot gating input.
817  */
818 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
819 
820 /** \brief Gets the request scan slot priority.
821  * \param vadcG pointer to VADC group registers.
822  * \return request scan slot priority.
823  */
824 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
825 
826 /** \brief Gets the request scan slot start mode.
827  * \param vadcG pointer to VADC group registers.
828  * \return request scan slot start mode.
829  */
830 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
831 
832 /** \brief Gets the requested scan slot trigger input.
833  * \param vadcG pointer to VADC group registers.
834  * \return requested scan slot trigger input.
835  */
836 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
837 
838 /** \brief Gets the requested scan slot trigger mode.
839  * \param vadcG pointer to VADC group registers.
840  * \return requested scan slot trigger mode.
841  */
842 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
843 
844 /** \brief Gets the auto scan enable status.
845  * \param vadcG pointer to VADC group registers.
846  * \return TRUE if auto scan enabled otherwise FALSE.
847  */
848 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
849 
850 /** \brief Returns the scan slot requested status.
851  * \param vadcG pointer to VADC group registers.
852  * \return TRUE if scan slot request enabled otherwise FALSE.
853  */
854 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
855 
856 /** \brief Enables/Disables continuous auto scan
857  * \param vadcG pointer to VADC group registers.
858  * \param autoscanEnable whether autoscan is enabled or not.
859  * \return None
860  */
861 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
862 
863 /** \brief Sets the scan slot gating configuration.
864  * \param vadcG pointer to VADC group registers.
865  * \param gatingSource gate input for group.
866  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
867  * \return None
868  */
869 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
870 
871 /** \brief Sets the scan slot trigger operating configurations.
872  * \param vadcG pointer to VADC group registers.
873  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
874  * \param triggerSource trigger input for group.
875  * \return None
876  */
877 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
878 
879 /** \brief Starts an autoscan on the specified group
880  * \param group pointer to the VADC group
881  * \return None
882  *
883  * See \ref IfxVadc_setScan
884  *
885  */
886 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
887 
888 /******************************************************************************/
889 /*-------------------------Global Function Prototypes-------------------------*/
890 /******************************************************************************/
891 
892 /** \brief Gives the scan status for a group
893  * \param group pointer to the VADC group
894  * \return IfxVadc_Status
895  */
896 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
897 
898 /** \brief Configures an (auto-)scan
899  * \param group pointer to the VADC group
900  * \param channels specifies the channels which should be enabled/disabled
901  * \param mask specifies the channels which should be modified
902  * \return None
903  *
904  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
905  *
906  * \code
907  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
908  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
909  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
910  *
911  * // configure scan
912  * IfxVadc_setScan(group, channels, mask);
913  *
914  * // enable Auto-Scan
915  * IfxVadc_setAutoScan(group, TRUE);
916  *
917  * // start the scan
918  * IfxVadc_startScan(group);
919  * \endcode
920  *
921  */
922 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
923 
924 /** \} */
925 
926 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
927  * \{ */
928 
929 /******************************************************************************/
930 /*-------------------------Inline Function Prototypes-------------------------*/
931 /******************************************************************************/
932 
933 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
934  * refill incase of aborted conversion
935  * source interrupt enable/disable
936  * external trigger control of the aborted conversion
937  * \param group pointer to the VADC group
938  * \param channel specifies channel Id
939  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
940  * \return None
941  *
942  * \code
943  *
944  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
945  * IfxVadc_ChannelId channel = 1; // for channel 1
946  * // Add channel 1 to queue of group 0 with the refill turned on
947  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
948  * \endcode
949  *
950  */
951 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
952 
953 /** \brief Clears all the queue entries including backup stage.
954  * \param vadcG pointer to VADC group registers.
955  * \param flushQueue Whether queue is cleared or not.
956  * \return None
957  */
958 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
959 
960 /** \brief Disables the external trigger.
961  * \param vadcG pointer to VADC group registers.
962  * \return None
963  */
964 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
965 
966 /** \brief Enables the external trigger.
967  * \param vadcG pointer to VADC group registers.
968  * \return None
969  */
970 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
971 
972 /** \brief Gets the requested queue slot gating mode.
973  * \param vadcG pointer to VADC group registers.
974  * \return requested queue slot gating mode.
975  */
976 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
977 
978 /** \brief Gets the requested queue slot gating input.
979  * \param vadcG pointer to VADC group registers.
980  * \return requested queue slot gating input.
981  */
982 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
983 
984 /** \brief Gets the request queue slot priority.
985  * \param vadcG pointer to VADC group registers.
986  * \return requested queue slot priority.
987  */
988 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
989 
990 /** \brief Gets the requested queue slot start mode.
991  * \param vadcG pointer to VADC group registers.
992  * \return requested queue slot start mode.
993  */
994 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
995 
996 /** \brief Gets the requested queue slot trigger input.
997  * \param vadcG pointer to VADC group registers.
998  * \return requested queue slot trigger input.
999  */
1000 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
1001 
1002 /** \brief Gets the requested queue slot trigger mode.
1003  * \param vadcG pointer to VADC group registers.
1004  * \return requested queue slot trigger mode.
1005  */
1006 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1007 
1008 /** \brief Returns the queue slot requested status.
1009  * \param vadcG pointer to VADC group registers.
1010  * \return TRUE if queue slot request enabled otherwise FALSE.
1011  */
1012 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1013 
1014 /** \brief Sets the gating configurations.
1015  * \param vadcG pointer to VADC group registers.
1016  * \param gatingSource gate input for group.
1017  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1018  * \return None
1019  */
1020 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1021 
1022 /** \brief Sets the trigger operating configurations.
1023  * \param vadcG pointer to VADC group registers.
1024  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1025  * \param triggerSource trigger input for group.
1026  * \return None
1027  */
1028 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1029 
1030 /** \brief Starts a queue of a group by generating a trigger event through software
1031  * \param group pointer to the VADC group
1032  * \return None
1033  */
1034 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1035 
1036 /******************************************************************************/
1037 /*-------------------------Global Function Prototypes-------------------------*/
1038 /******************************************************************************/
1039 
1040 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1041  * \param group pointer to the VADC group
1042  * \return status of the Queue
1043  *
1044  * \code
1045  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1046  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1047  * \endcode
1048  *
1049  */
1050 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1051 
1052 /** \} */
1053 
1054 /** \addtogroup IfxLld_Vadc_Std_IO
1055  * \{ */
1056 
1057 /******************************************************************************/
1058 /*-------------------------Inline Function Prototypes-------------------------*/
1059 /******************************************************************************/
1060 
1061 /** \brief Initializes a EMUX output
1062  * \param emux the Emux Pin which should be configured
1063  * \param outputMode the pin output mode which should be configured
1064  * \param padDriver the pad driver mode which should be configured
1065  * \return None
1066  */
1067 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1068 
1069 /** \brief Initializes a GxBFL output
1070  * \param gxBfl the GxBFL Pin which should be configured
1071  * \param outputMode the pin output mode which should be configured
1072  * \param padDriver the pad driver mode which should be configured
1073  * \return None
1074  */
1075 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1076 
1077 /** \} */
1078 
1079 /** \addtogroup IfxLld_Vadc_Std_Frequency
1080  * \{ */
1081 
1082 /******************************************************************************/
1083 /*-------------------------Inline Function Prototypes-------------------------*/
1084 /******************************************************************************/
1085 
1086 /** \brief Calculate the time using analog frequency.
1087  * \param analogFrequency analog frequency in Hz.
1088  * \param sampleTime sample time in sec.
1089  * \return sample time in sec.
1090  */
1091 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1092 
1093 /******************************************************************************/
1094 /*-------------------------Global Function Prototypes-------------------------*/
1095 /******************************************************************************/
1096 
1097 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1098  * \param vadc pointer to the base of VADC registers
1099  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1100  */
1101 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1102 
1103 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1104  * \param vadc pointer to the base of VADC registers
1105  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1106  */
1107 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1108 
1109 /** \} */
1110 
1111 /** \addtogroup IfxLld_Vadc_Std_Group
1112  * \{ */
1113 
1114 /******************************************************************************/
1115 /*-------------------------Inline Function Prototypes-------------------------*/
1116 /******************************************************************************/
1117 
1118 /** \brief Clears the all group requests.
1119  * \param vadcG pointer to VADC group registers.
1120  * \return None
1121  */
1122 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1123 
1124 /** \brief Gets the ADC group arbitration round length.
1125  * \param vadcG pointer to VADC group registers.
1126  * \return ADC group arbitration round length.
1127  */
1128 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1129 
1130 /** \brief Gets the channel esult service request node pointer 0.
1131  * \param vadcG pointer to VADC group registers.
1132  * \return channel result service request node pointer 0.
1133  */
1134 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1135 
1136 /** \brief Gets the channel esult service request node pointer 1.
1137  * \param vadcG pointer to VADC group registers.
1138  * \return channel result service request node pointer 1.
1139  */
1140 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1141 
1142 /** \brief Gets the channel service request node pointer.
1143  * \param vadcG pointer to VADC group registers.
1144  * \return channel service request node pointer.
1145  */
1146 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1147 
1148 /** \brief Gets the configured master index.
1149  * \param vadcG pointer to VADC group registers.
1150  * \return configured master kernel index.
1151  */
1152 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1153 
1154 /** \brief Resets the ADC group.
1155  * \param vadcG pointer to VADC group registers.
1156  * \return None
1157  */
1158 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1159 
1160 /** \brief Sets analog converter group number.
1161  * \param vadcG pointer to VADC group registers.
1162  * \param analogConverterMode group analog converter mode.
1163  * \return None
1164  */
1165 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1166 
1167 /** \brief Sets the arbiter round length.
1168  * \param vadcG pointer to VADC group registers.
1169  * \param arbiterRoundLength arbiter round length.
1170  * \return None
1171  */
1172 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1173 
1174 /** \brief Sets the ADC input class channel resolution.
1175  * \param vadcG pointer to VADC group registers.
1176  * \param inputClassNum input class number.
1177  * \param resolution ADC input class channel resolution.
1178  * \return None
1179  */
1180 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1181 
1182 /** \brief Sets the ADC input class sample time.
1183  * \param vadcG pointer to VADC group registers.
1184  * \param inputClassNum input class number.
1185  * \param analogFrequency ADC analog frequency in Hz.
1186  * \param sampleTime request sample time in sec for input class.
1187  * \return None
1188  */
1189 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1190 
1191 /** \brief Sets the master index.
1192  * \param vadcG pointer to VADC group registers.
1193  * \param masterIndex master index.
1194  * \return None
1195  */
1196 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1197 
1198 /******************************************************************************/
1199 /*-------------------------Global Function Prototypes-------------------------*/
1200 /******************************************************************************/
1201 
1202 /** \brief Sets the Arbiter slot configurations.
1203  * \param vadcG pointer to VADC group registers.
1204  * \param slotEnable enable/disable of slot.
1205  * \param prio channel request priority.
1206  * \param mode Channel Slot start mode.
1207  * \param slot channel slot Request source.
1208  * \return None
1209  */
1210 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1211 
1212 /** \} */
1213 
1214 /** \addtogroup IfxLld_Vadc_Std_Module
1215  * \{ */
1216 
1217 /******************************************************************************/
1218 /*-------------------------Inline Function Prototypes-------------------------*/
1219 /******************************************************************************/
1220 
1221 /** \brief Disable VADC Module
1222  * \param vadc Pointer to VADC Module
1223  * \return None
1224  */
1225 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1226 
1227 /** \brief Enable VADC kernel.
1228  * \param vadc pointer to the base of VADC registers.
1229  * \return None
1230  */
1231 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1232 
1233 /** \brief gets ADC Calibration Flag CAL status.
1234  * \param vadc pointer to VADC group registers.
1235  * \param adcCalGroupNum ADC CAL group number.
1236  * \return CAL group status.
1237  */
1238 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1239 
1240 /** \brief Gets the global control configuration value.
1241  * \param vadc pointer to the base of VADC registers.
1242  * \return global control configuration value.
1243  */
1244 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1245 
1246 /** \brief get SUCAL bit field status
1247  * \param vadc Pointer to VADC Module
1248  * \return Indicate the start-up calibration phase
1249  */
1250 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1251 
1252 /** \brief initiates the calibration pulse phase.
1253  * \param vadc pointer to the base of VADC registers
1254  * \return None
1255  */
1256 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1257 
1258 /** \brief Sets the channel conversion mode.
1259  * \param vadc pointer to VADC module registers.
1260  * \param inputClassNum global input class number.
1261  * \param resolution ADC channel resolution.
1262  * \return None
1263  */
1264 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1265 
1266 /** \brief Sets the sample time of ADC global class.
1267  * \param vadc pointer to VADC module registers.
1268  * \param inputClassNum global input class number.
1269  * \param analogFrequency ADC analog frequency in Hz.
1270  * \param sampleTime the requested sample time for input class in sec.
1271  * \return None
1272  */
1273 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1274 
1275 /** \brief Sets the sensitivity of the module to sleep signal
1276  * \param vadc pointer to VADC registers
1277  * \param mode mode selection (enable/disable)
1278  * \return None
1279  */
1280 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1281 
1282 /******************************************************************************/
1283 /*-------------------------Global Function Prototypes-------------------------*/
1284 /******************************************************************************/
1285 
1286 /** \brief Disable write access to the VADC config/control registers.
1287  * \param vadc pointer to the base of VADC registers.
1288  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1289  * \return None
1290  */
1291 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1292 
1293 /** \brief Disables the post calibration.
1294  * \param vadc pointer to the base of VADC registers.
1295  * \param group Index of the group.
1296  * \param disable disable or not.
1297  * \return None
1298  */
1299 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1300 
1301 /** \brief Enable write access to the VADC config/control registers.
1302  * \param vadc pointer to the base of VADC registers.
1303  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1304  * \return None
1305  */
1306 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1307 
1308 /** \brief Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068
1309  * \param vadc pointer to the base of VADC registers.
1310  * \param ccu6Num selects CCU60 or CCU61
1311  * \return None
1312  */
1313 IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num);
1314 
1315 /** \brief Module Frequency in Hz
1316  * \return Module Frequency in Hz.
1317  */
1318 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1319 
1320 /** \brief Gives the SRC source address.
1321  * \param group Index of the group
1322  * \param index SRC number
1323  * \return SRC source address
1324  */
1325 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1326 
1327 /** \brief Initialises ADC arbiter clock.
1328  * \param vadc pointer to the base of VADC registers
1329  * \param arbiterClockDivider ADC arbiter clock divider.
1330  * \return None
1331  */
1332 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1333 
1334 /** \brief Initialises the ADC Converter clock.
1335  * \param vadc pointer to the base of VADC registers
1336  * \param converterClockDivider ADC converter clock divider.
1337  * \return None
1338  */
1339 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1340 
1341 /** \brief Configure the FadcD vadc digital clock.
1342  * \param vadc pointer to the base of VADC registers.
1343  * \param fAdcD ADC digital clock frequency in Hz.
1344  * \return calculated ADC digital clock frequency in Hz.
1345  */
1346 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1347 
1348 /** \brief Configure the ADC analog clock.
1349  * \param vadc pointer to the base of VADC registers.
1350  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1351  * \return ADC analog clock frequency in Hz.
1352  */
1353 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1354 
1355 /** \brief Return the post calibration status
1356  * \param vadc Pointer to VADC module
1357  * \param group specifies Group ID
1358  * \return TRUE if the post calibration is enabled for the group else false
1359  */
1360 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1361 
1362 /** \brief Resets the kernel.
1363  * \param vadc pointer to the base of VADC registers.
1364  * \return None
1365  */
1366 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1367 
1368 /** \brief Select Low Power Supply Voltage
1369  * \param vadc Pointer to Module space
1370  * \param supplyVoltage Select Supply Voltage
1371  * \return None
1372  */
1373 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1374 
1375 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1376  * \param vadc pointer to the base of VADC registers.
1377  * \return None
1378  */
1379 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1380 
1381 /** \} */
1382 
1383 /** \addtogroup IfxLld_Vadc_Std_Channel
1384  * \{ */
1385 
1386 /******************************************************************************/
1387 /*-------------------------Inline Function Prototypes-------------------------*/
1388 /******************************************************************************/
1389 
1390 /** \brief Clears the channel request.
1391  * \param vadcG pointer to VADC group registers.
1392  * \param channelId channel id whose request to be cleared.
1393  * \return None
1394  */
1395 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1396 
1397 /** \brief Enables the FIFO mode.
1398  * \param vadcG pointer to VADC group registers.
1399  * \param resultRegister channel result register.
1400  * \param fifoMode FIFO mode .
1401  * \return None
1402  */
1403 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1404 
1405 /**
1406  * \param vadcG pointer to VADC group registers.
1407  * \param resultRegister channel result register.
1408  * \return None
1409  */
1410 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1411 
1412 /** \brief Gets the group's assigned channels.
1413  * \param vadcG pointer to VADC group registers.
1414  * \return group's assigned channels.
1415  */
1416 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1417 
1418 /** \brief Gets the current ADC channel control configurations.
1419  * \param vadcG pointer to VADC group registers.
1420  * \param channelIndex ADC channel number.
1421  * \return current ADC channel control configuration.
1422  */
1423 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1424 
1425 /** \brief Gets the channel input class
1426  * \param vadcG pointer to VADC Group register space
1427  * \param channelIndex specifies channel ID
1428  * \return Input class
1429  */
1430 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1431 
1432 /** \brief Gets the ADC input class channel resolution.
1433  * \param vadcG pointer to VADC group registers.
1434  * \param inputClassNum ADC input class number.
1435  * \return ADC input class channel resolution.
1436  */
1437 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1438 
1439 /** \brief Gets the ADC input class channel sample time.
1440  * \param vadcG pointer to VADC group registers.
1441  * \param inputClassNum ADC input class number.
1442  * \param analogFrequency ADC module analog frequency in Hz.
1443  * \return ADC input class channel sample time in sec.
1444  */
1445 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1446 
1447 /** \brief Sets the channels with low priority as background channel.
1448  * \param vadcG pointer to VADC group registers.
1449  * \param channelIndex group channel id.
1450  * \return None
1451  */
1452 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1453 
1454 /** \brief Sets the target for result background source.
1455  * \param vadcG pointer to VADC group registers.
1456  * \param channelIndex group channel id.
1457  * \param globalResultUsage whether storage in global result register.
1458  * \return None
1459  */
1460 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1461 
1462 /** \brief Selects boundary extension.
1463  * \param vadcG pointer to VADC group registers.
1464  * \param channelIndex group channel id.
1465  * \param boundaryMode boundary extension mode.
1466  * \return None
1467  */
1468 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1469 
1470 /** \brief Sets the channel event service request line.
1471  * \param vadcG pointer to VADC group registers.
1472  * \param channelSrcNr channel event Service Node.
1473  * \param channel channel number.
1474  * \return None
1475  */
1476 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1477 
1478 /** \brief Sets the channel input class.
1479  * \param vadcG pointer to VADC group registers.
1480  * \param channelIndex group channel id.
1481  * \param inputClass group input class.
1482  * \return None
1483  */
1484 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1485 
1486 /** \brief Sets the channel event mode.
1487  * \param vadcG pointer to VADC group registers.
1488  * \param channelIndex group channel id.
1489  * \param limitCheck channel event mode.
1490  * \return None
1491  */
1492 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1493 
1494 /** \brief Sets channel as priority channel with in the group.
1495  * \param vadcG pointer to VADC group registers.
1496  * \param channelIndex group channel id.
1497  * \return None
1498  */
1499 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1500 
1501 /** \brief Sets group's lower boundary.
1502  * \param vadcG pointer to VADC group registers.
1503  * \param channelIndex group channel id.
1504  * \param lowerBoundary group lower boundary.
1505  * \return None
1506  */
1507 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1508 
1509 /** \brief Selects the refernce input.
1510  * \param vadcG pointer to VADC group registers.
1511  * \param channelIndex group channel id.
1512  * \param reference reference input.
1513  * \return None
1514  */
1515 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1516 
1517 /** \brief Sets result event node pointer 0.
1518  * \param vadcG pointer to VADC group registers.
1519  * \param resultSrcNr channel result event service node.
1520  * \param resultRegister channel result register.
1521  * \return None
1522  */
1523 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1524 
1525 /** \brief Sets result event node pointer 1.
1526  * \param vadcG pointer to VADC group registers.
1527  * \param resultSrcNr channel result event service node.
1528  * \param resultRegister channel result register.
1529  * \return None
1530  */
1531 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1532 
1533 /** \brief Sets result store position.
1534  * \param vadcG pointer to VADC group registers.
1535  * \param channelIndex group channel id.
1536  * \param rightAlignedStorage result store position.
1537  * \return None
1538  */
1539 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1540 
1541 /** \brief Sets channel synchronization request.
1542  * \param vadcG pointer to VADC group registers.
1543  * \param channelIndex group channel id.
1544  * \param synchonize whether channel synchronize or stand alone operation.
1545  * \return None
1546  */
1547 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1548 
1549 /** \brief Sets group's upper boundary.
1550  * \param vadcG pointer to VADC group registers.
1551  * \param channelIndex group channel id.
1552  * \param upperBoundary group upper boundary.
1553  * \return None
1554  */
1555 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1556 
1557 /** \brief Sets the group result register.
1558  * \param vadcG pointer to VADC group registers.
1559  * \param channelIndex group channel id.
1560  * \param resultRegister result register for group result storage.
1561  * \return None
1562  */
1563 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1564 
1565 /******************************************************************************/
1566 /*-------------------------Global Function Prototypes-------------------------*/
1567 /******************************************************************************/
1568 
1569 /** \brief get channel conversion timing
1570  * \param vadc Pointer to VADC module
1571  * \param group specifies the Group
1572  * \param inputClass Input class used
1573  * \param analogFrequency ADC module analog frequency fadci in Hz.
1574  * \param moduleFrequency ADC module frequency fvadc in Hz.
1575  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1576  * \return Channel conversion Time in sec
1577  */
1578 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1579 
1580 /** \} */
1581 
1582 /** \addtogroup IfxLld_Vadc_Std_Emux
1583  * \{ */
1584 
1585 /******************************************************************************/
1586 /*-------------------------Inline Function Prototypes-------------------------*/
1587 /******************************************************************************/
1588 
1589 /** \brief get global input class resolution
1590  * \param vadc Pointer to VADC Module space
1591  * \param inputClassNum global input class number
1592  * \return External channel resolution for global input class
1593  */
1594 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1595 
1596 /** \brief Get the sample time of ADC global class for external channel.
1597  * \param vadc pointer to VADC Module space
1598  * \param inputClassNum Adc input class number
1599  * \param analogFrequency ADC module analog frequency in Hz.
1600  * \return ADC input class external channel sample time in sec.
1601  */
1602 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1603 
1604 /** \brief get the external channel resolution
1605  * \param vadcG Pointer to VADC group register space
1606  * \param inputClassNum Adc input class number
1607  * \return Adc input class External channel resolution
1608  */
1609 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1610 
1611 /** \brief Gets the ADC input class sample time of external channel.
1612  * \param vadcG Pointer to Register Group space
1613  * \param inputClassNum ADC input class number
1614  * \param analogFrequency ADC module analog frequency in Hz.
1615  * \return ADC input class external channel sample time in sec.
1616  */
1617 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1618 
1619 /** \brief set the external channel resolution of Global class
1620  * \param vadc pointer to VADC Module space
1621  * \param inputClassNum Global Input Class Number
1622  * \param resolution External Channel resolution
1623  * \return None
1624  */
1625 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1626 
1627 /** \brief Sets the sample time of ADC global class for external channel.
1628  * \param vadc Pointer to VADC Module space
1629  * \param inputClassNum Adc input class number
1630  * \param analogFrequency ADC analog Frequency in HZ
1631  * \param sampleTime the requested sample time for input class in sec
1632  * \return None
1633  */
1634 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1635 
1636 /** \brief set the external channel resolution of ADC input class
1637  * \param vadcG pointer to VADC Group Register space
1638  * \param inputClassNum input class number
1639  * \param resolution input class external channel resolution
1640  * \return None
1641  */
1642 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1643 
1644 /** \brief Sets the ADC input class sample time for external channel.
1645  * \param vadcG Pointer to VADC Group Register Space
1646  * \param inputClassNum input class number
1647  * \param analogFrequency ADC analog frequency in Hz.
1648  * \param sampleTime request sample time in sec for input class.
1649  * \return None
1650  */
1651 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1652 
1653 /** \brief Sets the Emux Interface for a particular group
1654  * \param vadc Pointer to VADC Module Space
1655  * \param emuxInterface specifies the EmuxInterface
1656  * \param group specifies the group ID
1657  * \return None
1658  */
1659 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1660 
1661 /******************************************************************************/
1662 /*-------------------------Global Function Prototypes-------------------------*/
1663 /******************************************************************************/
1664 
1665 /**
1666  * \param vadc pointer to Module space
1667  * \param vadcG Pointer to VADC group register space
1668  * \param mode External Multiplexer mode
1669  * \param channels Specifies channel Id
1670  * \param startChannel specifies the external channel value from which conversion to be carried out
1671  * \param code Output the channel number in binary code/gray code
1672  * \param sampleTimeControl specifies when to use a sample time for external channel
1673  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1674  * \return None
1675  */
1676 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1677 
1678 /** \} */
1679 
1680 /******************************************************************************/
1681 /*-------------------------Inline Function Prototypes-------------------------*/
1682 /******************************************************************************/
1683 
1684 /** \brief get channel service request node pointer
1685  * \param vadcG Pointer to VADC Group register space
1686  * \return channel service request node pointer
1687  */
1688 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1689 
1690 /** \brief set channel event node pointer
1691  * \param vadcG Pointer to the Vadc group register space
1692  * \param channelSrcNr Service request
1693  * \param channel specifies channel
1694  * \return None
1695  */
1696 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1697 
1698 /******************************************************************************/
1699 /*---------------------Inline Function Implementations------------------------*/
1700 /******************************************************************************/
1701 
1702 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1703 {
1704  group->QINR0.U = channel | options;
1705 }
1706 
1707 
1708 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1709 {
1710  uint32 ticks;
1711 
1712  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1713 
1714  if (ticks > 31)
1715  {
1716  ticks = (ticks / 16) + 15;
1717  }
1718 
1719  ticks = __minu(ticks, 0xFFu);
1720 
1721  return ticks;
1722 }
1723 
1724 
1725 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1726 {
1727  vadcG->REFCLR.U = 0x0000FFFFu;
1728 }
1729 
1730 
1731 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1732 {
1733  vadcG->CEFCLR.U = 1 << channelId;
1734 }
1735 
1736 
1737 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1738 {
1739  vadcG->QMR0.B.FLUSH = flushQueue;
1740 }
1741 
1742 
1743 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1744 {
1745  group->RCR[resultIdx].B.WFR = waitForRead;
1746 }
1747 
1748 
1749 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1750 {
1751  vadc->GLOBRCR.B.WFR = waitForRead;
1752 }
1753 
1754 
1755 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1756 {
1757  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1758  IfxScuWdt_clearCpuEndinit(passwd);
1759  vadc->CLC.B.DISR = 1;
1760  IfxScuWdt_setCpuEndinit(passwd);
1761 }
1762 
1763 
1764 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1765 {
1766  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1767 }
1768 
1769 
1770 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1771 {
1772  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1773 }
1774 
1775 
1776 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1777 {
1778  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1779 }
1780 
1781 
1782 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1783 {
1784  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1785 }
1786 
1787 
1788 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1789 {
1790  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1791 
1792  IfxScuWdt_clearCpuEndinit(passwd);
1793  vadc->CLC.U = 0x00000000;
1794  IfxScuWdt_setCpuEndinit(passwd);
1795 }
1796 
1797 
1798 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1799 {
1800  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1801 }
1802 
1803 
1804 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1805 {
1806  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1807 }
1808 
1809 
1810 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1811 {
1812  vadcG->RCR[resultRegister].B.SRGEN = 1;
1813 }
1814 
1815 
1816 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1817 {
1818  uint8 status;
1819  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1820  return status;
1821 }
1822 
1823 
1824 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1825 {
1826  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1827 }
1828 
1829 
1830 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1831 {
1832  Ifx_VADC_G_CHASS assignChannels;
1833  assignChannels.U = vadcG->CHASS.U;
1834  return assignChannels;
1835 }
1836 
1837 
1838 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1839 {
1840  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1841 }
1842 
1843 
1844 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1845 {
1846  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1847 }
1848 
1849 
1850 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1851 {
1852  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1853 }
1854 
1855 
1856 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1857 {
1858  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1859 }
1860 
1861 
1862 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1863 {
1864  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1865 }
1866 
1867 
1868 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1869 {
1870  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1871 }
1872 
1873 
1874 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1875 {
1876  Ifx_VADC_CHCTR tempChctr;
1877  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1878  return tempChctr;
1879 }
1880 
1881 
1882 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1883 {
1884  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1885 }
1886 
1887 
1888 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1889 {
1890  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1891  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1892  return resultServiceRequestNodePtr0;
1893 }
1894 
1895 
1896 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1897 {
1898  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1899  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1900  return resultServiceRequestNodePtr1;
1901 }
1902 
1903 
1904 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1905 {
1906  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1907  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1908  return serviceRequestNodePtr;
1909 }
1910 
1911 
1912 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1913 {
1914  Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
1915  serviceRequestNodePtr.U = vadcG->CEVNP1.U;
1916  return serviceRequestNodePtr;
1917 }
1918 
1919 
1920 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1921 {
1922  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1923 }
1924 
1925 
1926 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1927 {
1928  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1929 }
1930 
1931 
1932 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1933 {
1934  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1935 }
1936 
1937 
1938 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1939 {
1940  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1941 }
1942 
1943 
1944 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1945 {
1946  Ifx_VADC_GLOBCFG globCfg;
1947  globCfg.U = vadc->GLOBCFG.U;
1948  return globCfg;
1949 }
1950 
1951 
1952 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1953 {
1954  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1955 }
1956 
1957 
1958 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1959 {
1960  Ifx_VADC_GLOBRES tmpGlobalResult;
1961 
1962  tmpGlobalResult.U = vadc->GLOBRES.U;
1963 
1964  return tmpGlobalResult;
1965 }
1966 
1967 
1968 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1969 {
1970  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1971 
1972  if (sampleTime > 16)
1973  {
1974  sampleTime = (sampleTime - 15) * 16;
1975  }
1976 
1977  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1978 }
1979 
1980 
1981 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1982 {
1983  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1984 }
1985 
1986 
1987 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1988 {
1989  uint32 idx;
1990 
1991  for (idx = 0; idx < numResults; idx++)
1992  {
1993  results[idx].U = group->RES[resultOffset + idx].U;
1994  }
1995 }
1996 
1997 
1998 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1999 {
2000  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
2001 
2002  if (sampleTime > 16)
2003  {
2004  sampleTime = (sampleTime - 15) * 16;
2005  }
2006 
2007  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2008 }
2009 
2010 
2011 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
2012 {
2013  uint8 masterIndex = 0;
2014  masterIndex = vadcG->SYNCTR.B.STSEL;
2015  return masterIndex;
2016 }
2017 
2018 
2019 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
2020 {
2021  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
2022 }
2023 
2024 
2025 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
2026 {
2027  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
2028 }
2029 
2030 
2031 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2032 {
2033  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2034 }
2035 
2036 
2037 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2038 {
2039  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2040 }
2041 
2042 
2043 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2044 {
2045  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2046 }
2047 
2048 
2049 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2050 {
2051  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2052 }
2053 
2054 
2055 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2056 {
2057  Ifx_VADC_RES tmpResult;
2058 
2059  tmpResult.U = group->RES[resultIdx].U;
2060 
2061  return tmpResult;
2062 }
2063 
2064 
2065 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2066 {
2067  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2068 }
2069 
2070 
2071 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2072 {
2073  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2074 }
2075 
2076 
2077 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2078 {
2079  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2080 }
2081 
2082 
2083 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2084 {
2085  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2086 }
2087 
2088 
2089 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2090 {
2091  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2092 }
2093 
2094 
2095 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2096 {
2097  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2098 }
2099 
2100 
2101 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2102 {
2103  return (boolean)vadc->GLOBCFG.B.SUCAL;
2104 }
2105 
2106 
2107 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2108 {
2109  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2110  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2111 }
2112 
2113 
2114 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2115 {
2116  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2117  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2118 }
2119 
2120 
2121 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2122 {
2123  vadc->GLOBCFG.B.SUCAL = 1;
2124 }
2125 
2126 
2127 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2128 {
2129  return (boolean)vadc->BRSMR.B.SCAN;
2130 }
2131 
2132 
2133 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2134 {
2135  return (boolean)vadcG->ASMR.B.SCAN;
2136 }
2137 
2138 
2139 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2140 {
2141  return (boolean)vadcG->ARBPR.B.ASEN2;
2142 }
2143 
2144 
2145 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2146 {
2147  return (boolean)vadcG->ARBPR.B.ASEN0;
2148 }
2149 
2150 
2151 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2152 {
2153  return (boolean)vadcG->ARBPR.B.ASEN1;
2154 }
2155 
2156 
2157 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2158 {
2159  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2160 }
2161 
2162 
2163 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2164 {
2165  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2166 }
2167 
2168 
2169 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2170 {
2171  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2172 }
2173 
2174 
2175 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2176 {
2177  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2178 }
2179 
2180 
2181 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2182 {
2183  vadcG->ASMR.B.SCAN = autoscanEnable;
2184 }
2185 
2186 
2187 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2188 {
2189  vadcG->CHASS.U &= ~(1 << channelIndex);
2190 }
2191 
2192 
2193 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2194 {
2195  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2196 }
2197 
2198 
2199 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2200 {
2201  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2202  vadc->BRSSEL[groupId].U = channels;
2203 }
2204 
2205 
2206 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2207 {
2208  Ifx_VADC_BRSCTRL brsctrl;
2209  brsctrl.U = vadc->BRSCTRL.U;
2210  brsctrl.B.GTWC = 1;
2211  brsctrl.B.GTSEL = gatingSource;
2212  vadc->BRSCTRL.U = brsctrl.U;
2213  vadc->BRSMR.B.ENGT = gatingMode;
2214 }
2215 
2216 
2217 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2218 {
2219  Ifx_VADC_BRSCTRL brsctrl;
2220  brsctrl.U = vadc->BRSCTRL.U;
2221  brsctrl.B.XTWC = 1;
2222  brsctrl.B.XTMODE = triggerMode;
2223  brsctrl.B.XTSEL = triggerSource;
2224  vadc->BRSCTRL.U = brsctrl.U;
2225 }
2226 
2227 
2228 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2229 {
2230  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2231 }
2232 
2233 
2234 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2235 {
2236  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2237  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2238 }
2239 
2240 
2241 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2242 {
2243  vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
2244  vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2245 }
2246 
2247 
2248 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2249 {
2250  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2251 }
2252 
2253 
2254 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2255 {
2256  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2257 }
2258 
2259 
2260 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2261 {
2262  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2263 }
2264 
2265 
2266 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2267 {
2268  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2269 }
2270 
2271 
2272 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2273 {
2274  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2275 }
2276 
2277 
2278 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2279 {
2280  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2281 }
2282 
2283 
2284 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2285 {
2286  if (emuxInterface == IfxVadc_EmuxInterface_0)
2287  {
2288  vadc->EMUXSEL.B.EMUXGRP0 = group;
2289  }
2290  else
2291  {
2292  vadc->EMUXSEL.B.EMUXGRP1 = group;
2293  }
2294 }
2295 
2296 
2297 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2298 {
2299  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2300 }
2301 
2302 
2303 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2304 {
2305  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2306 }
2307 
2308 
2309 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2310 {
2311  vadcG->CHASS.U |= (1 << channelIndex);
2312 }
2313 
2314 
2315 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2316 {
2317  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2318 }
2319 
2320 
2321 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2322 {
2323  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2324 }
2325 
2326 
2327 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2328 {
2329  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2330 }
2331 
2332 
2333 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2334 {
2335  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2336  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2337 }
2338 
2339 
2340 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2341 {
2342  Ifx_VADC_G_QCTRL0 qctrl0;
2343  qctrl0.U = vadcG->QCTRL0.U;
2344  qctrl0.B.GTWC = 1;
2345  qctrl0.B.GTSEL = gatingSource;
2346  vadcG->QCTRL0.U = qctrl0.U;
2347  vadcG->QMR0.B.ENGT = gatingMode;
2348 }
2349 
2350 
2351 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2352 {
2353  Ifx_VADC_G_QCTRL0 qctrl0;
2354  qctrl0.U = vadcG->QCTRL0.U;
2355  qctrl0.B.XTWC = 1;
2356  qctrl0.B.XTMODE = triggerMode;
2357  qctrl0.B.XTSEL = triggerSource;
2358  vadcG->QCTRL0.U = qctrl0.U;
2359 }
2360 
2361 
2362 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2363 {
2364  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2365 }
2366 
2367 
2368 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2369 {
2370  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2371  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2372 }
2373 
2374 
2375 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2376 {
2377  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2378  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2379 }
2380 
2381 
2382 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2383 {
2384  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2385 }
2386 
2387 
2388 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2389 {
2390  Ifx_VADC_G_ASCTRL asctrl;
2391  asctrl.U = vadcG->ASCTRL.U;
2392  asctrl.B.GTWC = 1;
2393  asctrl.B.GTSEL = gatingSource;
2394  vadcG->ASCTRL.U = asctrl.U;
2395  vadcG->ASMR.B.ENGT = gatingMode;
2396 }
2397 
2398 
2399 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2400 {
2401  Ifx_VADC_G_ASCTRL asctrl;
2402  asctrl.U = vadcG->ASCTRL.U;
2403  asctrl.B.XTWC = 1;
2404  asctrl.B.XTMODE = triggerMode;
2405  asctrl.B.XTSEL = triggerSource;
2406  vadcG->ASCTRL.U = asctrl.U;
2407 }
2408 
2409 
2410 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2411 {
2412  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2413  IfxScuWdt_clearCpuEndinit(passwd);
2414  vadc->CLC.B.EDIS = mode;
2415  IfxScuWdt_setCpuEndinit(passwd);
2416 }
2417 
2418 
2419 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2420 {
2421  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2422 }
2423 
2424 
2425 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2426 {
2427  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2428 }
2429 
2430 
2431 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2432 {
2433  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2434 }
2435 
2436 
2437 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2438 {
2439  group->QMR0.B.TREV = 1;
2440 }
2441 
2442 
2443 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2444 {
2445  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2446 }
2447 
2448 
2449 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2450 {
2451  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2452 }
2453 
2454 
2455 #endif /* IFXVADC_H */