iLLD_TC22x  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_1_0_0_11_0
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25  * \ingroup IfxLld_Vadc_Std
26  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27  * \ingroup IfxLld_Vadc_Std
28  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_Group Group Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Module Module Functions
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43  * \ingroup IfxLld_Vadc_Std
44  */
45 
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48 
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52 
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 
60 /******************************************************************************/
61 /*--------------------------------Enumerations--------------------------------*/
62 /******************************************************************************/
63 
64 /** \addtogroup IfxLld_Vadc_Std_Enum
65  * \{ */
66 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
67  */
68 typedef enum
69 {
70  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
71  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
72  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
73  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
74 } IfxVadc_AnalogConverterMode;
75 
76 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
77  */
78 typedef enum
79 {
80  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
81  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
82  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
83  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
84 } IfxVadc_ArbitrationRounds;
85 
86 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
87  */
88 typedef enum
89 {
90  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
91  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
92  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
93  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
94  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
95  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
96  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
97  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
98  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
99  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
100  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
101  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
102  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
103  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
104  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
105  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
106 } IfxVadc_BoundaryExtension;
107 
108 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
109  */
110 typedef enum
111 {
112  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
113  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
114  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
115  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
116 } IfxVadc_BoundarySelection;
117 
118 /** \brief VADC Channels
119  */
120 typedef enum
121 {
122  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
123  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
124  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
125  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
126  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
127  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
128  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
129  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
130  IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
131  IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
132  IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
133  IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
134  IfxVadc_ChannelId_11 = 11 /**< \brief Channel 11 */
135 } IfxVadc_ChannelId;
136 
137 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
138  */
139 typedef enum
140 {
141  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
142  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
143 } IfxVadc_ChannelReference;
144 
145 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
146  */
147 typedef enum
148 {
149  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
150  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
151  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
152  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
153 } IfxVadc_ChannelResolution;
154 
155 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
156  */
157 typedef enum
158 {
159  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
160  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
161  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
162  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
163  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
164  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
165  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
166  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
167  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
168  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
169  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
170  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
171  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
172  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
173  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
174  IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
175 } IfxVadc_ChannelResult;
176 
177 /** \brief External Multiplexer Channel Selection Style as defined in
178  * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
179  */
180 typedef enum
181 {
182  IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
183  IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
184  * associated channel for EMUX control */
185 } IfxVadc_ChannelSelectionStyle;
186 
187 /** \brief type of conversion
188  */
189 typedef enum
190 {
191  IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
192 } IfxVadc_ConversionType;
193 
194 /** \brief Specifies the External Coding scheme(binary/gray)
195  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
196  */
197 typedef enum
198 {
199  IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
200  IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
201 } IfxVadc_EmuxCodingScheme;
202 
203 /** \brief Specifies the Emux interface
204  */
205 typedef enum
206 {
207  IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
208  IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
209 } IfxVadc_EmuxInterface;
210 
211 /** \brief External Multiplexer sample time control
212  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
213  */
214 typedef enum
215 {
216  IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
217  IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
218 } IfxVadc_EmuxSampleTimeControl;
219 
220 /** \brief specifies the External Channel Start select value
221  * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
222  */
223 typedef enum
224 {
225  IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
226  IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
227  IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
228  IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
229  IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
230  IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
231  IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
232  IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
233 } IfxVadc_EmuxSelectValue;
234 
235 /** \brief Specifies External Multiplexer Mode
236  * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
237  */
238 typedef enum
239 {
240  IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
241  IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
242  IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
243  IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
244 } IfxVadc_ExternalMultiplexerMode;
245 
246 /** \brief FIFO mode enable
247  */
248 typedef enum
249 {
250  IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
251  IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
252  IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
253  IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
254 } IfxVadc_FifoMode;
255 
256 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
257  */
258 typedef enum
259 {
260  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
261  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
262  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
263  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
264 } IfxVadc_GatingMode;
265 
266 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
267  */
268 typedef enum
269 {
270  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
271  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
272  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
273  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
274  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
275  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
276  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
277  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
278  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
279  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
280  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
281  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
282  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
283  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
284  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
285  IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
286 } IfxVadc_GatingSource;
287 
288 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
289  */
290 typedef enum
291 {
292  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
293  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
294  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
295  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
296 } IfxVadc_InputClasses;
297 
298 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
299  */
300 typedef enum
301 {
302  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
303  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
304  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
305  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
306 } IfxVadc_LimitCheck;
307 
308 /** \brief Low Power Supply Voltage Select
309  */
310 typedef enum
311 {
312  IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
313  IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
314 } IfxVadc_LowSupplyVoltageSelect;
315 
316 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
317  */
318 typedef enum
319 {
320  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
321  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
322  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
323  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
324  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
325  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
326  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
327  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
328  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
329  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
330  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
331  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
332  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
333  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
334  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
335  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
336  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
337  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
338  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
340  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
341  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
342  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
348  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
349  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
350  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
351  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
352  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
353  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
354  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
356  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
357  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
358  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
364  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
365  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
366  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
367  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
368  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
369  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
370  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
372  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
373  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
374  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
380  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
381  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
382  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
383 } IfxVadc_Protection;
384 
385 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
386  */
387 typedef enum
388 {
389  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
390  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
391  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
392  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
393 } IfxVadc_RequestSlotPriority;
394 
395 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
396  */
397 typedef enum
398 {
399  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
400  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
401 } IfxVadc_RequestSlotStartMode;
402 
403 /** \brief Request sources
404  */
405 typedef enum
406 {
407  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
408  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
409  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
410 } IfxVadc_RequestSource;
411 
412 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
413  * Definition in Ifx_VADC.CLC.B.EDIS
414  */
415 typedef enum
416 {
417  IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
418  IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
419 } IfxVadc_SleepMode;
420 
421 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
422  */
423 typedef enum
424 {
425  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
426  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
427  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
428  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
429  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
430  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
431  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
432  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
433 } IfxVadc_SrcNr;
434 
435 /** \brief API return values defined in
436  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
437  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
438  */
439 typedef enum
440 {
441  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
442  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
443  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
444  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
445  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
446  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
447  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
448 } IfxVadc_Status;
449 
450 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
451  */
452 typedef enum
453 {
454  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
455  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
456  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
457  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
458 } IfxVadc_TriggerMode;
459 
460 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
461  */
462 typedef enum
463 {
464  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
465  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
466  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
467  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
468  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
469  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
470  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
471  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
472  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
473  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
474  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
475  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
476  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
477  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
478  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
479  IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
480 } IfxVadc_TriggerSource;
481 
482 /** \} */
483 
484 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
485  * \{ */
486 
487 /******************************************************************************/
488 /*-------------------------Inline Function Prototypes-------------------------*/
489 /******************************************************************************/
490 
491 /** \brief access function to enable/disable wait for read mode for result registers
492  * \param group pointer to the VADC group
493  * \param resultIdx result register index
494  * \param waitForRead wait for read mode enabled/disabled
495  * \return None
496  */
497 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
498 
499 /** \brief access function to enable/disable wait for read mode for global result register
500  * \param vadc pointer to the VADC
501  * \param waitForRead wait for read mode enabled/disabled
502  * \return None
503  */
504 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
505 
506 /** \brief Enables the background sacn external trigger.
507  * \param vadc pointer to the base of VADC registers.
508  * \return None
509  */
510 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
511 
512 /** \brief Gets the background scan gating mode.
513  * \param vadc pointer to the base of VADC registers.
514  * \return background scan gating mode.
515  */
516 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
517 
518 /** \brief Gets the gating input selection.
519  * \param vadc pointer to the base of VADC registers.
520  * \return background scan gating input selection.
521  */
522 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
523 
524 /** \brief Gets the requested background scan slot priority.
525  * \param vadcG pointer to VADC group registers.
526  * \return requested background scan slot priority.
527  */
528 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
529 
530 /** \brief Gets the requested background scan slot start mode.
531  * \param vadcG pointer to VADC group registers.
532  * \return requested background scan slot start mode.
533  */
534 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
535 
536 /** \brief Gets the background scan trigger input.
537  * \param vadc pointer to the base of VADC registers.
538  * \return Gets the background scan external trigger source.
539  */
540 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
541 
542 /** \brief Gets the background scan external trigger mode.
543  * \param vadc pointer to the base of VADC registers.
544  * \return background scan external trigger mode.
545  */
546 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
547 
548 /** \brief get global input class resolution
549  * \param vadc Pointer to the VADC Group
550  * \param inputClassNum global input class number
551  * \return ADC input class channel resolution.
552  */
553 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
554 
555 /** \brief return conversion result stored in the Global result Register
556  * \param vadc pointer to the VADC module
557  * \return global result register
558  *
559  * \code
560  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
561  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
562  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
563  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
564  *
565  * //confiure wait for read mode for global result register
566  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
567  *
568  * // configure background scan
569  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
570  *
571  * // enable auto scan
572  * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
573  *
574  * // start the background scan
575  * IfxVadc_startBackgroundScan(vadc);
576  *
577  * Ifx_VADC_GLOBRES result;
578  * result = IfxVadc_getGlobalResult (vadc);
579  *
580  * \endcode
581  *
582  */
583 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
584 
585 /** \brief get global input class sample time in sec
586  * \param vadc Pointer to the VADC Group Register space
587  * \param inputClassNum ADC input class number
588  * \param analogFrequency ADC module analog frequency in Hz.
589  * \return ADC input class channel sample time in sec.
590  */
591 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
592 
593 /** \brief Get conversion result for the group
594  * \param group pointer to the VADC group
595  * \param results pointer to scaled conversion results
596  * \param resultOffset offset for the first result
597  * \param numResults number of results
598  * \return None
599  *
600  * \code
601  * Ifx_VADC* vadc = &MODULE_VADC
602  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
603  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
604  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
605  *
606  * //confiure wait for read mode for global result register
607  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
608  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
609  *
610  * // configure scan
611  * IfxVadc_setScan(group, channels, mask);
612  *
613  * // enable auto scan
614  * IfxVadc_setAutoScan(group, TRUE);
615  *
616  * // start the scan
617  * IfxVadc_startScan(group);
618  *
619  * // wait for conversion to finish
620  *
621  * // fetch the 2 results of conversion for group 0
622  * Ifx_VADC_RES results[10];
623  * result = IfxVadc_getGroupResult(group, results, 0, 2);
624  * \endcode
625  *
626  */
627 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
628 
629 /** \brief Get conversion result (Function does not care about the alignment)
630  * value = raw * gain + offset.
631  * \param group pointer to the VADC group
632  * \param resultIdx result register index
633  * \return scaled Conversion result
634  *
635  * \code
636  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
637  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
638  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
639  *
640  * //confiure wait for read mode for global result register
641  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
642  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
643  *
644  * // configure scan
645  * IfxVadc_setScan(group, channels, mask);
646  *
647  * // enable auto scan
648  * IfxVadc_setAutoScan(group, TRUE);
649  *
650  * // start the scan
651  * IfxVadc_startScan(group);
652  *
653  * // wait for conversion to finish
654  *
655  * // fetch the result of conversion from result register 0 for group 0
656  * Ifx_VADC_RES result;
657  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
658  * \endcode
659  *
660  */
661 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
662 
663 /** \brief Returns the auto background scan status.
664  * \param vadc pointer to the base of VADC registers.
665  * \return TRUE if enabled otherwise FALSE.
666  */
667 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
668 
669 /** \brief Returns the background scan slot requested status.
670  * \param vadcG pointer to VADC group registers.
671  * \return background scan slot requested status.
672  */
673 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
674 
675 /** \brief Enables/Disables continuous background auto scan
676  * \param vadc pointer to the base of VADC registers.
677  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
678  * \return None
679  */
680 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
681 
682 /** \brief configures a background scan; can also stop autoscan if all channels are 0
683  * \param vadc pointer to the VADC module registers
684  * \param groupId group index
685  * \param channels specifies the channels which should be enabled/disabled
686  * \param mask specifies the channels which should be modified
687  * \return None
688  *
689  * Background scan can be enabled/disabled for the given channels which are selected with the mask
690  *
691  * \code
692  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
693  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
694  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
695  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
696  *
697  * //confiure wait for read mode for global result register
698  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
699  *
700  * // configure background scan
701  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
702  *
703  * // enable auto scan
704  * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
705  *
706  * // start the background scan
707  * IfxVadc_startBackgroundScan(vadc);
708  * \endcode
709  *
710  */
711 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
712 
713 /** \brief Sets the background scan slot gating configurations.
714  * \param vadc pointer to the base of VADC registers.
715  * \param gatingSource gate input for group.
716  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
717  * \return None
718  */
719 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
720 
721 /** \brief Sets the background scan exteranal trigger operating configurations.
722  * \param vadc pointer to the base of VADC registers.
723  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
724  * \param triggerSource trigger input for group.
725  * \return None
726  */
727 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
728 
729 /** \brief Starts a background scan
730  * \param vadc pointer to the VADC module
731  * \return None
732  *
733  * \see IfxVadc_setBackgroundScan
734  *
735  */
736 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
737 
738 /******************************************************************************/
739 /*-------------------------Global Function Prototypes-------------------------*/
740 /******************************************************************************/
741 
742 /** \brief Gives the background scan status for a group
743  * \param vadc pointer to the VADC module
744  * \return IfxVadc_Status
745  */
746 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
747 
748 /** \brief Get conversion result (Function does not care about the alignment)
749  * value = raw * gain + offset.
750  * \param vadc VADC module pointer
751  * \param group pointer to the VADC group
752  * \param channel channel Id
753  * \param sourceType type of request source
754  * \return scaled Conversion result
755  *
756  * \code
757  * Ifx_VADC vadc;
758  * vadc.vadc = &MODULE_VADC;
759  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
760  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
761  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
762  *
763  * //confiure wait for read mode for global result register
764  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
765  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
766  *
767  * // configure scan
768  * IfxVadc_setScan(group, channels, mask);
769  *
770  * // start the scan
771  * IfxVadc_startScan(group);
772  *
773  * // wait for conversion to finish
774  *
775  * // fetch the result of conversion for channel 2 of group 0
776  * Ifx_VADC_RESresult2;
777  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
778  * Ifx_VADC_RESresult5;
779  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
780  * \endcode
781  *
782  */
783 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
784 
785 /** \} */
786 
787 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
788  * \{ */
789 
790 /******************************************************************************/
791 /*-------------------------Inline Function Prototypes-------------------------*/
792 /******************************************************************************/
793 
794 /** \brief Disables the scan slot external trigger.
795  * \param vadcG pointer to VADC group registers.
796  * \return None
797  */
798 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
799 
800 /** \brief Enables the scan slot external trigger.
801  * \param vadcG pointer to VADC group registers.
802  * \return None
803  */
804 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
805 
806 /** \brief Gets the request scan slot gating mode.
807  * \param vadcG pointer to VADC group registers.
808  * \return requested scan slot gating mode.
809  */
810 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
811 
812 /** \brief Gets the request scan slot gating input.
813  * \param vadcG pointer to VADC group registers.
814  * \return request scan slot gating input.
815  */
816 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
817 
818 /** \brief Gets the request scan slot priority.
819  * \param vadcG pointer to VADC group registers.
820  * \return request scan slot priority.
821  */
822 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
823 
824 /** \brief Gets the request scan slot start mode.
825  * \param vadcG pointer to VADC group registers.
826  * \return request scan slot start mode.
827  */
828 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
829 
830 /** \brief Gets the requested scan slot trigger input.
831  * \param vadcG pointer to VADC group registers.
832  * \return requested scan slot trigger input.
833  */
834 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
835 
836 /** \brief Gets the requested scan slot trigger mode.
837  * \param vadcG pointer to VADC group registers.
838  * \return requested scan slot trigger mode.
839  */
840 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
841 
842 /** \brief Gets the auto scan enable status.
843  * \param vadcG pointer to VADC group registers.
844  * \return TRUE if auto scan enabled otherwise FALSE.
845  */
846 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
847 
848 /** \brief Returns the scan slot requested status.
849  * \param vadcG pointer to VADC group registers.
850  * \return TRUE if scan slot request enabled otherwise FALSE.
851  */
852 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
853 
854 /** \brief Enables/Disables continuous auto scan
855  * \param vadcG pointer to VADC group registers.
856  * \param autoscanEnable whether autoscan is enabled or not.
857  * \return None
858  */
859 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
860 
861 /** \brief Sets the scan slot gating configuration.
862  * \param vadcG pointer to VADC group registers.
863  * \param gatingSource gate input for group.
864  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
865  * \return None
866  */
867 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
868 
869 /** \brief Sets the scan slot trigger operating configurations.
870  * \param vadcG pointer to VADC group registers.
871  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
872  * \param triggerSource trigger input for group.
873  * \return None
874  */
875 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
876 
877 /** \brief Starts an autoscan on the specified group
878  * \param group pointer to the VADC group
879  * \return None
880  *
881  * See \ref IfxVadc_setScan
882  *
883  */
884 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
885 
886 /******************************************************************************/
887 /*-------------------------Global Function Prototypes-------------------------*/
888 /******************************************************************************/
889 
890 /** \brief Gives the scan status for a group
891  * \param group pointer to the VADC group
892  * \return IfxVadc_Status
893  */
894 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
895 
896 /** \brief Configures an (auto-)scan
897  * \param group pointer to the VADC group
898  * \param channels specifies the channels which should be enabled/disabled
899  * \param mask specifies the channels which should be modified
900  * \return None
901  *
902  * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
903  *
904  * \code
905  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
906  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
907  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
908  *
909  * // configure scan
910  * IfxVadc_setScan(group, channels, mask);
911  *
912  * // enable Auto-Scan
913  * IfxVadc_setAutoScan(group, TRUE);
914  *
915  * // start the scan
916  * IfxVadc_startScan(group);
917  * \endcode
918  *
919  */
920 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
921 
922 /** \} */
923 
924 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
925  * \{ */
926 
927 /******************************************************************************/
928 /*-------------------------Inline Function Prototypes-------------------------*/
929 /******************************************************************************/
930 
931 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
932  * refill incase of aborted conversion
933  * source interrupt enable/disable
934  * external trigger control of the aborted conversion
935  * \param group pointer to the VADC group
936  * \param channel specifies channel Id
937  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
938  * \return None
939  *
940  * \code
941  *
942  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
943  * IfxVadc_ChannelId channel = 1; // for channel 1
944  * // Add channel 1 to queue of group 0 with the refill turned on
945  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
946  * \endcode
947  *
948  */
949 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
950 
951 /** \brief Clears all the queue entries including backup stage.
952  * \param vadcG pointer to VADC group registers.
953  * \param flushQueue Whether queue is cleared or not.
954  * \return None
955  */
956 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
957 
958 /** \brief Disables the external trigger.
959  * \param vadcG pointer to VADC group registers.
960  * \return None
961  */
962 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
963 
964 /** \brief Enables the external trigger.
965  * \param vadcG pointer to VADC group registers.
966  * \return None
967  */
968 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
969 
970 /** \brief Gets the requested queue slot gating mode.
971  * \param vadcG pointer to VADC group registers.
972  * \return requested queue slot gating mode.
973  */
974 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
975 
976 /** \brief Gets the requested queue slot gating input.
977  * \param vadcG pointer to VADC group registers.
978  * \return requested queue slot gating input.
979  */
980 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
981 
982 /** \brief Gets the request queue slot priority.
983  * \param vadcG pointer to VADC group registers.
984  * \return requested queue slot priority.
985  */
986 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
987 
988 /** \brief Gets the requested queue slot start mode.
989  * \param vadcG pointer to VADC group registers.
990  * \return requested queue slot start mode.
991  */
992 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
993 
994 /** \brief Gets the requested queue slot trigger input.
995  * \param vadcG pointer to VADC group registers.
996  * \return requested queue slot trigger input.
997  */
998 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
999 
1000 /** \brief Gets the requested queue slot trigger mode.
1001  * \param vadcG pointer to VADC group registers.
1002  * \return requested queue slot trigger mode.
1003  */
1004 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1005 
1006 /** \brief Returns the queue slot requested status.
1007  * \param vadcG pointer to VADC group registers.
1008  * \return TRUE if queue slot request enabled otherwise FALSE.
1009  */
1010 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1011 
1012 /** \brief Sets the gating configurations.
1013  * \param vadcG pointer to VADC group registers.
1014  * \param gatingSource gate input for group.
1015  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1016  * \return None
1017  */
1018 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1019 
1020 /** \brief Sets the trigger operating configurations.
1021  * \param vadcG pointer to VADC group registers.
1022  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1023  * \param triggerSource trigger input for group.
1024  * \return None
1025  */
1026 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1027 
1028 /** \brief Starts a queue of a group by generating a trigger event through software
1029  * \param group pointer to the VADC group
1030  * \return None
1031  */
1032 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1033 
1034 /******************************************************************************/
1035 /*-------------------------Global Function Prototypes-------------------------*/
1036 /******************************************************************************/
1037 
1038 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1039  * \param group pointer to the VADC group
1040  * \return status of the Queue
1041  *
1042  * \code
1043  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1044  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1045  * \endcode
1046  *
1047  */
1048 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1049 
1050 /** \} */
1051 
1052 /** \addtogroup IfxLld_Vadc_Std_IO
1053  * \{ */
1054 
1055 /******************************************************************************/
1056 /*-------------------------Inline Function Prototypes-------------------------*/
1057 /******************************************************************************/
1058 
1059 /** \brief Initializes a EMUX output
1060  * \param emux the Emux Pin which should be configured
1061  * \param outputMode the pin output mode which should be configured
1062  * \param padDriver the pad driver mode which should be configured
1063  * \return None
1064  */
1065 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1066 
1067 /** \brief Initializes a GxBFL output
1068  * \param gxBfl the GxBFL Pin which should be configured
1069  * \param outputMode the pin output mode which should be configured
1070  * \param padDriver the pad driver mode which should be configured
1071  * \return None
1072  */
1073 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1074 
1075 /** \} */
1076 
1077 /** \addtogroup IfxLld_Vadc_Std_Frequency
1078  * \{ */
1079 
1080 /******************************************************************************/
1081 /*-------------------------Inline Function Prototypes-------------------------*/
1082 /******************************************************************************/
1083 
1084 /** \brief Calculate the time using analog frequency.
1085  * \param analogFrequency analog frequency in Hz.
1086  * \param sampleTime sample time in sec.
1087  * \return sample time in sec.
1088  */
1089 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1090 
1091 /******************************************************************************/
1092 /*-------------------------Global Function Prototypes-------------------------*/
1093 /******************************************************************************/
1094 
1095 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1096  * \param vadc pointer to the base of VADC registers
1097  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1098  */
1099 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1100 
1101 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1102  * \param vadc pointer to the base of VADC registers
1103  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1104  */
1105 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1106 
1107 /** \} */
1108 
1109 /** \addtogroup IfxLld_Vadc_Std_Group
1110  * \{ */
1111 
1112 /******************************************************************************/
1113 /*-------------------------Inline Function Prototypes-------------------------*/
1114 /******************************************************************************/
1115 
1116 /** \brief Clears the all group requests.
1117  * \param vadcG pointer to VADC group registers.
1118  * \return None
1119  */
1120 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1121 
1122 /** \brief Gets the ADC group arbitration round length.
1123  * \param vadcG pointer to VADC group registers.
1124  * \return ADC group arbitration round length.
1125  */
1126 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1127 
1128 /** \brief Gets the channel esult service request node pointer 0.
1129  * \param vadcG pointer to VADC group registers.
1130  * \return channel result service request node pointer 0.
1131  */
1132 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1133 
1134 /** \brief Gets the channel esult service request node pointer 1.
1135  * \param vadcG pointer to VADC group registers.
1136  * \return channel result service request node pointer 1.
1137  */
1138 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1139 
1140 /** \brief Gets the channel service request node pointer.
1141  * \param vadcG pointer to VADC group registers.
1142  * \return channel service request node pointer.
1143  */
1144 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1145 
1146 /** \brief Gets the configured master index.
1147  * \param vadcG pointer to VADC group registers.
1148  * \return configured master kernel index.
1149  */
1150 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1151 
1152 /** \brief Resets the ADC group.
1153  * \param vadcG pointer to VADC group registers.
1154  * \return None
1155  */
1156 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1157 
1158 /** \brief Sets analog converter group number.
1159  * \param vadcG pointer to VADC group registers.
1160  * \param analogConverterMode group analog converter mode.
1161  * \return None
1162  */
1163 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1164 
1165 /** \brief Sets the arbiter round length.
1166  * \param vadcG pointer to VADC group registers.
1167  * \param arbiterRoundLength arbiter round length.
1168  * \return None
1169  */
1170 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1171 
1172 /** \brief Sets the ADC input class channel resolution.
1173  * \param vadcG pointer to VADC group registers.
1174  * \param inputClassNum input class number.
1175  * \param resolution ADC input class channel resolution.
1176  * \return None
1177  */
1178 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1179 
1180 /** \brief Sets the ADC input class sample time.
1181  * \param vadcG pointer to VADC group registers.
1182  * \param inputClassNum input class number.
1183  * \param analogFrequency ADC analog frequency in Hz.
1184  * \param sampleTime request sample time in sec for input class.
1185  * \return None
1186  */
1187 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1188 
1189 /** \brief Sets the master index.
1190  * \param vadcG pointer to VADC group registers.
1191  * \param masterIndex master index.
1192  * \return None
1193  */
1194 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1195 
1196 /******************************************************************************/
1197 /*-------------------------Global Function Prototypes-------------------------*/
1198 /******************************************************************************/
1199 
1200 /** \brief Sets the Arbiter slot configurations.
1201  * \param vadcG pointer to VADC group registers.
1202  * \param slotEnable enable/disable of slot.
1203  * \param prio channel request priority.
1204  * \param mode Channel Slot start mode.
1205  * \param slot channel slot Request source.
1206  * \return None
1207  */
1208 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1209 
1210 /** \} */
1211 
1212 /** \addtogroup IfxLld_Vadc_Std_Module
1213  * \{ */
1214 
1215 /******************************************************************************/
1216 /*-------------------------Inline Function Prototypes-------------------------*/
1217 /******************************************************************************/
1218 
1219 /** \brief Disable VADC Module
1220  * \param vadc Pointer to VADC Module
1221  * \return None
1222  */
1223 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1224 
1225 /** \brief Enable VADC kernel.
1226  * \param vadc pointer to the base of VADC registers.
1227  * \return None
1228  */
1229 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1230 
1231 /** \brief gets ADC Calibration Flag CAL status.
1232  * \param vadc pointer to VADC group registers.
1233  * \param adcCalGroupNum ADC CAL group number.
1234  * \return CAL group status.
1235  */
1236 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1237 
1238 /** \brief Gets the global control configuration value.
1239  * \param vadc pointer to the base of VADC registers.
1240  * \return global control configuration value.
1241  */
1242 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1243 
1244 /** \brief get SUCAL bit field status
1245  * \param vadc Pointer to VADC Module
1246  * \return Indicate the start-up calibration phase
1247  */
1248 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1249 
1250 /** \brief initiates the calibration pulse phase.
1251  * \param vadc pointer to the base of VADC registers
1252  * \return None
1253  */
1254 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1255 
1256 /** \brief Sets the channel conversion mode.
1257  * \param vadc pointer to VADC module registers.
1258  * \param inputClassNum global input class number.
1259  * \param resolution ADC channel resolution.
1260  * \return None
1261  */
1262 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1263 
1264 /** \brief Sets the sample time of ADC global class.
1265  * \param vadc pointer to VADC module registers.
1266  * \param inputClassNum global input class number.
1267  * \param analogFrequency ADC analog frequency in Hz.
1268  * \param sampleTime the requested sample time for input class in sec.
1269  * \return None
1270  */
1271 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1272 
1273 /** \brief Sets the sensitivity of the module to sleep signal
1274  * \param vadc pointer to VADC registers
1275  * \param mode mode selection (enable/disable)
1276  * \return None
1277  */
1278 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1279 
1280 /******************************************************************************/
1281 /*-------------------------Global Function Prototypes-------------------------*/
1282 /******************************************************************************/
1283 
1284 /** \brief Disable write access to the VADC config/control registers.
1285  * \param vadc pointer to the base of VADC registers.
1286  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1287  * \return None
1288  */
1289 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1290 
1291 /** \brief Disables the post calibration.
1292  * \param vadc pointer to the base of VADC registers.
1293  * \param group Index of the group.
1294  * \param disable disable or not.
1295  * \return None
1296  */
1297 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1298 
1299 /** \brief Enable write access to the VADC config/control registers.
1300  * \param vadc pointer to the base of VADC registers.
1301  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1302  * \return None
1303  */
1304 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1305 
1306 /** \brief Module Frequency in Hz
1307  * \return Module Frequency in Hz.
1308  */
1309 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1310 
1311 /** \brief Gives the SRC source address.
1312  * \param group Index of the group
1313  * \param index SRC number
1314  * \return SRC source address
1315  */
1316 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1317 
1318 /** \brief Initialises ADC arbiter clock.
1319  * \param vadc pointer to the base of VADC registers
1320  * \param arbiterClockDivider ADC arbiter clock divider.
1321  * \return None
1322  */
1323 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1324 
1325 /** \brief Initialises the ADC Converter clock.
1326  * \param vadc pointer to the base of VADC registers
1327  * \param converterClockDivider ADC converter clock divider.
1328  * \return None
1329  */
1330 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1331 
1332 /** \brief Configure the FadcD vadc digital clock.
1333  * \param vadc pointer to the base of VADC registers.
1334  * \param fAdcD ADC digital clock frequency in Hz.
1335  * \return calculated ADC digital clock frequency in Hz.
1336  */
1337 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1338 
1339 /** \brief Configure the ADC analog clock.
1340  * \param vadc pointer to the base of VADC registers.
1341  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1342  * \return ADC analog clock frequency in Hz.
1343  */
1344 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1345 
1346 /** \brief Return the post calibration status
1347  * \param vadc Pointer to VADC module
1348  * \param group specifies Group ID
1349  * \return TRUE if the post calibration is enabled for the group else false
1350  */
1351 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1352 
1353 /** \brief Resets the kernel.
1354  * \param vadc pointer to the base of VADC registers.
1355  * \return None
1356  */
1357 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1358 
1359 /** \brief Select Low Power Supply Voltage
1360  * \param vadc Pointer to Module space
1361  * \param supplyVoltage Select Supply Voltage
1362  * \return None
1363  */
1364 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1365 
1366 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1367  * \param vadc pointer to the base of VADC registers.
1368  * \return None
1369  */
1370 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1371 
1372 /** \} */
1373 
1374 /** \addtogroup IfxLld_Vadc_Std_Channel
1375  * \{ */
1376 
1377 /******************************************************************************/
1378 /*-------------------------Inline Function Prototypes-------------------------*/
1379 /******************************************************************************/
1380 
1381 /** \brief Clears the channel request.
1382  * \param vadcG pointer to VADC group registers.
1383  * \param channelId channel id whose request to be cleared.
1384  * \return None
1385  */
1386 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1387 
1388 /** \brief Enables the FIFO mode.
1389  * \param vadcG pointer to VADC group registers.
1390  * \param resultRegister channel result register.
1391  * \param fifoMode FIFO mode .
1392  * \return None
1393  */
1394 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1395 
1396 /**
1397  * \param vadcG pointer to VADC group registers.
1398  * \param resultRegister channel result register.
1399  * \return None
1400  */
1401 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1402 
1403 /** \brief Gets the group's assigned channels.
1404  * \param vadcG pointer to VADC group registers.
1405  * \return group's assigned channels.
1406  */
1407 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1408 
1409 /** \brief Gets the current ADC channel control configurations.
1410  * \param vadcG pointer to VADC group registers.
1411  * \param channelIndex ADC channel number.
1412  * \return current ADC channel control configuration.
1413  */
1414 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1415 
1416 /** \brief Gets the channel input class
1417  * \param vadcG pointer to VADC Group register space
1418  * \param channelIndex specifies channel ID
1419  * \return Input class
1420  */
1421 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1422 
1423 /** \brief Gets the ADC input class channel resolution.
1424  * \param vadcG pointer to VADC group registers.
1425  * \param inputClassNum ADC input class number.
1426  * \return ADC input class channel resolution.
1427  */
1428 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1429 
1430 /** \brief Gets the ADC input class channel sample time.
1431  * \param vadcG pointer to VADC group registers.
1432  * \param inputClassNum ADC input class number.
1433  * \param analogFrequency ADC module analog frequency in Hz.
1434  * \return ADC input class channel sample time in sec.
1435  */
1436 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1437 
1438 /** \brief Sets the channels with low priority as background channel.
1439  * \param vadcG pointer to VADC group registers.
1440  * \param channelIndex group channel id.
1441  * \return None
1442  */
1443 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1444 
1445 /** \brief Sets the target for result background source.
1446  * \param vadcG pointer to VADC group registers.
1447  * \param channelIndex group channel id.
1448  * \param globalResultUsage whether storage in global result register.
1449  * \return None
1450  */
1451 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1452 
1453 /** \brief Selects boundary extension.
1454  * \param vadcG pointer to VADC group registers.
1455  * \param channelIndex group channel id.
1456  * \param boundaryMode boundary extension mode.
1457  * \return None
1458  */
1459 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1460 
1461 /** \brief Sets the channel event service request line.
1462  * \param vadcG pointer to VADC group registers.
1463  * \param channelSrcNr channel event Service Node.
1464  * \param channel channel number.
1465  * \return None
1466  */
1467 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1468 
1469 /** \brief Sets the channel input class.
1470  * \param vadcG pointer to VADC group registers.
1471  * \param channelIndex group channel id.
1472  * \param inputClass group input class.
1473  * \return None
1474  */
1475 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1476 
1477 /** \brief Sets the channel event mode.
1478  * \param vadcG pointer to VADC group registers.
1479  * \param channelIndex group channel id.
1480  * \param limitCheck channel event mode.
1481  * \return None
1482  */
1483 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1484 
1485 /** \brief Sets channel as priority channel with in the group.
1486  * \param vadcG pointer to VADC group registers.
1487  * \param channelIndex group channel id.
1488  * \return None
1489  */
1490 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1491 
1492 /** \brief Sets group's lower boundary.
1493  * \param vadcG pointer to VADC group registers.
1494  * \param channelIndex group channel id.
1495  * \param lowerBoundary group lower boundary.
1496  * \return None
1497  */
1498 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1499 
1500 /** \brief Selects the refernce input.
1501  * \param vadcG pointer to VADC group registers.
1502  * \param channelIndex group channel id.
1503  * \param reference reference input.
1504  * \return None
1505  */
1506 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1507 
1508 /** \brief Sets result event node pointer 0.
1509  * \param vadcG pointer to VADC group registers.
1510  * \param resultSrcNr channel result event service node.
1511  * \param resultRegister channel result register.
1512  * \return None
1513  */
1514 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1515 
1516 /** \brief Sets result event node pointer 1.
1517  * \param vadcG pointer to VADC group registers.
1518  * \param resultSrcNr channel result event service node.
1519  * \param resultRegister channel result register.
1520  * \return None
1521  */
1522 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1523 
1524 /** \brief Sets result store position.
1525  * \param vadcG pointer to VADC group registers.
1526  * \param channelIndex group channel id.
1527  * \param rightAlignedStorage result store position.
1528  * \return None
1529  */
1530 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1531 
1532 /** \brief Sets channel synchronization request.
1533  * \param vadcG pointer to VADC group registers.
1534  * \param channelIndex group channel id.
1535  * \param synchonize whether channel synchronize or stand alone operation.
1536  * \return None
1537  */
1538 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1539 
1540 /** \brief Sets group's upper boundary.
1541  * \param vadcG pointer to VADC group registers.
1542  * \param channelIndex group channel id.
1543  * \param upperBoundary group upper boundary.
1544  * \return None
1545  */
1546 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1547 
1548 /** \brief Sets the group result register.
1549  * \param vadcG pointer to VADC group registers.
1550  * \param channelIndex group channel id.
1551  * \param resultRegister result register for group result storage.
1552  * \return None
1553  */
1554 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1555 
1556 /******************************************************************************/
1557 /*-------------------------Global Function Prototypes-------------------------*/
1558 /******************************************************************************/
1559 
1560 /** \brief get channel conversion timing
1561  * \param vadc Pointer to VADC module
1562  * \param group specifies the Group
1563  * \param inputClass Input class used
1564  * \param analogFrequency ADC module analog frequency fadci in Hz.
1565  * \param moduleFrequency ADC module frequency fvadc in Hz.
1566  * \param conversionMode specifies the conversion mode (Standard conversion mode)
1567  * \return Channel conversion Time in sec
1568  */
1569 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1570 
1571 /** \} */
1572 
1573 /** \addtogroup IfxLld_Vadc_Std_Emux
1574  * \{ */
1575 
1576 /******************************************************************************/
1577 /*-------------------------Inline Function Prototypes-------------------------*/
1578 /******************************************************************************/
1579 
1580 /** \brief get global input class resolution
1581  * \param vadc Pointer to VADC Module space
1582  * \param inputClassNum global input class number
1583  * \return External channel resolution for global input class
1584  */
1585 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1586 
1587 /** \brief Get the sample time of ADC global class for external channel.
1588  * \param vadc pointer to VADC Module space
1589  * \param inputClassNum Adc input class number
1590  * \param analogFrequency ADC module analog frequency in Hz.
1591  * \return ADC input class external channel sample time in sec.
1592  */
1593 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1594 
1595 /** \brief get the external channel resolution
1596  * \param vadcG Pointer to VADC group register space
1597  * \param inputClassNum Adc input class number
1598  * \return Adc input class External channel resolution
1599  */
1600 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1601 
1602 /** \brief Gets the ADC input class sample time of external channel.
1603  * \param vadcG Pointer to Register Group space
1604  * \param inputClassNum ADC input class number
1605  * \param analogFrequency ADC module analog frequency in Hz.
1606  * \return ADC input class external channel sample time in sec.
1607  */
1608 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1609 
1610 /** \brief set the external channel resolution of Global class
1611  * \param vadc pointer to VADC Module space
1612  * \param inputClassNum Global Input Class Number
1613  * \param resolution External Channel resolution
1614  * \return None
1615  */
1616 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1617 
1618 /** \brief Sets the sample time of ADC global class for external channel.
1619  * \param vadc Pointer to VADC Module space
1620  * \param inputClassNum Adc input class number
1621  * \param analogFrequency ADC analog Frequency in HZ
1622  * \param sampleTime the requested sample time for input class in sec
1623  * \return None
1624  */
1625 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1626 
1627 /** \brief set the external channel resolution of ADC input class
1628  * \param vadcG pointer to VADC Group Register space
1629  * \param inputClassNum input class number
1630  * \param resolution input class external channel resolution
1631  * \return None
1632  */
1633 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1634 
1635 /** \brief Sets the ADC input class sample time for external channel.
1636  * \param vadcG Pointer to VADC Group Register Space
1637  * \param inputClassNum input class number
1638  * \param analogFrequency ADC analog frequency in Hz.
1639  * \param sampleTime request sample time in sec for input class.
1640  * \return None
1641  */
1642 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1643 
1644 /** \brief Sets the Emux Interface for a particular group
1645  * \param vadc Pointer to VADC Module Space
1646  * \param emuxInterface specifies the EmuxInterface
1647  * \param group specifies the group ID
1648  * \return None
1649  */
1650 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1651 
1652 /******************************************************************************/
1653 /*-------------------------Global Function Prototypes-------------------------*/
1654 /******************************************************************************/
1655 
1656 /**
1657  * \param vadc pointer to Module space
1658  * \param vadcG Pointer to VADC group register space
1659  * \param mode External Multiplexer mode
1660  * \param channels Specifies channel Id
1661  * \param startChannel specifies the external channel value from which conversion to be carried out
1662  * \param code Output the channel number in binary code/gray code
1663  * \param sampleTimeControl specifies when to use a sample time for external channel
1664  * \param channelSelectionStyle External Multiplexer Channel Selection Style
1665  * \return None
1666  */
1667 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1668 
1669 /** \} */
1670 
1671 /******************************************************************************/
1672 /*-------------------------Inline Function Prototypes-------------------------*/
1673 /******************************************************************************/
1674 
1675 /** \brief get channel service request node pointer
1676  * \param vadcG Pointer to VADC Group register space
1677  * \return channel service request node pointer
1678  */
1679 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1680 
1681 /** \brief set channel event node pointer
1682  * \param vadcG Pointer to the Vadc group register space
1683  * \param channelSrcNr Service request
1684  * \param channel specifies channel
1685  * \return None
1686  */
1687 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1688 
1689 /******************************************************************************/
1690 /*---------------------Inline Function Implementations------------------------*/
1691 /******************************************************************************/
1692 
1693 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1694 {
1695  group->QINR0.U = channel | options;
1696 }
1697 
1698 
1699 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1700 {
1701  uint32 ticks;
1702 
1703  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1704 
1705  if (ticks > 31)
1706  {
1707  ticks = (ticks / 16) + 15;
1708  }
1709 
1710  ticks = __minu(ticks, 0xFFu);
1711 
1712  return ticks;
1713 }
1714 
1715 
1716 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1717 {
1718  vadcG->REFCLR.U = 0x0000FFFFu;
1719 }
1720 
1721 
1722 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1723 {
1724  vadcG->CEFCLR.U = 1 << channelId;
1725 }
1726 
1727 
1728 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1729 {
1730  vadcG->QMR0.B.FLUSH = flushQueue;
1731 }
1732 
1733 
1734 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1735 {
1736  group->RCR[resultIdx].B.WFR = waitForRead;
1737 }
1738 
1739 
1740 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1741 {
1742  vadc->GLOBRCR.B.WFR = waitForRead;
1743 }
1744 
1745 
1746 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1747 {
1748  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1749  IfxScuWdt_clearCpuEndinit(passwd);
1750  vadc->CLC.B.DISR = 1;
1751  IfxScuWdt_setCpuEndinit(passwd);
1752 }
1753 
1754 
1755 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1756 {
1757  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1758 }
1759 
1760 
1761 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1762 {
1763  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1764 }
1765 
1766 
1767 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1768 {
1769  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1770 }
1771 
1772 
1773 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1774 {
1775  vadcG->RCR[resultRegister].B.FEN = fifoMode;
1776 }
1777 
1778 
1779 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1780 {
1781  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1782 
1783  IfxScuWdt_clearCpuEndinit(passwd);
1784  vadc->CLC.U = 0x00000000;
1785  IfxScuWdt_setCpuEndinit(passwd);
1786 }
1787 
1788 
1789 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1790 {
1791  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1792 }
1793 
1794 
1795 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1796 {
1797  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1798 }
1799 
1800 
1801 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1802 {
1803  vadcG->RCR[resultRegister].B.SRGEN = 1;
1804 }
1805 
1806 
1807 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1808 {
1809  uint8 status;
1810  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1811  return status;
1812 }
1813 
1814 
1815 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1816 {
1817  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1818 }
1819 
1820 
1821 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1822 {
1823  Ifx_VADC_G_CHASS assignChannels;
1824  assignChannels.U = vadcG->CHASS.U;
1825  return assignChannels;
1826 }
1827 
1828 
1829 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1830 {
1831  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1832 }
1833 
1834 
1835 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1836 {
1837  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1838 }
1839 
1840 
1841 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1842 {
1843  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1844 }
1845 
1846 
1847 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1848 {
1849  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1850 }
1851 
1852 
1853 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1854 {
1855  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1856 }
1857 
1858 
1859 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1860 {
1861  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1862 }
1863 
1864 
1865 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1866 {
1867  Ifx_VADC_CHCTR tempChctr;
1868  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1869  return tempChctr;
1870 }
1871 
1872 
1873 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1874 {
1875  return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1876 }
1877 
1878 
1879 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1880 {
1881  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1882  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1883  return resultServiceRequestNodePtr0;
1884 }
1885 
1886 
1887 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1888 {
1889  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1890  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1891  return resultServiceRequestNodePtr1;
1892 }
1893 
1894 
1895 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1896 {
1897  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1898  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1899  return serviceRequestNodePtr;
1900 }
1901 
1902 
1903 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1904 {
1905  Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
1906  serviceRequestNodePtr.U = vadcG->CEVNP1.U;
1907  return serviceRequestNodePtr;
1908 }
1909 
1910 
1911 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1912 {
1913  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1914 }
1915 
1916 
1917 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1918 {
1919  return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1920 }
1921 
1922 
1923 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1924 {
1925  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1926 }
1927 
1928 
1929 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1930 {
1931  return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1932 }
1933 
1934 
1935 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1936 {
1937  Ifx_VADC_GLOBCFG globCfg;
1938  globCfg.U = vadc->GLOBCFG.U;
1939  return globCfg;
1940 }
1941 
1942 
1943 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1944 {
1945  return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1946 }
1947 
1948 
1949 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1950 {
1951  Ifx_VADC_GLOBRES tmpGlobalResult;
1952 
1953  tmpGlobalResult.U = vadc->GLOBRES.U;
1954 
1955  return tmpGlobalResult;
1956 }
1957 
1958 
1959 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1960 {
1961  uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1962 
1963  if (sampleTime > 16)
1964  {
1965  sampleTime = (sampleTime - 15) * 16;
1966  }
1967 
1968  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1969 }
1970 
1971 
1972 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1973 {
1974  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1975 }
1976 
1977 
1978 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1979 {
1980  uint32 idx;
1981 
1982  for (idx = 0; idx < numResults; idx++)
1983  {
1984  results[idx].U = group->RES[resultOffset + idx].U;
1985  }
1986 }
1987 
1988 
1989 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1990 {
1991  uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
1992 
1993  if (sampleTime > 16)
1994  {
1995  sampleTime = (sampleTime - 15) * 16;
1996  }
1997 
1998  return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1999 }
2000 
2001 
2002 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
2003 {
2004  uint8 masterIndex = 0;
2005  masterIndex = vadcG->SYNCTR.B.STSEL;
2006  return masterIndex;
2007 }
2008 
2009 
2010 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
2011 {
2012  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
2013 }
2014 
2015 
2016 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
2017 {
2018  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
2019 }
2020 
2021 
2022 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2023 {
2024  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2025 }
2026 
2027 
2028 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2029 {
2030  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2031 }
2032 
2033 
2034 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2035 {
2036  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2037 }
2038 
2039 
2040 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2041 {
2042  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2043 }
2044 
2045 
2046 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2047 {
2048  Ifx_VADC_RES tmpResult;
2049 
2050  tmpResult.U = group->RES[resultIdx].U;
2051 
2052  return tmpResult;
2053 }
2054 
2055 
2056 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2057 {
2058  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2059 }
2060 
2061 
2062 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2063 {
2064  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2065 }
2066 
2067 
2068 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2069 {
2070  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2071 }
2072 
2073 
2074 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2075 {
2076  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2077 }
2078 
2079 
2080 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2081 {
2082  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2083 }
2084 
2085 
2086 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2087 {
2088  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2089 }
2090 
2091 
2092 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2093 {
2094  return (boolean)vadc->GLOBCFG.B.SUCAL;
2095 }
2096 
2097 
2098 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2099 {
2100  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2101  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2102 }
2103 
2104 
2105 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2106 {
2107  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2108  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2109 }
2110 
2111 
2112 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2113 {
2114  vadc->GLOBCFG.B.SUCAL = 1;
2115 }
2116 
2117 
2118 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2119 {
2120  return (boolean)vadc->BRSMR.B.SCAN;
2121 }
2122 
2123 
2124 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2125 {
2126  return (boolean)vadcG->ASMR.B.SCAN;
2127 }
2128 
2129 
2130 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2131 {
2132  return (boolean)vadcG->ARBPR.B.ASEN2;
2133 }
2134 
2135 
2136 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2137 {
2138  return (boolean)vadcG->ARBPR.B.ASEN0;
2139 }
2140 
2141 
2142 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2143 {
2144  return (boolean)vadcG->ARBPR.B.ASEN1;
2145 }
2146 
2147 
2148 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2149 {
2150  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2151 }
2152 
2153 
2154 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2155 {
2156  vadcG->ARBCFG.B.ANONC = analogConverterMode;
2157 }
2158 
2159 
2160 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2161 {
2162  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2163 }
2164 
2165 
2166 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2167 {
2168  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2169 }
2170 
2171 
2172 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2173 {
2174  vadcG->ASMR.B.SCAN = autoscanEnable;
2175 }
2176 
2177 
2178 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2179 {
2180  vadcG->CHASS.U &= ~(1 << channelIndex);
2181 }
2182 
2183 
2184 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2185 {
2186  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2187 }
2188 
2189 
2190 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2191 {
2192  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2193  vadc->BRSSEL[groupId].U = channels;
2194 }
2195 
2196 
2197 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2198 {
2199  Ifx_VADC_BRSCTRL brsctrl;
2200  brsctrl.U = vadc->BRSCTRL.U;
2201  brsctrl.B.GTWC = 1;
2202  brsctrl.B.GTSEL = gatingSource;
2203  vadc->BRSCTRL.U = brsctrl.U;
2204  vadc->BRSMR.B.ENGT = gatingMode;
2205 }
2206 
2207 
2208 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2209 {
2210  Ifx_VADC_BRSCTRL brsctrl;
2211  brsctrl.U = vadc->BRSCTRL.U;
2212  brsctrl.B.XTWC = 1;
2213  brsctrl.B.XTMODE = triggerMode;
2214  brsctrl.B.XTSEL = triggerSource;
2215  vadc->BRSCTRL.U = brsctrl.U;
2216 }
2217 
2218 
2219 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2220 {
2221  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2222 }
2223 
2224 
2225 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2226 {
2227  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2228  vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2229 }
2230 
2231 
2232 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2233 {
2234  vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
2235  vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2236 }
2237 
2238 
2239 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2240 {
2241  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2242 }
2243 
2244 
2245 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2246 {
2247  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2248 }
2249 
2250 
2251 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2252 {
2253  vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2254 }
2255 
2256 
2257 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2258 {
2259  vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2260 }
2261 
2262 
2263 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2264 {
2265  vadcG->ICLASS[inputClassNum].B.CME = resolution;
2266 }
2267 
2268 
2269 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2270 {
2271  vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2272 }
2273 
2274 
2275 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2276 {
2277  if (emuxInterface == IfxVadc_EmuxInterface_0)
2278  {
2279  vadc->EMUXSEL.B.EMUXGRP0 = group;
2280  }
2281  else
2282  {
2283  vadc->EMUXSEL.B.EMUXGRP1 = group;
2284  }
2285 }
2286 
2287 
2288 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2289 {
2290  vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2291 }
2292 
2293 
2294 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2295 {
2296  vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2297 }
2298 
2299 
2300 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2301 {
2302  vadcG->CHASS.U |= (1 << channelIndex);
2303 }
2304 
2305 
2306 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2307 {
2308  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2309 }
2310 
2311 
2312 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2313 {
2314  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2315 }
2316 
2317 
2318 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2319 {
2320  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2321 }
2322 
2323 
2324 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2325 {
2326  vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2327  vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2328 }
2329 
2330 
2331 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2332 {
2333  Ifx_VADC_G_QCTRL0 qctrl0;
2334  qctrl0.U = vadcG->QCTRL0.U;
2335  qctrl0.B.GTWC = 1;
2336  qctrl0.B.GTSEL = gatingSource;
2337  vadcG->QCTRL0.U = qctrl0.U;
2338  vadcG->QMR0.B.ENGT = gatingMode;
2339 }
2340 
2341 
2342 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2343 {
2344  Ifx_VADC_G_QCTRL0 qctrl0;
2345  qctrl0.U = vadcG->QCTRL0.U;
2346  qctrl0.B.XTWC = 1;
2347  qctrl0.B.XTMODE = triggerMode;
2348  qctrl0.B.XTSEL = triggerSource;
2349  vadcG->QCTRL0.U = qctrl0.U;
2350 }
2351 
2352 
2353 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2354 {
2355  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2356 }
2357 
2358 
2359 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2360 {
2361  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2362  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2363 }
2364 
2365 
2366 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2367 {
2368  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2369  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2370 }
2371 
2372 
2373 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2374 {
2375  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2376 }
2377 
2378 
2379 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2380 {
2381  Ifx_VADC_G_ASCTRL asctrl;
2382  asctrl.U = vadcG->ASCTRL.U;
2383  asctrl.B.GTWC = 1;
2384  asctrl.B.GTSEL = gatingSource;
2385  vadcG->ASCTRL.U = asctrl.U;
2386  vadcG->ASMR.B.ENGT = gatingMode;
2387 }
2388 
2389 
2390 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2391 {
2392  Ifx_VADC_G_ASCTRL asctrl;
2393  asctrl.U = vadcG->ASCTRL.U;
2394  asctrl.B.XTWC = 1;
2395  asctrl.B.XTMODE = triggerMode;
2396  asctrl.B.XTSEL = triggerSource;
2397  vadcG->ASCTRL.U = asctrl.U;
2398 }
2399 
2400 
2401 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2402 {
2403  uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2404  IfxScuWdt_clearCpuEndinit(passwd);
2405  vadc->CLC.B.EDIS = mode;
2406  IfxScuWdt_setCpuEndinit(passwd);
2407 }
2408 
2409 
2410 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2411 {
2412  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2413 }
2414 
2415 
2416 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2417 {
2418  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2419 }
2420 
2421 
2422 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2423 {
2424  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2425 }
2426 
2427 
2428 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2429 {
2430  group->QMR0.B.TREV = 1;
2431 }
2432 
2433 
2434 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2435 {
2436  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2437 }
2438 
2439 
2440 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2441 {
2442  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2443 }
2444 
2445 
2446 #endif /* IFXVADC_H */